UR5HCSPI-06-FN_技术文档

S P ICo d e r^TM0 6 UR5 HCS P I-0 6

Zero-Power^TMKeyboard Encoder &

Power Management IC for H/PCs

HID & S YS TEM MANAGEMENT P RODUCTS , H/P C IC FAMILY

DESCRIPTION

FEATURES

The UR5HCSPI-06 keyboard

encoder and power management

IC is designed specifically for

handheld PCs (H/PCs). The off-the-

shelf UR5HCSPI-06 will readily work

with CPUs designed for Windows

CE^®, saving OEMs significant

development time and money as

well as minimizing time-to-market

for the new generations of handheld

products.

• SPI-compatible keyboard encoder

and power management IC with

other interfaces available

• Compatible with Windows CE^®

keyboard specification

• Special keyboard and power

management modes for H/PCs,

including programmable “wake-

up” keys

• Scans, debounces, and encodes

an 8 x 14 matrix and controls

discrete switches and LED

indicators

• Zero-Power^TM— typically

consuming less than 2µA,

between 3-5V

• Offers overall system power

management capabilities

• Compatible with “system-on

silicon” CPUs for H/PCs

• Available in a small 44-pin QFP

package

• Custom versions available

Three main design features of the

UR5HCSPI-06 make it the ideal

companion for the new generation

of Windows CE^®-compatible,

single-chip computers: low-power

consumption; real estate-saving

size; and special keyboard modes.

APPLICATIONS

• StrongARM^TMHandheld PCs

• Windows CE^®Platforms

• Web Phones

• Personal Digital Assistants (PDAs)

• Wearable Computers

• Internet Appliance

PIN ASSIGNMENTS

“Quasi” Zero-Power^TMconsumption

(less than 2µA @ 3V), a must for

H/PCs, provides the host system

with both power management and

I/O flexibility, with almost no battery

drainage.

6

40

39

1

_PWR_OK

_ATN

_SS

7

C5

C4

C3

C2

C1

C0

R0

R1

R2

R3

R4

33

34

23

22

Finally, special keyboard modes

and built-in power management

features allow the SPICoder^TM06 to

operate in harmony with the power

management modes of Windows

CE^®, resulting in more user flexibility

and longer battery life.

NC

PWR_OK

NC0

OSCO

OSCI

Vcc

NC

_RESET

_WKU

Vx

C12

C13

GIO0

_IOTEST

Vss

NC

R7

R6

R5

SCK

MOSI

34 MISO

XSW

SW0

12

P LCC

QFP

C8

C9

C10/WUKO

29

28

17

R4

C7

12

11

18

44

23

1

The UR5HCSPI-06 also offers

programmable features for wake-up

keys and general purpose I/O pins.

SPICoder is a trademark of Semtech Corp. All

other trademarks belong to their respective

companies.

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

1

ORDERING CODE

P a c k a g e Op t io n s

44-pin, Plastic PLCC

44-pin, Plastic QFP

P it c h in m m ’s

1.27 mm

0.8 mm

TA=-2 0 ° C t o +8 5 ° C

UR5HCSPI-06-XX-FN

UR5HCSPI-06-XX-FB

No t e 1 : XX=Optional Customization, XXX= Denotes Revision number

BLOCK DIAGRAM

MISO

MOSI

SCK

SS

R0-R8

SPI

Keyboard

Scanner

Communication

Channel

Keyboard

Matrix

&

ATN

Keyboard

State

Control

GIO0

C0-C13

Programmable

I/O

PWR_OK

WKUP

LID

WUKO

XSW

System

Monitor

Input

LID Latch Monitor

Wake-Up Keys Only Signal

Switch External to Case

Switch

Power

Management

Unit

IOTEST

WKU

Signals

SWO

UR5 HCS P I-0 6

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

2

FUNCTIONAL DESCRIPTION

PIN DEFINITIONS

The UR5HCSPI-06 consists

functionally of five major sections

(see the Functional Diagram on

page 2). These are the Keyboard

Scanner and State control, the

Programmable I/O, the SPI

Communication Channel, the

System Monitor and the Power

Management unit. All sections

communicate with each other and

operate concurrently.

Mn e m o n ic

VCC

VSS

VX

OSCI

P LCC

QFP

38

17

43

37

Typ e Na m e a n d Fu n c t io n

44

22

4

43

42

1

I

P o w e r S u p p ly: 3-5V

Gro u n d

Tie to VCC

I

O

I

Os c illa t o r in p u t

Os c illa t o r o u t p u t

Re s e t : apply 0V to provide orderly

start-up

OSCO

_RESET

36

41

MISO

MOSI

SCK

34

35

36

37

24

29

30

31

32

18

O

I

S P I In t e rfa c e S ig n a ls

I

_SS

I

Slave Select: If not used tie to VSS

_IOTEST

_WKU

R0-R4

O

I

Wa k e -Up Co n t ro l S ig n a ls

2

42

8-12

13-17

I

Ro w Da t a In p u t s

R5-R7

C0-C5

19-21

12-7

13-15

7-2

I

O

Port provides internal pull-up resistors

Co lu m n S e le c t Ou t p u t s :

C6-C7

C8-C9

6-5

31-30

1,44

26-25

O

Mu lt i-fu n c t io n p in s

C10

C11/_LID

29

28

24

23

I/O C10 & “Wake-Up Keys Only” imput

I/O C11 & Lid latch detect input

Mis c e lla n e o u s fu n c t io n s

I/O C12

I/O C13

I/O Programmable I/O

C12

C13

GIO0

WUKO

SWO

27

26

25

33

32

21

20

19

28

27

I

External discrete switch

Discrete switch

P o w e r Ma n a g e m e n t P in s

CPU Attention Output

_ATN

38

33

O

I

_PWR_OK

NC

39

3,18

23,40

41

34

39-40

16,22

35

Power OK Input

No Co n n e c t s : these pins are unused

NC0

NC0 should be tied to VSS or GND

No t e 1 : An underscore before a pin mnemonic denotes an active low signal.

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

3

PIN DESCRIPTIONS

VCC a n d VS S

_IOTES T a n d _WKU

C1 0 /WUKO

VCC and VSS are the power

supply and ground pins. The

UR5HCSPI-06 will operate from a

3-5 Volt power supply. To prevent

noise problems, provide bypass

capacitors and place them as

close as possible to the IC with the

power supply. VX, where available,

should be tied to Vcc.

“Input Output Test” and “Wake Up”

pins control the stop mode exit of

the device. The designer can

connect any number of active low

signals to these two pins through a

17K resistor, in order to force the

device to exit the stop mode. A

sample circuit is shown on page 15

of this document.

The C10/WUKO pin acts

alternatively as column scan output

and as an input. As an input, the

pin detects the “Wake-Up Keys

Only” signal, typically provided by

the host CPU to indicate that the

user has turned the unit off. When

the device detects an active high

state on this pin, it feeds this

information into the “Keyboard

State Control” unit, in order to

disable the keyboard and enable

the programmed wake-up keys.

OS CI a n d OS CO

All the signals are “wire-anded.”

When any one of these signals is

not active, it should be floating

(i.e., these signals should be

driven from “open-collector” or

“open-drain” outputs). Other

configurations are possible;

contact Semtech.

OSCI and OSCO provide the input

and output connections for the on-

chip oscillator. The oscillator can

be driven by any of the following

circuits:

- Crystal

- Ceramic Resonator

- External Clock Signal

The frequency of the on-chip

oscillator is 2 MHz.

C1 1 /_LID

The C11/_LID pin acts in a similar

manner to the C10/WUKO. This pin

is typically connected to the LID

latch through a 150K resistor, in

order to detect physical closing of

the device cover. When the pin

detects an active low state in this

input, it feeds this information into

the “Keyboard State Control” unit,

in order to disable keys inside the

case and enable only switches

located physically on the outer

body of the H/PC unit.

R0 -R 7

The R0-R7 pins are connected to

the rows of the scanned matrix.

Each pin provides an internal pull-

up resistor, eliminating the need for

external components.

_RES ET

A logic zero on the _RESET pin will

force the UR5HCSPI-06 into a

known start-up state. The reset

signal can be supplied by any of

the following circuits:

- RC

- Voltage monitor

- Master system reset

C0 -C9

C0 to C9 are bi-directional pins

connected to the columns of the

scanned matrix. When a column is

selected, the pin outputs an active

low signal. When the column is

de-selected, the pin turns into

high-impedance.

MOS I, MIS O, S CK, _S S , _ATN

These five signals implement the

SPI interface. The device acts as a

slave on the SPI bus. The _SS

(Slave Select) pin should be tied to

ground if not used by the SPI

master. The _ATN pin is asserted

low each time the UR5HCSPI-06

has a packet ready for delivery.

For a more detailed description,

refer to the SPI Communication

Channel section on page 9.

Copyright Semtech 1997-2000

DOC5-SPI-06-DS-103

www.semtech.com

4

®

PIN DESCRIPTIONS, (CON’T)

WINDOWS CE KEYBOARD

C1 2 , C1 3 a n d GIO0

The following illustration shows a typical implementation of a Windows CE®

keyboard.

The SPICoder^TM06 offers pins C12,

C13 and GIO0. C12 and C13 are

used as additional column pins in

order to accommodate larger-size

keyboards, such as the Fujitsu

FKB1406 palmtop keyboard. GIO0

is a programmable input/output

switch; it can also be used as a

wake-up signal. The programming

of the GIO0 is explained on page 8

of this document.

Windows CE® does not support the following keyboard keys typically found

on desktop and laptop keyboards:

power

_

!

@

#

$

%

^

&

*

(

)

0

esc

1

2

3

4

5

6

7

8

9

-

~

`

+

|

\

Q

W

E

R

T

Y

U

I

O

P

=

:

"

'

tab

A

S

D

F

G

H

J

K

L

enter

;

XS W

<

>

}

?

Z

X

C

V

B

N

M

shift

ctrl

,

.

/

shift

The XSW pin is dedicated to an

external switch. This pin is handled

differently than the rest of the switch

matrix and is intended to be

{

alt

[

]

INSERT

connected to a switch physically

located on the outside of the unit.

SCROLL LOCK

PAUSE

NUM LOCK

S W0

Function Keys (F1-F12)

PRINT SCREEN

The SW0 pin is a dedicated input

pin for a switch.

If the keyboard implements the Windows key, the following key

combinations are supported in the Windows CE^®environment:

P WR_OK

Key Combination

Result

The PWR_OK is an active low pin

that monitors the battery status of

the unit. When the UR5HCSPI-06

detects a transition from high to low

on this pin, it will immediately enter

the STOP mode, turn the LED off

and remain in this state until the

batteries of the unit are replaced

and the signal is deasserted.

Windows

Open Start Menu

Open Keyboard Tool

Open Stylus Tool

Open Control Panel

Explore the H/PC

Display the Run Dialog Box

Open Windows CE® Help

Select all on desktop

Windows+K

Windows+I

Windows+C

Windows+E

Windows+R

Windows+H

Ctrl+Windows+A

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

5

“GHOST” KEYS

KEYBOARD SCANNER

In any scanned contact switch matrix, The encoder scans a keyboard organized as an 8 row by 14 column matrix

whenever three keys defining a

rectangle on the switch matrix are

pressed at the same time, a fourth

for a maximum of 112 keys. Smaller size matrixes can also be

accommodated by simply leaving unused pins open. The UR5HCSPI-06

provides internal pull-ups for the Row input pins. When active, the encoder

key positioned on the fourth corner of selects one of the column lines (C0-C13) every 512 µS and then reads the

the rectangle is sensed as being

row data lines (R0-R7). A key closure is detected as a zero in the

pressed. This is known as the “ghost” corresponding position of the matrix.

or “phantom” key problem.

A complete scan cycle for the entire keyboard takes approximately 9.2 mS.

Fig u re 1 : “Ghost” or “Phantom” Key Problem

Each key found pressed is debounced for a period of 20 mS. Once the key

is verified, the corresponding key code(s) are loaded into the transmit buffer

of the SPI communication channel.

Actual key presses

N-Ke y Ro llo ve r

In this mode, the code(s) corresponding to each key press are transmitted

to the host system as soon as that key is debounced, independent of the

release of other keys.

“Ghost”

Key

When a key is released, the corresponding break code is transmitted to the

host system. There is no limitation to the number of keys that can be held

pressed at the same time. However, two or more key closures, occurring

within a time interval of less than 5mS, will set an error flag and will not be

processed. This feature is to protect against the effects of accidental key

presses.

Although the problem cannot be

totally eliminated without using

external hardware, there are methods

to neutralize its negative effects for

most practical applications. Keys that

are intended to be used in

Da t a Co m m a n d Bu ffe r

combinations should be placed in the

same row or column of the matrix,

whenever possible. Shift Keys (Shift,

Alt, Ctrl, Window) should not reside in

the same row (or column) as any

other keys. The UR5HCSPI-06 has

built-in mechanisms to detect the

presence of “ghost” keys.

The UR5HCSPI-06 implements a data buffer, which contains the key

code/command bytes waiting to be transmitted to the host. If the data

buffer is full, the whole buffer will be cleared and an "Initialize" command will

be sent to the host. At the same time, the keyboard will be disabled until

the "Initialize" or "Initialize Complete" command from the host is received.

P o w e r Ma n a g e m e n t Un it

In most keyboard subsystems, the power consumption is determined by the

use of the LEDs. In these situations, USAR has implemeneted two modes

of operation to minimize power drain. (For more information, see page 10

on the UR5HCSPI datasheet - doc5-spi-ds-100.pdf.) However, since the

SPICoder^TM06 does not provide LED ouput/input, this is not a concern.

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

6

KEYBOARD STATES

These states of operation refer only

to the keyboard functionality and,

although they are related to power

states, they are also independent of

them.

(LID = 0) AND (WUK0=0)

AND Key Press

(PWR_OK =1)

AND (LID = 0)

AND (WUKO=0)

AND Key Press

Send

XSW Key

Only

PWR_OK ↓

Send All

Keys

(LID = 1) AND (WUKO=0)

AND Key Press

"S e n d All Ke ys "

(PWR_OK =1)

AND (WUKO=0)

AND (LID=1)

WUKO =1

AND Key

Soft Reset

WUKO=1

AND Key Press

Entry Conditions: Power on reset,

soft reset, PWR_OK =1,

Press

PWR_OK ↓

PWR_OK = 0

Send Wake

Up Keys

Only

{(LID=1) AND (WUKO=0)}

PWR_OK ↓

Send

No Keys

(PWR_OK =1) AND Key Press

AND (WUKO = 1)

Exit Conditions: PWR_OK = 0 ->

"Send No Keys"(WUKO=1) AND

(Key Press) -> "Send Wake-Up

Keys Only"(LID = 0) AND

Fig u re 2 : The UR5HCSPI-06 implements four modes of keyboard and switch operation.

3. While in this state all interrupts

are disabled. The UR5HCSPI-06

will exit this state on the next

interrupt event that detects the

PWR_OK line has been de-

asserted.e

“S e n d No Ke ys "

(WUKO=0) AND (Key Press) ->

"Send XSW Key Only"

Entry Conditions: PWR_OK

transition from high to low

Description: This is the UR5HCSPI-

06’s normal state of operation,

accepting and transmitting every

key press to the system. This state

is entered after the power-on and is

sustained while the unit is being

used.

Exit Conditions: (PWR_OK = 1)

AND (Matrix key pressed OR

Switch OR _WKUP)

“S e n d XS W Ke y On ly"

Entry Condition: (LID=0) AND

(WUKO=0) AND (Key Press)

Description: This state is entered

when a PWR_OK signal is asserted

(transition high to low), indicating a

critically low level of battery

voltage. The PWR_OK signal will

cause an interrupt to the

UR5HCSPI-06, which guarantees

that the transition is performed in

real time. While in this state, the

UR5HCSPI-06 will perform as

follows:

“S e n d Wa k e -Up Ke ys On ly”

Exit Condition: (LID=1) AND

(WUKO=0) AND (Key Press) ->

“Send All Keys”PWR_OK = 0 ->

“Send No Keys”

(WUKO = 1) AND (Key Press) ->

“Send Wake Up Keys Only”

Entry Conditions: (WUKO=1) AND

(Key or Switch press)

Exit Conditions: Soft Reset -> “Send

All Keys”PWR_OK = 0 -> “Send No

Keys”

Description: This state is entered

upon closing the lid of the device.

While in this state, the encoder will

transmit only the XSW key, which is

located outside the unit. This

feature is designed to

accommodate buttons on the

outside of the box, such as a

microphone button, that need to be

used while the lid is closed.

Description: This state is entered

when the user turns the unit off. A

signal line driven by the host will

notify the UR5HCSPI-06 about this

state transition. While in this state,

the UR5HCSPI-06 will transmit only

keys programmed to be wake-up

keys to the system. It is not

1. The UR5HCSPI-06 will enter the

STOP mode for maximum energy

conservation.

2. Stop mode time-out entry will be

shortened to further conserve

energy.

necessary for the UR5HCSPI-06 to

detect this transition in real time,

since it does not affect any

operation besides buffering

keystrokes.

Copyright Semtech 1997-2000

DOC5-SPI-06-DS-103

www.semtech.com

7

KEY CODES

GIO0 PIN

Key codes range from 01H to 73H

and are arranged as follows:

The UR5HCSPI-06 a general purpose pin that can be programmed as Input,

Output, Debounced or Switch Input. The programmable I/O pin can be

configured to the desired mode through a command from the system. After

the I/O pin is configured, the host system can read or write data to it. If the

pin is configured as a Debounced Switch, it will return scan codes.

Make code = column_number * 8 +

row_number + 1

Break code = Make code OR 80H

In p u t Mo d e

Discrete Switches transmit the

following codes:

While in the Input Mode, the GIO0 pin will detect input signals and report

the input status to the system as required.

XSW = 71H

SW0 = 72H

GIO0 = 73H

Ou t p u t Mo d e

In the Output Mode, the UR5HCSPI-06 will control the output signal level

according to the system command. When the pin is set at Output Mode,

the default output is low.

S w it c h In p u t Mo d e

P in Co n fig u ra t io n s

In Switch Input Mode, the UR5HCSPI-06 will generate an individual make

key code when the switch closes (pin goes low), and a break key code

when the switch returns to open (pin goes to high). The switches generate

key codes outside of those generated by the key matrix, from 71H - 73H.

When the switch closes, the SPICoder^TMwill not fall asleep.

When prototyping, caution should

be taken to ensure that

programming of the GIO0 pin does

not conflict with the circuit

implemented. A series protection

resistor is recommended to be used

for protection over improper

programming of the pin.

In p u t

Ou t p u t

GIX

Circuit

determined by

the specific

application

determined by

the specific

application

After a power-on or soft reset, GIO0

defaults to the Input state.

S w it c h

Series

protection

resistor

The drawing to the right illustrates

the suggested interface to the

general purpose input/output pin.

150K

15K

_WKU

LED

_IOTEST

GIX

Wake-up

interrupt

Fig u re 3 : The suggested interface to the general purpose

input/output pin

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

8

SPI COMMUNICATION CHANNEL

SPI data transfers can be performed at a maximum clock rate of 500 KHz. When the UR5HCSPI asserts the _ATN

signal to the host Master, the data will have already been loaded into the data register waiting for the clocks from

the master. The Slave Select (SS) line can be tied permanently to Ground if the UR5HCSPI is the only slave device

in the SPI network. One _ATN signal is used per each byte transfer. If the host fails to provide clock signals for

successive bytes in the data packet within 120 mS, the transmission will be aborted and a new session will be

initiated by asserting a new ATN signal. In this case, the whole packet will be re-transmitted.

If the SPI transmission fails 20 times consecutively, the synchronization between the master and slave may be lost.

In this case, the UR5HCSPI will enter the reset state.

The UR5HCSPI implements the SPI communication protocol according to the following diagram:

CPOL = 0 ---------- SCK line idles in low state

CPHA = 1 ---------- SS line is an output enable control

_ATN SIGNAL

SCK (CPOL=0)

_SS

SAMPLE INPUT

DATA OUTPUT

?

MSB

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

LSB

(CPHA=1)

When the host sends commands to the keyboard, the UR5HCSPI-06 requires that the minimum and maximum

intervals between two successive bytes be 200 µS and 5 mS respectively.

Fig u re 5 : SPI Communication Protocol

Fig u re 6 : Transmitting Data Waveforms:

Fig u re 7 : Receiving Data Waveforms

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

9

DATA/COMMAND BUFFER

POWER MANAGEMENT UNIT

The UR5HCSPI-06 implements a

data buffer that contains the key

code/command bytes waiting to be

transmitted to the host. If the data

buffer is full, the whole buffer will be

cleared and an "Initialize" command

will be sent to the host. At the

same time, the keyboard will be

disabled until the "Initialize" or

"Initialize Complete" command from

the host is received.

The UR5HCSPI-06 supports two modes of operation. The following table

lists the typical and maximum supply current (no DC loads) for each mode

at 3.3 Volts (+/- 10%).

Cu rre n t

Typ ic a l

Ma x

Un it

De s c rip t io n

RUN

1.5

1

3.0

mA

Entered only while data/commands

are in process and if the LEDs

are blinking

STOP

2.0

20

µA

Entered after 125 mS of inactivity if

LEDs islow

Power consumption of the keyboard sub-system will be determined

primarily by the use of the LEDs. While the UR5HCSPI-06 is in the STOP

mode, an active low Wake-Up Output from the Master must be connected

to the edge-sensitive _WKU pin of the UR5HCSPI-06. This signal will be

used to wake up the UR5HCSPI-06 in order to receive data from the Master

host. The Master host will have to wait a minimum of 5 mS prior to

providing clocks to the UR5HCSPI-06. The UR5HCSPI-06 will enter the

STOP mode after a 125 mS period of keypad and/or host communications

inactivity, or anytime the PWR_OK line is asserted low by the host. Note

that while one or more keys are held pressed, the UR5HCSPI-06 will not

enter the STOP mode until every key is released.

Fig u re 6 : The Power States of the UR5HCSPI-06

- Keyboard

- Switch

- Input transaction

- System wake-up

While processing

current task

and/or LED(s)

are active

S t o p

Ru n

- After 125 mS of

inactivity and LEDs

are off

After Reset

or 125 mS of

inactivity

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

1 0

LRC CALCULATION, (CON’T)

COMMANDS FROM THE UR5HCSPI-06 TO THE HOST, (CON’T)

The following C language function

is an example of an LRC

Re s e n d Re q u e s t

<LRC>

80H

A5H

25H

calculation program. It accepts two

arguments: a pointer to a buffer

and a buffer length. Its return value

is the LRC value for the specified

buffer.

The UR5HCSPI-06 will send this Resend Request Command to the host

when its command buffer is full, or if it detects either a parity error or an

unknown command during a system command transmission.

char Calculate LRC (char buffer,

In p u t /Ou t p u t Mo d e S t a t u s Re p o rt

size buffer)

{

char LRC;

size_t index;

<MODIO>

80H

A7H

xxH

IO number, 0

IO mode: (0=input; 1=output;

2=switch; 3=LED )

/*

* Init the LRC using the first two

<LRC>

xxH

message bytes.

*/

LRC = buffer [0] ^ buffer [1];

The UR5HCSPI-06 will send the I/O Mode Status Report to the host when it

receives the I/O Mode Status Request Command from the host, in order to

report the status of the GIO0 pin.

/*

* Update the LRC using the

In p u t /Ou t p u t Da t a Re p o rt

remainder of the buffer.

*/

for (index = 2; index < buffer; index

++)

LRC ^ = buffer[index];

/*

* If the MSB is set then clear the

MSB and change the next most

significant bit

<MODIO>

<LRC>

80H

A8H

xxH

IO number, 0

IO data: ( 0=low, 1=high )

The UR5HCSPI-06 will send the I/O Data Report to the host when it receives

the I/O Data Request Command from the host.

*/

if (LRC & 0x80)

LRC ^ = 0xC0;

/* * Return the LRC value for the

buffer.*/}

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

1 1

COMMANDS FROM THE HOST TO THE UR5HCSPI-06

Co m m a n d s fro m t h e Ho s t - S u m m a ry

Co m m a n d Na m e

Initialize

Initialization Complete

Heartbeat Request

Identification Request

Resend Request

Input/Output Mode Modify

Output Data to I/O pin

Set Wake-Up Keys

Co d e

AOH

A1H

A2H

F2H

A5H

A7H

A8H

A9H

De s c rip t io n

Causes the UR5HCSPI-06 to enter the power-on state

Issued as a response to the “Initialize Request”

The UR5HCSPI-06 will respond with “Heartbeat Response”

The UR5HCSPI-06 will respond with “Identification Response”

Issued upon error during the reception of a packet

The UR5HCSPI-06 will modify or report the status of the GIO0 pin

The UR5HCSPI-06 will output a signal to the GIO0 pin

Defines which keys are “wake-up” keys

Each command to UR5HCSPI-06 is composed of a sequence of codes. All commands start with <ESC> code

(1BH) and end with the LRC code (bitwise exclusive OR of all bytes).

COMMANDS FROM THE HOST TO THE UR5HCSPI-06 ANALYTICALLY

In it ia lize

<ESC>

<INIT>

<LRC>

1BH

A0H

7BH

When the UR5HCSPI-06 receives this command, it will clear all buffers and return to the power-on state.

In it ia liza t io n Co m p le t e

<ESC>

<LRC>

1BH

A1H

7AH

When the UR5HCSPI-06 receives this command, it will enable transmission of keyboard data. Keyboard data

transmission is disabled if the TX output buffer is full (32 bytes). Note that if the transmit data buffer gets full the

encoder will issue an "Initialize Request" to the host.

He a rt b e a t Re q u e s t

<ESC>

<LRC>

1BH

A2H

79H

When the UR5HCSPI-06 receives this command, it will reply with the Heartbeat Response Report.

Id e n t ific a t io n Re q u e s t

<ESC>

<ID>

<LRC>

1BH

F2H

29H

The UR5HCSPI-06 will reply to this command with the Identification Response Report.

Copyright Semtech 1997-2001

DOC5-SPI-06-DS-103

www.semtech.com

1 2

COMMANDS FROM THE HOST TO THE UR5HCSPI-06, (CON’T)

S e t Wa k e -Up Ke ys

<ESC>

<COL0>

R6 R5 R4 R3 R2 R1 R0 Bitmap: 0-

enabled, 1-disabled)

I/O Mo d e Mo d ify

<ESC>

1BH

A9H

xxH

1BH

A7H

xxH

<MODIO>

(R7

IO number: 0

IO mode: ( 0=input, 1=output,

2=switch, 3=LED, 4=current mode state

request)

<COL1>

<COL2>

<COL3>

<COL4>

<COL5>

<COL6>

<COL7>

<COL8>

<COL9>

<COL10>

<COL11>

<COL12>*

xxH

<LRC>

xxH

When UR5HCSPI-06 receives this command, it will change the I/O pin's

mode accordingly. If the <IO MODE> =4, the UR5HCSPI-06 will send the

I/O Mode Status Report to the host.

Ou t p u t Da t a t o I/O P in :

<ESC>

<MODIO>

I/O data request)

<LRC>

When UR5HCSPI-06 receives this command, it will change the value of the

output pin accordingly. If the addressed pin is not configured as an output

pin, the command will be ignored. If <IO DATA> =2, the UR5HCSPI-06 will

respond by issuing the I/O Data Status Report to the host.

1BH

A8H

xxH

IO number: 0

IO data: ( 0=low, 1=high, 2=current

(*UR5HCSPI-06-06-XX only)

<COL13>* xxH

(*UR5HCSPI-06-06-XX only)

<SWITCHES> xxH

(where SWITCHES bit assignments

are = x x x x x GIO0 SW0 XSW)

xxH

<LRC>

xxH

The "Set Wake-Up Keys" command

is used to disable specific keys

from waking up the host. Using this

command, the host can set only a

group of keys. For this IC, data in

bytes <COL12> and <COL 13> is

not relevant, but these two bytes

must be present in the packet in

order to preserve the packet

structure.

DOC5-SPI-06-DS-103

www.semtech.com

1 3

KEY MAP FOR THE FUJITSU FKB1406

Co lu m n s (C0 –C1 3 )

0

1

`

2

3

4

5

6

7

8

9

10

11

12

13

LAlt

LCtrl

FN

Esc

Del

1

F1

2

F2

T

9

F9

Y

0

F10

U

-

+

Bk

Enter

BkSp

NmLk

I

0

1

2

3

4

\

LSft

RShift

Pad 4

Pad 5

PgDn

TAB

Z

Q

W

E

R

O

Pad 6

P

Ins

[

]

Pause

ScrLk

CapLk

K

Pad 2

L

;

‘

Pad 3

PrtScr

SysReq

PgUp

A

S

D

V

F

G

H

J

/

Pad 1

Home

Spc

X

C

B

N

M

,

.

Pad 0

5

6

3

F3

4

F4

5

F5

6

F6

7

8

Prog

F7

F8

End

KEYBOARD LAYOUT FOR FUJITSU FKB1406

_

7

8

9

!

@

#

$

%

^

&

(

)

+

Esc

*

Num

Lk

-

1

F2

2

F2

3

F3

4

F4

5

F5

6

F6

7

F7

8

F8

9

F9 0 F10

= Bk

Prog

_

{

}

5

Q W E R T Y U⁴

I

O⁶P

Scr

Lk

Pause

Ins

]

[

+

Prt

Cap

Lock

:

;

Del

Fn

"

'

1

Sys

Req

Enter

A S D F G H J

K ²L³

Scr

.

/

>

?

/

<

Shift

Alt

Shift

0

Z X C V B N M

,

.

:

;

~

`

Ctrl

Home PgUp PgDn

End

DOC5-SPI-06-DS-103

www.semtech.com

1 4

SAMPLE CONFIGURATION UR5HCSPI-06-FB

W K U

4 2

I O T E S T

1 8

O S C I

3 7

V D D

V p p

3 8

4 3

O S C O

3 6

V o u t

R E S E T

4 1

V i n

G N D

S i g n a l

P o w e r O K

S i g n a l

p

e U W a k

DOC5-SPI-06-DS-103

www.semtech.com

1 5

IMPLEMENTATION NOTES FOR THE UR5HCSPI-06

The following notes pertain to the suggested schematic found on the

previous page.

The Built-in Oscillator on the UR5HCSPI-06 requires the attachment of the

2.00 MHz Ceramic Resonators with built-in Load Capacitors.. You can use

either an AVX, part number PBRC-2.00 BR; or a Murata part number

CSTCC2.00MG ceramic resonator.

It may also be possible to operate with the 2.00 MHz Crystal, albeit with

reduced performance. Due to their high Q, the Crystal oscillator circuits

start-up slowly. Since the SPICoder^TMconstantly switches the clock on and

off, it is important that the Ceramic Resonator is used (it starts up much

quicker than the Crystal). Resonators are also less expensive than Crystals.

Also, if Crystal is attached, two Load Capacitors (33pF to 47pF) should be

added, a Capacitor between each side of the Crystal and ground.

In both cases, using Ceramic Resonator with built-in Load Capacitors, or

Crystal with external Load Capacitors, a feedback Resistor of 1 Meg should

be connected between OSCIN and OSCOUT.

Troubleshoot the circuit by looking at the Output pin of the Oscillator. If the

voltage is half-way between Supply and Ground (while the Oscillator should

be running) --- the problem is with the Load Caps / Crystal. If the voltage is

all the way at Supply or Ground (while the Oscillator should be running) ---

there are shorts on the PCB.

Note: When the Oscillator is intentionally turned OFF, the voltage on the

Output pin of the Oscillator is High (at the Supply rail).

DOC5-SPI-06-DS-103

www.semtech.com

1 6

ELECTRICAL SPECIFICATIONS

Ab s o lu t e Ma x im u m Ra t in g s

Ra t in g s

Supply Voltage

S ym b o l

Va lu e

Un it

V

Vdd

Vin

I

-0.3 to +7.0

Vss -0.3 to Vdd +0.3

25

Input Voltage

Current Drain per Pin

(not including Vss or Vdd)

Operating Temperature

UR5HCSPI-06

mA

Ta

T low to T high

-40 to +85

-65 to +150

° C

Storage Temperature Range

Tstg -

Th e rm a l Ch a ra c t e ris t ic s

Ch a ra c t e ris t ic

Thermal Resistance

Plastic

S ym b o l

Tja

Va lu e

Un it

°C per W

60

70

PLCC

DC Ele c t ric a l Ch a ra c t e ris t ic s (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted)

Ch a ra c t e ris t ic

Output Voltage (I load<10µA)

S ym b o l

Vol

Min

Typ

Ma x

0.1

Un it

V

Voh

Vol:

Vih

Vil

Ipp

Vdd–0.1

Vdd–0.8

Output High Voltage (I load=0.8mA)

Output Low Voltage (I load=1.6mA)

Input High Voltage

Input Low Voltage

User Mode Current

Data Retention Mode (0 to 70°C)

Supply Current (Run)

(Wait)

V

mA

V

mA

µA

pF

0.4

Vdd

0.2xVdd

10

0.7xVdd

Vss

5

Vrm

Idd

2.0

1.53

0.711

2.0

3.0

1.0

20

+/-10

+/- 1

12

(Stop)

I/O Ports Hi-Z Leakage Current

Input Current

I/O Port Capacitance

Iil

Iin

Cio

8

Co n t ro l Tim in g (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted)

Ch a ra c t e ris t ic

S ym b o l

Min

Ma x

Un it

Frequency of Operation

Crystal Option

External Clock Option

Cycle Time

Crystal Oscillator Startup Time

Stop Recovery Startup Time

RESET Pulse Width

Interrupt Pulse Width Low

Interrupt Pulse Period

OSC1 Pulse Width

fosc

MHz

2.0

dc

1000

tcyc

toxov

tilch

trl

tlih

tilil

ns

100

ms

tcyc

ns

tcyc

ns

8

250

*

toh, tol

200

*The minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine plus 21 tcyc.

DOC5-SPI-06-DS-103

www.semtech.com

1 7

SPICODER^TMBILL OF MATERIALS

UR5 HCS P I-0 6 -FB

Qu a n t it y

Ma n u fa c t u re

P a rt #

De s c rip t io n

15K Resistor

150K Resistor

1M Resistor

1.5 Resistors

IC Volt Detector CMOS 4.3V SOT23, for 5V Operation

IC Volt Detector CMOS 2.7V SOT23, for 3.3V Operation

2.00MHZCeramic Resonator with Built in Capacitors, SMT

3

1

2

1

Generic

TELCOM

15K

150K

1M

1.5K

TC54VC4302ECB713

TC54VC2702ECB713

PBRC-2.00BR

1

AVX

Re vis e d 7 /1 4 /9 9

DOC5-SPI-06-DS-103

www.semtech.com

1 8

This Page Left Intentionally Blank

DOC5-SPI-06-DS-103

www.semtech.com

1 9

Fo r s a le s in fo rm a t io n

a n d p ro d u c t lit e ra t u re ,

c o n t a c t :

HID & System Mgmt Division

Semtech Corporation

568 Broadway

New York, NY 10012

h id in fo @s e m t e c h .c o m

h t t p ://w w w .s e m t e c h .c o m

212 226 2042 Telephone

212 226 3215 Telefax

Semtech Western Regional Sales

805-498-2111 Telephone

805-498-3804 Telefax

Semtech Central Regional Sales

972-437-0380 Telephone

972-437-0381 Telefax

Semtech Eastern Regional Sales

203-964-1766 Telephone

203-964-1755 Telefax

Semtech Asia-Pacific Sales Office

+886-2-2748-3380 Telephone

+886-2-2748-3390 Telefax

Semtech Japan Sales Office

+81-45-948-5925 Telephone

+81-45-948-5930 Telefax

Semtech Korea Sales Sales

+82-2-527-4377 Telephone

+82-2-527-4376 Telefax

Northern European Sales Office

+44 (0)2380-769008 Telephone

+44 (0)2380-768612 Telefax

Southern European Sales Office

+33 (0)1 69-28-22-00 Telephone

+33 (0)1 69-28-12-98 Telefax

Central European Sales Office

+49 (0)8161 140 123 Telephone

+49 (0)8161 140 124 Telefax

Zero-Power, SPICoder and Self-Power Management are trademarks

of Semtech Corporation. Semtech is a registered trademark of

Semtech Company. All other trademarks belong to their respective

companies.

INTELLECTUAL PROPERTY DISCLAIMER

This specification is provided "as is" with no warranties whatsoever

including any warranty of merchantability, fitness for any particular

purpose, or any warranty otherwise arising out of any proposal,

specification or sample. A license is hereby granted to reproduce

and distribute this specification for internal use only. No other

license, expressed or implied to any other intellectual property

rights is granted or intended hereby. Authors of this specification

disclaim any liability, including liability for infringement of proprietary

rights, relating to the implementation of information in this

specification. Authors of this specification also do not warrant or

represent that such implementation(s) will not infringe such rights.

DOC5-SPI-06-DS-103

2 0

www.semtech.com


型号：	UR5HCSPI-06-FN
厂家：	SEMTECH CORPORATION
描述：	Zero-PowerTM Keyboard Encoder & Power Management IC for H/PCs 零PowerTM键盘编码器和电源管理IC，用于H / PC的编码器 PC
文件：	总20页 (文件大小：144K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UR5HCSPI-06-FN [SEMTECH]

相关型号：

UR5HCSPI-06-XX-FA

UR5HCSPI-06-XX-FB

UR5HCSPI-06-XX-FN

UR5HCSPI-FB

UR5HCSPI-FN

UR5HCSPI-SA-FA

UR5HCSPI-SA-FB

UR5HCSPI-SA-FN

UR5HCSPI-SA01

UR5HCSPI-SA01-FA

UR5HCSPI-SA01-FB

UR5HCSPI-SA01-FN