LH5316P00B [SHARP]
CMOS 16M (2M x 8/1M x 16) MROM; CMOS 16M （ 2M ×8 / 1M ×16 ） MROM
| 型号： | LH5316P00B |
| 厂家： | 
SHARP ELECTRIONIC COMPONENTS |
| 描述： | CMOS 16M (2M x 8/1M x 16) MROM |
| 文件： | 总6页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LH5316P00B
CMOS 16M (2M × 8/1M × 16) MROM
FEATURES
PIN CONNECTIONS
• 2,097,152 × 8 bit organization
(Byte mode: BYTE = VIL)
44-PIN SOP
TOP VIEW
1,048,576 × 16 bit organization
(Word mode: BYTE = VIH)
NC
A18
A17
A7
1
2
3
4
5
6
44
43
42
41
40
39
NC
A19
A8
• Access time: 120 ns (MAX.)
A9
A6
A10
A11
• Supply current:
A5
– Operating: 70 mA (MAX.)
– Standby: 100 µA (MAX.)
A4
A3
7
8
38
37
A12
A13
A2
A1
9
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A14
• TTL compatible I/O
• Three-state output
• Single +5 V power supply
• Static operation
10
11
12
13
14
15
16
17
18
19
20
21
22
A15
A0
A16
CE
GND
OE
D0
BYTE
GND
D15/A-1 (NOTE)
D7
• Package:
D8
D14
D6
44-pin, 600-mil SOP
D1
D9
D13
D5
• Item related with COCOM regulation:
– Non programmable
D2
D10
D3
D12
D4
– Not designed or rated as radiation
hardened
D11
VCC
– CMOS process (P type silicon
substrate)
NOTE: The D15/A-1 pin becomes LSB address input (A-1)
when the BYTE pin is set to be LOW in byte mode and
data output (D15) when set to be HIGH in word mode.
The input state of BYTE pin can not be changed during
operation. The BYTE pin must be set to either GND or VCC
DESCRIPTION
.
The LH5316P00B is a 16M-bit mask-programmable
ROM organized as 2,097,152 × 8 bits (Byte mode) or
1,048,576 × 16 bits (Word mode) that can be selected
by a BYTE input pin. It is fabricated using silicon-gate
CMOS process technology.
5316P00B-1
Figure 1. Pin Connections
1
LH5316P00B
CMOS 16M (2M x 8/1M x 16) MROM
A19 43
A18
A17
2
3
A16 34
A15 35
MEMORY
MATRIX
(2,097,152 x 8)
(1,048,576 x 16)
A14
36
A13 37
A12
31 D15
29 D14
27 D13
25 D12
22 D11
38
A11 39
A10 40
41
42
4
A9
A8
20
D10
18 D9
16
A7
D8
A6
A5
A4
A3
A2
A1
A0
5
30 D7
28 D6
6
COLUMN SELECTOR
7
26
24
D5
D4
8
9
21 D3
19 D2
10
11
17
15
D1
D0
CE
BUFFER
TIMING
GENERATOR
12
SENSE AMPLIFIER
CE
OE
BUFFER
OE
14
33
BYTE/WORD
SWITCHOVER
CIRCUIT
ADDRESS
BUFFER
BYTE
31
A-1
23
VCC
13 32
GND
5316P00B-2
Figure 2. LH5316P00B Block Diagram
PIN DESCRIPTION
SIGNAL
PIN NAME
SIGNAL
PIN NAME
A-1 - A19
D0 - D15
Address input
Data output
OE
VCC
GND
NC
Output enable input
Power supply
Ground
×8bit / ×16 bit
(Byte/word) mode
select input
BYTE
CE
No connection
Chip enable input
2
CMOS 16M (2M x 8/1M x 16) MROM
LH5316P00B
TRUTH TABLE
DATA OUTPUT
ADDRESS INPUT
A-1
(D15
SUPPLY
CURRENT
CE
OE
BYTE
)
D0 - D7
D8 - D15
LSB
MSB
H
L
X
H
L
X
X
H
L
X
X
High-Z
High-Z
D0 - D7
D0 - D7
D8 - D15
High-Z
High-Z
D8 - D15
High-Z
High-Z
Standby (ISB
Operating
Operating
Operating
Operating
)
L
A0
A-1
A-1
A19
A19
A19
L
L
L
L
L
L
H
NOTES:
X = Don’t care; High-Z = High-impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
UNIT
Supply voltage
VCC
VIN
-0.3 to +7.0
-0.3 to VCC + 0.3
-0.3 to VCC + 0.3
0 to +70
V
V
Input voltage
Output voltage
VOUT
TOPR
TSTG
V
Operating temperature
Storage temperature
°C
°C
-65 to +150
RECOMMENDED OPERATING CONDITIONS (TA = 0 to +70°C)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Supply voltage
VCC
4.5
5.0
5.5
V
DC ELECTICAL CHARACTERISTICS (V = 5 V ±10%, T = 0 to +70°C)
CC
A
PARAMETER
SYMBOL
VIH
CONDITIONS
MIN.
2.2
MAX.
CC + 0.3
0.8
UNIT
V
NOTE
Input ‘High’ voltage
Input ‘Low’ voltage
V
VIL
-0.3
2.4
V
Output ‘High’ voltage
Output ‘Low’ voltage
Input leakage current
Output leakage current
VOH
IOH = -400 µA
V
VOL
IOL = 2.0 mA
VIN = 0 V to VCC
VOUT = 0 V to VCC
tRC = 120 ns
tRC = 1 µs
0.4
10
10
70
55
2
V
| ILI
|
µA
µA
| ILO
|
1
2
ICC1
ICC2
ISB1
ISB2
CIN
Operating current
Standby current
mA
CE = VIH
mA
µA
pF
pF
CE = VCC - 0.2 V
100
10
10
Input capacitance
Output capacitance
NOTES:
f = 1 MHz, tA = 25°C
COUT
1. CE = VIH, OE = VIH, output is open
2. IN = VIH, VIL, CE = VIL, output is open
V
3
LH5316P00B
CMOS 16M (2M x 8/1M x 16) MROM
AC ELECTICAL CHARACTERISTICS (V = 5 V ±10%, T = 0 to +70°C)
CC
A
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
NOTE
Read cycle time
tRC
tAA
tACE
tOE
120
ns
ns
ns
ns
ns
ns
ns
Address access time
Chip enable access time
Output enable delay time
Output hold time
120
120
60
tOH
5
tCHZ
tOHZ
60
60
Output floating time
1
NOTE:
1. Determined by the time for the output to be opened. (Irrespective of output voltage)
AC TEST CONDITIONS
PARAMETER
RATING
Input voltage amplitude
Input rise/fall time
0.6 V to 2.4 V
10 ns
Input signal fall time
Input reference level
Output reference level
Output load condition
10 ns
1.5 V
1.5 V
1TTL + 100 pF
CAUTION
It is recommended that a decoupling capacitor be connected between VCC and GND-Pin.
4
CMOS 16M (2M x 8/1M x 16) MROM
LH5316P00B
tRC
A-1 - A19
tAA
(NOTE)
CE
tCHZ
tACE
(NOTE)
OE
tOHZ
tOE
(NOTE)
tOH
D0 - D7
DATA VALID
NOTE: The output data becomes valid when the
last intervals, tAA, tACE, or tOE, have concluded.
5316P00B-3
Figure 3. Byte Mode (BYTE = V )
IL
tRC
A0 - A19
tAA
(NOTE)
CE
tCHZ
tACE
(NOTE)
OE
tOE
tOHZ
(NOTE)
tOH
(D0 - D15
)
DATA VALID
NOTE: The output data becomes valid when the
last intervals, tAA, tACE, or tOE, have concluded.
5316P00B-4
Figure 4. Word Mode (BYTE = V )
IH
5
LH5316P00B
CMOS 16M (2M x 8/1M x 16) MROM
PACKAGE DIAGRAM
44SOP (SOP044-P-0600)
1.27 [0.050]
TYP.
0.50 [0.020]
0.30 [0.012]
44
23
13.40 [0.528] 16.40 [0.646]
13.00 [0.512] 15.60 [0.614]
14.40 [0.567]
SEE
DETAIL
1
22
2.9 [0.114]
2.5 [0.098]
0.20 [0.008]
0.10 [0.004]
28.40 [1.118]
28.00 [1.102]
DETAIL
1.275 [0.050]
0.15 [0.006]
1.275 [0.050]
0.25 [0.010]
0.05 [0.002]
2.9 [0.114]
2.5 [0.098]
3.25 [0.128]
2.45 [0.096]
0.25 [0.010]
0.05 [0.002]
0 - 10°
0.80 [0.031]
1.275 [0.050]
MAXIMUM LIMIT
MINIMUM LIMIT
DIMENSIONS IN MM [INCHES]
44SOP
ORDERING INFORMATION
LH5316P00B
Device Type
N
Package
44-pin, 600-mil SOP (SOP044-P-600)
CMOS 16M (2M x 8 or 1M x 16) Mask-Programmable ROM
Example: LH5316P00N (CMOS 16M (2M x 8 or 1M x 16) Mask-Programmable ROM, 44-pin, 600-mil SOP)
5316P00B-5
6
相关型号：
©2020 ICPDF网 联系我们和版权申明