SF1565 [SIFIRST]
Highly Integrated Current Mode PWM Controller;
| 型号： | SF1565 |
| 厂家： | 
SIFIRST |
| 描述： | Highly Integrated Current Mode PWM Controller |
| 文件： | 总12页 (文件大小：661K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SF1565
Highly Integrated Current Mode PWM Controller
FEATURES
GENERAL DESCRIPTION
SF1565 is a high performance, highly integrated
current mode PWM controller for medium to large
offline flyback converter applications.
◆ Built-in Soft Start Function
◆ Very Low Startup Current
◆ Frequency Reduction and Burst Mode Control
for Energy Saving
In SF1565, the PWM switching is internally trimmed
to tight range. To improve EMI performance, the IC
integrates frequency shuffling function to reduce
conduction EMI emission of a power supply. The IC
also integrates Constant Power Limiting block to
achieve constant output power limit from 90VAC to
264VAC.
Under light load conditions, a green mode function
can continuously decrease the switching frequency.
Under zero-load conditions, the power supply enters
into burst mode and provides excellent efficiency
without audio noise generated. This green mode
function enables power supplies to meet international
power conservation requirements.
◆ Built-in Frequency Shuffling
◆ Programmable Switching Frequency
◆ Built-in Synchronous Slope Compensation
◆ Cycle-by-Cycle Current Limiting
◆ Pins Floating Protection
◆ High Voltage CMOS Process with Excellent
ESD Protection
◆ Current Mode Control
◆ Built-in Leading Edge Blanking (LEB)
◆ Constant Power Limiting
◆ Audio Noise Free Operation
◆ VDD OVP & Clamp
◆ VDD Under Voltage Lockout (UVLO)
SF1565 integrates functions and protections of Under
Voltage Lockout (UVLO), VDD Over Voltage
Protection (OVP), Soft Start, External Programmable
Over Temperature Protection (OTP), Cycle-by-cycle
Current Limiting (OCP), Over Load Protection (OLP),
Pins Floating Protection, RI Pin Short-to-GND
Protection, GATE Clamping, VDD Clamping, Leading
Edge Blanking (LEB).
APPLICATIONS
Offline AC/DC Flyback Converter for
◆ AC/DC Power Adaptors
◆ Open-frame SMPS
◆ Print Power, Scanners, and Motor Drivers
In SF1565, the all protection functions are auto-
recovery mode protection.
SF1565 is available in SOP-8 and DIP-8 packages.
TYPICAL APPLICATION
EMI
AC IN
Filter
DC Out
SF1565
GND
1
8
GATE
FB
VIN
RI
2
3
4
7
6
5
VDD
CS
TL431
NTC
RT
©SiFirst Technology
- 1 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
Pin Configuration
GATE
VDD
1
2
3
4
8
7
6
5
GND
FB
DIP8/
SOP8
VIN
RI
CS
RT
Ordering Information
Part Number
SF1565SG
Top Mark
SF1565SG
SF1565SG
SF1565DP
Package
Tape & Reel
SOP8
SOP8
DIP8
Green
Green
RoHS
SF1565SGT
SF1565DP
Yes
Marking Information
YWW: Year&Week code
S F 1 5 6 5 S G
Y WW
YWW: Year&Week code
S F 1 5 6 5 D P
Y WW
©SiFirst Technology
- 2 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
Block Diagram
4
RI
RI short/floating
protection
Soft Gate
Driver
GATE
8
Trimmed Voltage &
Current Reference
S
R
Q
Q
Green Mode
operation
OSC
VIN
Frequency Shuffling
3
LEB
POR
OCP
UVLO
& Compensation
CS
6
VDD
PWM
&
7
Logic
Slope
compensation
OVP
33V
5.9V
25V
CS Floating
Protection
FB
2
GND
Soft start
1
70uA
Burst Mode
Control
RT
OTP
5
4.4V
OLP
82ms Delay
1.065V
Pin Description
Pin Num
Pin Name I/O Description
1
GND
P
IC ground pin.
2
FB
I
Voltage feedback pin. The loop regulation is achieved by connecting a
photo-coupler to this pin. PWM duty cycle is generated by this pin voltage
and the current sense signal at Pin 6.
3
4
5
VIN
RI
I
I
I
This pin is connected to the rectified line input via a large value resistor.
The function of the pin is for startup and line voltage sensing.
Set the switching frequency by connecting a resistor between RI and
GND. This pin has floating/short-to-GND protection.
This pin is for over temperature protection by connecting an external NTC
resistor to ground. Once the pin voltage drops below a fixed limit of
1.065V, PWM output will be disabled.
RT
6
7
8
CS
VDD
GATE
I
P
O
Current sense input pin.
IC power supply pin.
Totem-pole gate driver output to drive the external MOSFET.
Absolute Maximum Ratings (Note 1)
Parameter
VDD/VIN DC Supply Voltage
Value
33
Unit
V
VDD DC Clamp Current
10
mA
©SiFirst Technology
- 3 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
GATE pin
FB, RI, RT, CS voltage range
20
-0.3 to 7
90
150
150
-40 to 85
-65 to 150
260
V
V
Package Thermal Resistance (DIP-8)
Package Thermal Resistance (SOP-8)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10sec.)
ESD Capability, HBM (Human Body Model)
ESD Capability, MM (Machine Model)
oC/W
oC/W
oC
oC
oC
oC
3
250
kV
V
Recommended Operation Conditions (Note 2)
Parameter
Supply Voltage, VDD
Operating Frequency
Operating Ambient Temperature
Value
11 to 23
50 to 130
-40 to 85
Unit
V
kHz
oC
ELECTRICAL CHARACTERISTICS
(TA = 25OC, RI=24K ohm, VDD=18V, if not otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max Unit
Supply Voltage Section (VDD Pin)
I_Startup
VDD Start up Current VDD =15V, Measure
current into VDD
5
20
uA
I_VDD_Op
UVLO(ON)
Operation Current
VDD Under Voltage
Lockout Exit (Startup)
VDD Under Voltage
Lockout Enter
VDD Over Voltage
Protection trigger
VDD OVP Hysteresis
VDD Zener Clamp
Voltage
VFB=3V,GATE=1nF
2.5
16.5
3.5
17.5
mA
V
15.5
9.5
UVLO(OFF)
10.5
25
11.5
26.5
V
V
VDD_OVP_ON
23.5
VDD_OVP_Hys
VDD_Clamp
2
33
V
V
I(VDD ) = 5mA
T_Softstart
System Soft Start
Time
3
mSec
Feedback Input Section(FB Pin)
AVCS
PWM Input Gain
ΔVFB /ΔVcs
2.8
5.9
V/V
V
VFB_Open
FB Open Voltage
IFB_Short
VFB_min_duty
VTH_PL
FB short circuit
current
FB under voltage gate
clock is off.
Power Limiting FB
Threshold Voltage
Power limiting
Debounce Time
Input Impedance
Short FB pin to GND,
measure current
1.2
1.0
4.4
82
5
mA
V
V
TD_PL
Note 3
mSec
Kohm
ZFB_IN
Current Sense Input Section (CS Pin)
T_blanking
Vth_OC_max
TD_OC
SENSE Input Leading
Edge Blanking Time
Internal current
limiting threshold
Over Current
250
0.9
nSec
V
I(VIN)=0
0.85
60
0.95
70
GATE=1nF
120
nSec
Detection and Control
Delay
Oscillator Section (RI Pin)
FOSC
Normal Oscillation
65
KHZ
©SiFirst Technology
- 4 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
Frequency
∆F(shuffle)/Fosc
∆f_Temp
Frequency shuffling
range
Frequency
Temperature Stability
Frequency Voltage
Stability
Note 4
-4
4
%
%
%
-40oC to 125oC (Note 4)
VDD = 12-23V (Note 4)
5
5
∆f_VDD
Duty_max
RI_range
V_RI_open
F_BM
Maximum Duty cycle
Operating RI Range
RI open voltage
Burst Mode Base
Frequency
75
12
80
24
2.0
22
85
60
%
Kohm
V
KHz
Over Temperature Protection (RT Pin)
Output Current of RT
Pin
I_RT
70
uA
OTP
Voltage
Threshold
VTH_OTP
1.015 1.065 1.115
V
VTH_OTP_OFF
VTH_OTP_Hys
V_RT_Open
OTP Release Voltage
OTP Hysteresis
RT Pin Open Voltage
1.165
0.1
4.6
V
V
V
Gate Drive Output (GATE Pin)
VOL
VOH
Gate_Clamp
Output Low Level
Output High Level
Output Clamp Voltage VDD=24V
Level
Io = 20 mA (sink)
Io = 20 mA (source)
0.3
V
V
V
11
16
T_r
T_f
Output Rising Time
Output Falling Time
GATE = 1nF
GATE = 1nF
120
50
nSec
nSec
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2. The device is not guaranteed to function outside its operating conditions.
Note 3. The OLP debounce time is proportional to the period of switching cycle.
Note 4. Guaranteed by design.
©SiFirst Technology
- 5 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
CHARACTERIZATION PLOTS
©SiFirst Technology
- 6 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
©SiFirst Technology
- 7 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
OPERATION DESCRIPTION
SF1565 is a high performance, highly integrated
current mode PWM controller for medium to large
offline flyback converter applications. The built-in
advanced energy saving with high level protection
features improves the SMPS reliability and
performance without increasing the system cost.
PWM Frequency
(RI=24kΩ)
65kHz
◆ Low Startup Current
&
Operating
Current
The typical startup current of SF1565 is only about
5uA so that a high resistance startup resistor can
be used to minimize power loss. For an AC/DC
adapter with universal input range, a 2M Ohm,
1/8W startup resistor can be used to provide a fast
startup and yet low power dissipation design
solution.
22kHz
VFB
0
Normal
mode
Burst
mode
Frequency
Reduction mode
Fig.1
The operating current in SF1565 is as small as
2.3mA (typical). The small operating current results
in higher efficiency and reduces the VDD hold-up
capacitance requirement.
◆ Burst Mode Control
When the loading is very small, the system enters
into burst mode. When VFB drops below Vskip,
SF1565 will stop switching and output voltage
starts to drop, which causes the VFB to rise. Once
VFB rises above Vskip, switching resumes. Burst
mode control alternately enables and disables
switching, thereby reducing switching loss in
standby mode.
◆ Soft Start
SF1565 features an internal 3ms (typical) soft start
that slowly increases the threshold of cycle-by-
cycle current limiting comparator during startup
sequence. It helps to prevent transformer saturation
and reduce the stress on the secondary diode
during startup. Every restart attempt is followed by
a soft start activation.
Vout
◆ Oscillator with Frequency Shuffling
Connecting a resistor from RI pin to GND according
to the equation below to program the normal
switching frequency:
VFB
1560
FOSC
KHz
RI(K)
It can typically operate between 50kHz to 130kHz.
To improve system EMI performance, SF1565
operates the system with 4% frequency shuffling
around setting frequency.
GATE
◆ Leading Edge Blanking (LEB)
Each time the power MOSFET is switched on, a
turn-on spike occurs across the sensing resistor.
The spike is caused by primary side capacitance
and secondary side rectifier reverse recovery. To
avoid premature termination of the switching pulse,
an internal leading edge blanking circuit is built in.
During this blanking period (250ns, typical), the
PWM comparator is disabled and cannot switch off
the gate driver. Thus, external RC filter with a small
time constant is enough for current sensing.
GATE
ON
GATE
OFF
Fig.2
◆ Synchronous Slope Compensation
In the conventional application, the problem of the
stability is a critical issue for current mode
controlling, when it operates in higher than 50% of
the duty-cycle. In SF1565, the slope compensation
circuit is integrated by adding voltage ramp onto the
current sense input voltage for PWM generation.
This greatly improves the close loop stability at
CCM and prevents the sub-harmonic oscillation
and thus reduces the output ripple voltage.
◆ Frequency Reduction for Green Mode
Operation
When the loading is light, the IC will automatically
reduce the PWM switching frequency to achieve
high efficiency. In the whole frequency reduction
process, there is no audio noise generated.
©SiFirst Technology
- 8 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
◆ Over Load Protection (OLP) / Over
◆ Constant Power Limiting
Current Protection (OCP) / Over Power
In flyback converter applications, the GATE drive
delay can cause system OPP (Over Power Point)
to change according to the AC line input voltage. In
SF1565, an OPP compensation block is integrated
to achieve constant max. output power capability
over universal AC input range. Since the pin VIN is
connected to the rectified input line voltage through
the startup resistor, the current flowed into the VIN
pin indicates the line voltage. Using the information
of VIN pin current, the IC adjusts the cycle-by-cycle
OCP threshold according to the following equation:
Protection
Protection (OLP)
(OPP)
/
Open
Loop
When OLP/OCP/OPP/Open Loop occurs, a fault is
detected. If this fault is present for more than 82ms
(typical), the protection will be triggered, the IC will
experience an auto-recovery mode protection as
mentioned above, as shown in Fig.4. The 82ms
delay time is to prevent the false trigger from the
power-on and turn-off transient.
5.9V
VTH_OCP
V 0.9 0.0278 RI I(VIN)
PWM
FB
2
In this way, the system OPP variation can be
compensated automatically.
◆ Over Temperature Protection
OLP/OCP/
4.4V
82ms
Delay
OPP
By connecting a NTC resistor in series with a
regular resistor between RT and GND, the over
temperature protection (OTP) can be realized. NTC
resistor value becomes lower when the ambient
temperature rises. With the fixed internal current IRT
flowing through the resistors, the voltage at RT pin
becomes lower at high temperature. The internal
OTP comparator is triggered and shut down the
PWM signal when the sensed input voltage is lower
than the comparator threshold voltage.
SF1565
VFB
5.9V
VTH_PL=4.4V
OLP/OCP/OPP
Shutdown delay time
OTP is an auto recovery mode protection (as
mentioned below).
Fig.4
◆ VDD OVP(Over Voltage Protection)
VDD OVP (Over Voltage Protection) is
implemented in SF1565 and it is a protection of
auto recovery mode (as mentioned below).
◆ Auto Recovery Mode Protection
As shown in Fig.3, once a fault condition is
detected, switching will stop. This will cause VDD to
fall because no power is delivered form the
auxiliary winding. When VDD falls to UVLO(off)
(typical 10.5V), the protection is reset and the
operating current reduces to the startup current,
which causes VDD to rise, as shown in Fig.3.
However, if the fault still exists, the system will
experience the above mentioned process. If the
fault has gone, the system resumes normal
operation. In this manner, the auto restart can
alternatively enable and disable the switching until
the fault condition is disappeared.
◆ Pins Floating Protection and RI Pin
Short-to-GND Protection
In SF1565, if pin floating situation or RI pin short-to-
GND occurs, the protection is triggered immediately
and the system will experience the process of auto-
recovery mode protection.
◆ Soft Gate Drive
SF1565 has a fast totem-pole gate driver with
800mA capability. Cross conduction has been
avoided to minimize heat dissipation, increase
efficiency, and enhance reliability. An internal 16V
clamp is added for MOSFET gate protection at
higher than expected VDD input. A soft driving
waveform is implemented to minimize EMI.
Protection Tiggers
Fault Removed
GATE
VDD
16.5V
10.5V
Fig.3
©SiFirst Technology
- 9 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
PACKAGE MECHANICAL DATA
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
b
c
D
E
1.350
0.050
1.250
0.310
0.170
4.700
3.800
5.800
1.750
0.250
1.650
0.510
0.250
5.150
4.000
6.200
0.053
0.002
0.049
0.012
0.006
0.185
0.150
0.228
0.069
0.010
0.065
0.020
0.010
0.203
0.157
0.244
E1
e
1.270 (BSC)
0.05 (BSC)
L
θ
0.400
0º
1.270
8º
0.016
0º
0.050
8º
©SiFirst Technology
- 10 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A2
B
3.710
0.510
3.200
0.380
4.310
0.146
0.020
0.126
0.015
0.170
3.600
0.570
0.142
0.022
B1
C
D
E
E1
e
1.524 (BSC)
0.06 (BSC)
0.204
9.000
6.200
7.320
0.360
9.400
6.600
7.920
0.008
0.354
0.244
0.288
0.014
0.370
0.260
0.312
2.540 (BSC)
0.100 (BSC)
L
E2
3.000
8.400
3.600
9.000
0.118
0.331
0.142
0.354
©SiFirst Technology
- 11 -
Confidential
SiFirst_DS_1565_V1.2
SF1565
IMPORTANT NOTICE
SiFirst Technology Nanhai, Ltd (SiFirst) reserves the right to make corrections, modifications, enhancements,
improvements and other changes to its products and services at any time and to discontinue any product or
service without notice. Customers should obtain the latest relevant information before placing orders and should
verify that such information is current and complete.
SiFirst warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with SiFirst’s standard warranty. Testing and other quality control techniques are used to the extent
SiFirst deems necessary to support this warranty. Except where mandated by government requirements,
testing of all parameters of each product is not necessarily performed.
SiFirst assumes no liability for application assistance or customer product design. Customers are responsible
for their products and applications using SiFirst’s components. To minimize the risks associated with customer
products and applications, customers should provide adequate design and operating safeguards.
Reproduction of SiFirst’s information in SiFirst’s data books or data sheets is permissible only if reproduction is
without alteration and is accompanied by all associated warranties, conditions, limitations, and notices.
Reproduction of this information with alteration is an unfair and deceptive business practice. SiFirst is not
responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of SiFirst’s products or services with statements different from or beyond the parameters stated by
SiFirst for that product or service voids all express and any implied warranties for the associated SiFirst’s
product or service and is an unfair and deceptive business practice. SiFirst is not responsible or liable for any
such statements.
SiFirst’s products are neither designed nor intended for use in military applications. SiFirst will not be held liable
for any damages or claims resulting from the use of its products in military applications.
SiFirst’s products are not designed to be used as components in devices intended to support or sustain human
life. SiFirst will not be held liable for any damages or claims resulting from the use of its products in medical
applications.
©SiFirst Technology
- 12 -
Confidential
SiFirst_DS_1565_V1.2
相关型号：
©2020 ICPDF网 联系我们和版权申明