S-1410H50-K8T2U4 [SII]

Watchdog operation is switchable;
S-1410H50-K8T2U4
型号: S-1410H50-K8T2U4
厂家: SEIKO INSTRUMENTS INC    SEIKO INSTRUMENTS INC
描述:

Watchdog operation is switchable

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S-1410/1411 Series  
LOW CURRENT CONSUMPTION WATCHDOG TIMER  
WITH RESET FUNCTION  
www.sii-ic.com  
© SII Semiconductor Corporation, 2015-2016  
Rev.2.0_00  
The S-1410/1411 Series is a watchdog timer developed using CMOS technology, which can operate with low current  
consumption of 3.8 μA typ. The reset function and the low voltage detection function are available.  
Features  
Detection voltage:  
Detection voltage accuracy:  
Input voltage:  
2.0 V to 5.0 V, selectable in 0.1 V step  
1.5%  
VDD = 0.9 V to 6.0 V  
Hysteresis width:  
5% typ.  
Current consumption:  
3.8 μA typ.  
Reset time-out period:  
14.5 ms typ. (CPOR = 2200 pF)  
Watchdog operation is switchable:  
Watchdog operation voltage range:  
Watchdog mode switching function*1:  
Watchdog input edge is selectable:  
Product type is selectable:  
Enable, Disable  
2.5 V to 6.0 V  
Time-out mode, window mode  
Rising edge, falling edge, both rising and falling edges  
S-1410 Series___  
________  
(Product with W / T pin (Output: WDO pin))  
S-1411 Series  
___  
_______  
________  
(Product without W / T pin (Output: RST pin, WDO pin))  
Operation temperature range:  
Ta = 40°C to +105°C  
Lead-free (Sn 100%), halogen-free  
*1. The S-1411 Series is fixed to the window mode.  
Applications  
Power supply monitoring of microcontroller mounted apparatus and system monitoring  
Packages  
TMSOP-8  
HSNT-8(2030)  
1
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Block Diagrams  
____  
1. S-1410 Series (Product with W / T pin)  
CWDT  
VDD  
Noise  
filter  
WEN  
WDI  
Noise  
filter  
WDT circuit  
Noise  
filter  
W / T  
WDO  
Voltage detection  
circuit  
Reference  
voltage  
circuit  
VSS  
CPOR  
Figure 1  
____  
2. S-1411 Series (Product without W / T pin)  
CWDT  
VDD  
Noise  
filter  
WEN  
WDI  
WDT circuit  
Noise  
filter  
RST  
WDO  
Voltage detection  
circuit  
Reference  
voltage  
circuit  
VSS  
CPOR  
Figure 2  
2
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Product Name Structure  
Users can select the product type, detection voltage, and package type for the S-1410/1411 Series. Refer to "1.  
Product name" regarding the contents of product name, "2. Product type list" regarding the product types, "3.  
Packages" regarding the package drawings.  
1. Product name  
S-141  
x
x
xx  
-
xxxx  
U
4
Environmental code  
U:  
Lead-free (Sn 100%), halogen-free  
Package abbreviation and IC packing specifications*1  
K8T2: TMSOP-8, Tape  
A8T1: HSNT-8(2030), Tape  
Detection voltage  
20 to 50  
(e.g., when the detection voltage is 2.0 V, it is expressed as 20.)  
Product type 1*2  
A to L  
Product type 2*3  
0, 1  
*1. Refer to the tape drawing.  
*2. Refer to "2. Product type list".  
___  
*3. 0: S-1410 Series (Product with W / T pin)  
________  
The WDO pin outputs the signals which are from the watchdog timer circuit and the voltage detection  
circuit.  
___  
1: S-14_1__1__S__e_ ries (Product without W / T pin)  
The WDO pin outputs the signals which are from the watchdog timer circuit and the voltage detection  
circuit.  
_______  
The RST pin outputs the signal which is from the voltage detection circuit.  
The watchdog mode is fixed to the window mode.  
3
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
2. Product type list  
Product Type  
Rev.2.0_00  
Table 1  
Input Edge  
WEN Pin Logic  
Active "H"  
Active "H"  
Output Pull-up Resistor  
Available  
A
B
C
D
E
F
G
H
I
Rising edge  
Falling edge  
Available  
Active "H"  
Active "L"  
Active "L"  
Active "L"  
Active "H"  
Active "H"  
Active "H"  
Active "L"  
Active "L"  
Active "L"  
Both rising and falling edges  
Rising edge  
Available  
Available  
Falling edge  
Available  
Both rising and falling edges  
Rising edge  
Available  
Unavailable  
Unavailable  
Unavailable  
Unavailable  
Unavailable  
Unavailable  
Falling edge  
Both rising and falling edges  
Rising edge  
J
K
L
Falling edge  
Both rising and falling edges  
3. Packages  
Table 2 Package Drawing Codes  
Package Name  
Dimension  
FM008-A-P-SD  
PP008-A-P-SD  
Tape  
Reel  
Land  
TMSOP-8  
FM008-A-C-SD  
PP008-A-C-SD  
FM008-A-R-SD  
PP008-A-R-SD  
HSNT-8(2030)  
PP008-A-L-SD  
4
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
Rev.2.0_00  
S-1410/1411 Series  
Pin Configuration  
1. TMSOP-8  
___  
Table 3 S-1410 Series (Product with W / T pin)  
Top view  
Pin No.  
Symbol  
Description  
Watchdog mode switching pin  
Reset time-out period adjustment pin  
Watchdog time adjustment pin  
GND pin  
_
W / T*1  
CPOR  
CWDT  
VSS  
1
2
3
4
5
6
7
8
1
2
3
4
8
7
6
5
WEN  
Watchdog enable pin  
Watchdog output pin  
Figure 3  
______  
WDO  
WDI  
Watchdog input pin  
VDD  
Voltage input pin  
___  
Table 4 S-1411 Series (Product without W / T pin)  
Pin No.  
Symbol  
Description  
Reset output pin  
_____  
RST  
1
2
3
4
5
6
7
8
CPOR  
CWDT  
VSS  
Reset time-out period adjustment pin  
Watchdog time adjustment pin  
GND pin  
WEN  
Watchdog enable pin  
Watchdog output pin  
Watchdog input pin  
______  
WDO  
WDI  
VDD  
Voltage input pin  
___  
*1. W / T pin = "H": Time-out mode  
___  
W / T pin = "L": Window mode  
5
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
2. HSNT-8(2030)  
___  
Table 5 S-1410 Series (Product with W / T pin)  
Top view  
1
Pin No.  
Symbol  
Description  
Watchdog mode switching pin  
Reset time-out period adjustment pin  
Watchdog time adjustment pin  
GND pin  
_
W / T*2  
CPOR  
CWDT  
VSS  
8
5
1
2
3
4
5
6
7
8
4
Bottom view  
WEN  
WDO  
WDI  
Watchdog enable pin  
Watchdog output pin  
______  
8
1
4
Watchdog input pin  
5
VDD  
Voltage input pin  
*1  
Figure 4  
___  
Table 6 S-1411 Series (Product without W / T pin)  
Pin No.  
Symbol  
Description  
Reset output pin  
_____  
RST  
1
2
3
4
5
6
7
8
CPOR  
CWDT  
VSS  
Reset time-out period adjustment pin  
Watchdog time adjustment pin  
GND pin  
WEN  
Watchdog enable pin  
Watchdog output pin  
Watchdog input pin  
______  
WDO  
WDI  
VDD  
Voltage input pin  
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential open or GND.  
However, do not use it as the function of electrode.  
___  
*2. W / T pin = "H": Time-out mode  
___  
W / T pin = "L": Window mode  
6
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Pin Functions  
Refer to "Operation" for details.  
____  
1. W / T pin (S-1410 Series only)  
This is a pin to switch the watchdog mode.  
___  
The S-1410 Series changes to the time-out mode when the W / T pin is "H", and changes to the window mode  
___  
when the W / T pin is "L". Switching the mode is prohibited during the operation.  
___  
The constant current source (0.3 μA typ.) is connected to the W / T pin, and it is pulled down internally.  
___  
1. 1 Time-out mode (W / T pin = "H")  
The S-1410 Series detects an abnormality when not inputting an edge to the WDI pin during the watchdog time-out  
________  
period (tWDU). And then "L" is output from the WDO pin.  
W / T  
"H"  
(S-1410 only)  
t
WDU  
t
RST  
WDI  
(Rising edge)  
WDO  
Figure 5 Abnormality Detection in Time-out Mode  
___  
1. 2 Window mode (W / T pin = "L")  
When not inputting an edge to the WDI pin during tWDU, or when an edge is input to the WDI pin again within a  
specific period of time (the discharge time due to an edge detection + 1 charge-discharge time (tWDL)) after  
________  
inputting an edge to the WDI pin, the WDO pin output changes from "H" to "L".  
W / T  
"L"  
(S-1410 only)  
WDI  
(Rising edge)  
WDO  
t
WDL  
tRST  
tWDU  
t
RST  
Figure 6 Abnormality Detection in Window Mode  
________  
2. RST pin (S-1411 Series only)  
This is a reset output pin. It outputs "L" when detecting a low voltage.  
_______  
Be sure to connect a pull-up resistor to the RST pin in the product without an output pull-up resistor.  
3. CPOR pin  
This is a pin to connect an external capacitor in order to generate the reset time-out period (tRST).  
The capacitor is charged and discharged by an internal constant current circuit, and the charge-discharge duration is  
tRST  
.
t
RST is calculated by using the following equation.  
t
RST = 6,500,000 × CPOR [F] + 0.0002  
7
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
4. CWDT pin  
This is a pin to connect an external capacitor in order to generate the watchdog time-out period (tWDU) and the  
watchdog double pulse detection time (tWDL). The capacitor is charged and discharged by an internal constant  
current circuit.  
tWDU is calculated by using the following equation.  
tWDU = 50,000,000 × CWDT [F] + 0.0011  
Moreover, tWDL is calculated by using the following equation.  
tWDU  
tWDL  
=
32  
5. WEN pin  
This is a pin to switch Enable / Disable of the watchdog timer.  
When the WEN pin logic is active "H", the watchdog timer becomes Enable if the input is "H", and the  
charge-discharge operation is performed at the CWDT pin. In the active "H" product, the constant current source  
(0.3 μA typ.) is connected to the WEN pin, and it is pulled down internally.  
_________  
6. WDO pin  
This pin combines the reset output and the watchdog output.  
________  
Be sure to connect a pull-up resistor to the WDO pin in the product without an output pull-up resistor.  
7. WDI pin  
This is an input pin to receive a signal from the monitored object. By being input an edge at an appropriate timing, the  
WDI pin confirms the normal operation of the monitored object.  
The constant current source (0.3 μA typ.) is connected to the WDI pin, and it is pulled down internally.  
8
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
Rev.2.0_00  
S-1410/1411 Series  
Absolute Maximum Ratings  
Table 7  
Symbol  
(Ta = +25°C unless otherwise specified)  
Item  
VDD pin voltage  
Absolute Maximum Rating  
Unit  
V
VDD  
VSS 0.3 to VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VSS + 7.0  
WDI pin voltage  
VWDI  
V
WEN pin voltage  
VWEN  
V
___  
___  
V
W / T pin voltage  
CPOR pin voltage  
CWDT pin voltage  
V
/ T  
w
VCPOR  
VCWDT  
V
V
_______  
A / B / C / D / E / F type  
V
_______  
RST pin voltage  
VRST  
G / H / I / J / K / L type  
V
________  
A / B / C / D / E / F type  
VSS 0.3 to VDD + 0.3 VSS + 7.0  
VSS 0.3 to VSS + 7.0  
V
________  
VWDO  
WDO pin voltage  
G / H / I / J / K / L type  
V
Operation ambient temperature  
Storage temperature  
Topr  
Tstg  
40 to +105  
40 to +150  
°C  
°C  
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical  
damage. These values must therefore not be exceeded under any conditions.  
Thermal Resistance Value  
Table 8  
Item  
Symbol  
Condition  
Min.  
Typ.  
160  
133  
181  
135  
Max.  
Unit  
°C/W  
°C/W  
°C/W  
°C/W  
Board 1  
TMSOP-8  
Board 2  
Board 1  
Board 2  
Junction-to-ambient thermal resistance*1  
θja  
HSNT-8(2030)  
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A  
Remark Refer to "Thermal Characteristics" for details of power dissipation and test board.  
9
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Electrical Characteristics  
Table 9 (1 / 2)  
(WEN pin logic active "H" product, VDD = 5.0 V, Ta = +25°C unless otherwise specified)  
Test  
Circuit  
Item  
Detection voltage*1  
Hysteresis width  
Symbol  
VDET  
VHYS  
Condition  
Min.  
Typ.  
Max.  
Unit  
V
VDET(S)  
× 0.985  
VDET  
VDET(S)  
× 1.015  
VDET  
VDET(S)  
1
VDET  
× 0.05  
V
1
2
× 0.03  
× 0.07  
Current consumption  
during operation  
ISS1  
When watchdog timer operates  
3.8  
7.8  
μA  
tRST  
Reset time-out period  
C
POR = 2200 pF  
WDT = 470 pF  
8.7  
15  
14.5  
24.6  
20  
34  
ms  
ms  
3
3
tWDU  
Watchdog time-out period  
Watchdog double pulse  
detection time  
C
tWDL  
CWDT = 470 pF  
461  
769  
1077  
μs  
4
S-1411 Series A / B / C / D /  
E / F type only  
Reset output voltage "H"  
Reset output voltage "L"  
VROH  
VROL  
VDD 1.0  
V
V
5
6
0.4  
_______  
VRST = 0 V,  
Reset output pull-up current IRUP  
S-1411 Series A / B / C / D /  
E / F type only  
0.85  
0.4  
μA  
7
V
DD = 1.5 V  
0.6  
1.1  
2.1  
2.8  
1.1  
1.6  
2.6  
3.3  
mA  
mA  
mA  
mA  
8
8
8
8
VDS = 0.4 V,  
S-1411 Series  
only  
VDD = 1.8 V  
VDD = 2.5 V  
VDD = 3.0 V  
Reset output current  
IROUT  
V
DS = 6.0 V, VDD = 6.0 V,  
Reset output leakage current IRLEAK  
0.096  
μA  
9
S-1411 Series only  
Watchdog output voltage "H" VWOH  
Watchdog output voltage "L" VWOL  
A / B / C / D / E / F type only  
VDD 1.0  
0.4  
V
V
10  
11  
________  
V
Watchdog output  
IWUP  
WDO = 0 V,  
0.85  
0.4  
μA  
12  
pull-up current  
A / B / C / D / E / F type only  
VDD = 1.5 V  
0.6  
1.1  
2.1  
2.8  
1.1  
1.6  
2.6  
3.3  
mA  
mA  
mA  
mA  
13  
13  
13  
13  
VDD = 1.8 V  
VDS = 0.4 V  
Watchdog output current  
IWOUT  
VDD = 2.5 V  
VDD = 3.0 V  
VDS = 6.0 V, VDD = 6.0 V  
WEN pin  
Watchdog output leakage  
current  
IWLEAK  
0.096  
μA  
14  
Input pin voltage 1 "H"  
VSH1  
VSL1  
VSH2  
VSL2  
VSH3  
VSL3  
0.7 × VDD  
V
V
V
V
V
V
15  
15  
15  
15  
15  
15  
Input pin voltage 1 "L"  
Input pin voltage 2 "H"  
Input pin voltage 2 "L"  
Input pin voltage 3 "H"  
Input pin voltage 3 "L"  
WEN pin  
0.3 × VDD  
0.3 × VDD  
_
W / T pin, S-1410 Series only  
0.7 × VDD  
_
W / T pin, S-1410 Series only  
0.7 × VDD  
WDI pin  
WDI pin  
0.3 × VDD  
10  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Table 9 (2 / 2)  
(WEN pin logic active "H" product, VDD = 5.0 V, Ta = +25°C unless otherwise specified)  
Test  
Circuit  
Item  
Symbol  
Condition  
Min.  
Typ.  
Max.  
Unit  
A / B / C /  
G / H / I  
type  
0.3  
1.0  
μA  
15  
WEN pin,  
VDD = 6.0 V,  
Input pin voltage = 6.0 V  
Input pin current 1 "H"  
ISH1  
D / E / F /  
J / K / L  
type  
0.1  
0.1  
μA  
15  
WEN pin, VDD = 6.0 V,  
I_n_put pin voltage = 0 V  
W / T pin, S-1410 Series only,  
Input pin current 1 "L"  
Input pin current 2 "H"  
Input pin current 2 "L"  
Input pin current 3 "H"  
Input pin current 3 "L"  
ISL1  
ISH2  
ISL2  
ISH3  
ISL3  
0.1  
0.3  
0.1  
1.0  
0.1  
1.0  
0.1  
μA  
μA  
μA  
μA  
μA  
15  
15  
15  
15  
15  
V
DD = 6.0 V, Input pin voltage = 6.0 V  
__  
W / T pin, S-1410 Series only,  
DD = 6.0 V, Input pin voltage = 0 V  
0.1  
V
WDI pin, VDD = 6.0 V,  
Input pin voltage = 6.0 V  
WDI pin, VDD = 6.0 V,  
Input pin voltage = 0 V  
0.3  
0.1  
Input pulse width "H"*2  
Input pulse width "L"*2  
thigh1  
tlow1  
1.5  
1.5  
1.0  
25  
25  
40  
40  
μs  
μs  
μs  
μs  
μs  
15  
15  
3
Watchdog output delay time tWOUT  
Reset output delay time  
Input setup time  
tROUT  
tiset  
3
3
*1. VDET: Actual detection voltage, VDET(S): Set detection voltage  
*2. The input pulse width "H" (thigh1) and the input pulse width "L" (tlow1) are defined as shown in Figure 7.  
Inputs to the WEN pin and the WDI pin should be greater than or equal to the min. value specified in "Electrical  
Characteristics".  
t
high1  
V
V
SH1  
V
V
SH1  
WEN  
WDI  
V
V
SL1  
V
V
SL1  
t
low1  
thigh1  
SH3  
SH3  
SL3  
SL3  
tlow1  
Figure 7  
11  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Test Circuits  
A
VDD  
CPOR  
VDD  
CPOR  
WDO  
WDO  
CWDT  
WDI  
CWDT  
WDI  
+
WEN  
W / T  
WEN  
W / T  
V
+
V
VSS  
VSS  
Figure 8 Test Circuit 1  
Figure 9 Test Circuit 2  
VDD  
VDD  
CPOR  
CPOR  
WDO  
CWDT  
WDI  
WDO  
CWDT  
WDI  
+
+
WEN  
W / T  
WEN  
W / T  
V
V
VSS  
VSS  
Figure 10 Test Circuit 3  
Figure 11 Test Circuit 4  
VDD  
VDD  
CPOR  
CPOR  
WDO  
WDO  
CWDT  
CWDT  
WDI  
WDI  
WEN  
RST  
WEN  
RST  
+
+
V
VSS  
V
VSS  
Figure 12 Test Circuit 5  
Figure 13 Test Circuit 6  
12  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
VDD  
CPOR  
VDD  
CPOR  
CWDT  
WDI  
WDO  
RST  
WDO  
RST  
CWDT  
WDI  
A
WEN  
WEN  
A
VSS  
VSS  
Figure 14 Test Circuit 7  
Figure 15 Test Circuit 8  
VDD  
VDD  
CPOR  
CPOR  
WDO  
CWDT  
WDI  
WDO  
RST  
CWDT  
WDI  
+
WEN  
W / T  
A
WEN  
V
VSS  
VSS  
Figure 16 Test Circuit 9  
Figure 17 Test Circuit 10  
VDD  
VDD  
CPOR  
CPOR  
WDO  
WDO  
CWDT  
WDI  
CWDT  
WDI  
+
WEN  
W / T  
WEN  
W / T  
VSS  
V
A
VSS  
Figure 18 Test Circuit 11  
Figure 19 Test Circuit 12  
13  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
VDD  
CPOR  
VDD  
CPOR  
WDO  
A
WDO  
A
CWDT  
WDI  
CWDT  
WDI  
WEN  
W / T  
WEN  
W / T  
VSS  
VSS  
Figure 20 Test Circuit 13  
Figure 21 Test Circuit 14  
VDD  
CPOR  
WDO  
CWDT  
+
A
WEN, WDI, W / T  
VSS  
V
Figure 22 Test Circuit 15  
14  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Operation  
1. From power-on to reset release  
The S-1410/1411 Series initiates the initialization if the VDD pin voltage exceeds the release voltage (+VDET).  
The _c__h_a__r_g_ e-discharge operation to the CPOR pin is initiated after the passage of the initialization time (tINIT), and  
_______  
the WDO pin output and the RST pin output change from "L" to "H" after the operation is performed 4 times.  
VDD  
+VDET  
V
CPU  
CPOR  
WDO  
VCPL  
Output "L" "H"  
Output "L" "H"  
RST  
(S-1411 only)  
tINIT  
tRST  
Remark VCPU: CPOR charge upper limit threshold (1.25 V typ.)  
VCPL: CPOR charge lower limit threshold (0.20 V typ.)  
Figure 23  
tINIT changes according to the power supply rising time. Refer to Figure 24 for the relation between tINIT and the  
power supply rising time.  
0.1  
0.01  
0.001  
0.0001  
0.000001 0.00001 0.0001 0.001  
0.01  
0.1  
Power supply rising time [s]  
Figure 24 Power Supply Rising Time Dependency of Initialization Time  
Power supply rising time  
VDD  
CPOR  
Initialization time*1  
*1. The initialization time is the time period from when the VDD pin voltage reaches VDD / 2 to when CPOR rises.  
Figure 25 Initialization Time  
15  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
2. From reset release to initiation of charge-discharge operation to CWDT pin  
The charge-discharge operation to the CWDT pin differs depending on the status of the WEN pin at the reset release.  
2. 1 When WEN pin is "H" at reset release (Active "H")  
Since the watchdog timer is Enable, the S-1410/1411 Series initiates the charge-discharge operation to the CWDT  
pin.  
VDD  
CPOR  
CWDT  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 26 WEN Pin = "H"  
2. 2 When WEN pin is "L" at reset release (Active "H")  
Since the watchdog timer is Disable after the CPOR pin performs the charge-discharge operation 4 times, the  
S-1410/1411 Series does not initiate the charge-discharge operation to the CWDT pin. If the input to the WEN pin  
changes to "H" in this status, the S-1410/1411 Series initiates the charge-discharge operation to the CWDT pin.  
VDD  
CPOR  
CWDT  
WEN  
(Active "H")  
Charge-discharge operation is initiated  
at WEN pin = "H"  
WDO  
RST  
(S-1411 only)  
Figure 27 WEN Pin = "L" "H"  
16  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
3. Watchdog time-out detection  
The watchdog timer detects a time-out after the charge-discharge operation to the CWDT pin is performed 32 times,  
________  
then the WDO pin output changes from "H" to "L".  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
5
29 30 31 32  
1
2
3
"L"  
WEN  
(Active "H")  
WDO  
RST  
tWDU  
tRST  
(S-1411 only)  
Figure 28  
4. Internal counter reset due to edge detection  
When the WDI pin detects an edge during the charge-discharge operation to the CWDT pin, the internal counter  
which counts the number of times of the charge-discharge operation is reset. The CWDT pin initiates the discharge  
operation when an edge is detected, and initiates the charge-discharge operation again after the discharge operation  
is completed.  
4. 1 Counter reset due to rising edge detection  
(S-141xAxx, S-141xDxx, S-141xGxx, S-141xJxx)  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
30 31 32  
1
Counter reset due to rising edge detection  
Time-out after counter reset  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 29  
17  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
4. 2 Counter reset due to falling edge detection  
(S-141xBxx, S-141xExx, S-141xHxx, S-141xKxx)  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
30 31 32  
1
Counter reset due to falling edge detection  
Time-out after counter reset  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 30  
4. 3 Counter reset due to both rising and falling edges detection 1  
(S-141xCxx, S-141xFxx, S-141xIxx, S-141xLxx)  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
1
2
30 31 32  
1
2
Counter reset due to  
both rising and falling edges detection  
Time-out after counter reset  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 31  
18  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
4. 4 Counter reset due to both rising and falling edges detection 2  
(S-141xCxx, S-141xFxx, S-141xIxx, S-141xLxx)  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
1
2
30 31 32  
1
2
Counter reset due to  
both rising and falling edges detection Time-out after counter reset  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 32  
5. WEN pin operation during charge-discharge operation to CWDT pin  
When the WEN pin changes from "H" to "L" during the charge-discharge operation to the CWDT pin, the CWDT pin  
performs the discharge operation. Moreover, the internal counter which counts the number of times of the  
charge-discharge operation for the CWDT pin is also reset.  
If the WEN pin changes to "H" again in this status, the CWDT pin initiates the charge-discharge operation.  
VDD  
CPOR  
CWDT  
1
2
3
4
1
2
3
4
1
2
3
4
1
2
31 32  
1
2
Watchdog timer restarts the operation at WEN pin = "H"  
Charge-discharge operation is stopped, counter reset  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 33  
19  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
6. Watchdog double pulse detection  
If an edge is input to the WDI pin again within a specific period of time (the discharge time due to an edge detection +  
1 charge-discharge time (tWDL)) after inputting an edge to the WDI pin when the S-1410/1411 Series is the window  
________  
mode, the WDO pin output changes from "H" to "L".  
When the watchdog timer becomes Disable due to a change of the WEN pin ("H" "L" "H") after inputting an  
________  
edge to the WDI pin, the WDO pin continues outputting "H" even if an edge is input to the WDI pin within the specific  
period of time mentioned above.  
6. 1 Double pulse detection due to rising edge detection  
(S-141xAxx, S-141xDxx, S-141xGxx, S-141xJxx)  
tWDL  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
5
6
7
8
9 10  
"L"  
W / T  
(S-1410 only)  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 34  
6. 2 Double pulse detection due to falling edge detection  
(S-141xBxx, S-141xExx, S-141xHxx, S-141xKxx)  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
5
6
7
8
9 10  
Counter reset at the 1st edge  
Output "H" "L" at the 2nd edge  
"L"  
W / T  
(S-1410 only)  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 35  
20  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
6. 3 Double pulse detection due to both rising and falling edges detection  
(S-141xCxx, S-141xFxx, S-141xIxx, S-141xLxx)  
The double pulse is detected only when edges are input in order of rising and falling.  
6. 3. 1 When edges are input to WDI pin in order of rising and falling  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
5
6
7
8
9 10 11  
Counter reset at the1st edge  
Output "H" "L" at the 2nd edge  
"L"  
W / T  
(S-1410 only)  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 36 Double Pulse Detection  
6. 3. 2 When edges are input to WDI pin in order of falling and rising  
VDD  
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
3
4
29 30 31 32  
Counter reset at the 1st edge  
Only counter reset at the 2nd edge  
"L"  
W / T  
(S-1410 only)  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 37 Double Pulse Non-detection  
21  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
7. Operation of low voltage detection  
The voltage detection circuit detects a low voltage if the power supply voltage falls below the detection voltage, and  
________  
_______  
then "L" is output from the WDO pin and the RST pin (Only the S-1411 Series). The output is maintained until the  
charge-discharge operation of the CPOR pin is performed 4 times.  
The S-1410/1411 Series can detect a low voltage even if either the CPOR pin or the WDT pin performs the  
___  
charge-discharge operation. In this case, the status of the WEN pin or the W / T pin does not have an affect.  
VDD  
1
2
1
2
3
4
1
2
3
4
CPOR  
CWDT  
WDI  
1
2
3
4
1
2
"H" or "L"  
"H" or "L"  
"H" or "L"*1  
W / T  
(S-1410 only)  
WEN  
(Active "H")  
WDO  
RST  
(S-1411 only)  
Figure 38  
*1. When the WEN pin is Disable, the charge-discharge operation of CWDT pin is not performed.  
____  
8. WEN pin, WDI pin and W / T pin  
___  
Each of the WEN pin, the WDI pin and the W / T pin has a noise filter.  
If the power supply voltage is 5.0 V, noise with a minimum pulse width of 200 ns can be eliminated.  
22  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Standard Circuits  
____  
1. S-1410 Series (Product with W / T pin)  
VDD  
WEN  
V
DD  
WDI  
WDO  
W / T  
VSS  
CPOR CWDT  
*1  
POR  
*2  
WDT  
C
C
Figure 39  
____  
2. S-1411 Series (Product without W / T pin)  
VDD  
WEN  
WDI  
WDO  
RST  
VDD  
VSS  
CPOR CWDT  
*1  
POR  
*2  
WDT  
C
C
Figure 40  
*1. Adjustment capacitor for reset output delay time (CPOR) should be connected directly to the CPOR pin and  
the VSS pin.  
*2. Adjustment capacitor for watchdog output delay time (CWDT) should be connected directly to the CWDT pin  
and the VSS pin.  
A capacitor of 100 pF to 1 μF can be used for CPOR and CWDT  
.
Caution  
The above connection diagram and constant will not guarantee successful operation.  
Perform thorough evaluation using the actual application to set the constants.  
23  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Precautions  
It will take time for the discharge operation to be performed if the capacitance of CPOR is extremely large at the low  
voltage detection, so the discharge operation may not be completed by the time the power supply voltage exceeds  
the detection voltage. In that case, since the charge-discharge operation of the CPOR pin is performed after the  
discharge operation is completed, the delay time of the same time length as the discharge operation occurs in reset  
time-out period (tRST).  
Select a capacitor which satisfies the following equation for CPOR and CWDT. If this condition is not satisfied, the  
delay time of the same time length as the discharge operation occurs in tRST since the discharge operation of an  
external capacitor connected to the CWDT pin is not completed by the time the CWDT pin initiates the next  
charge-discharge operation.  
CWDT / CPOR 600  
When the power supply voltage falls to 0.9 V or lower, set a time interval of 20 μs or longer by the time the power  
supply is raised again. If the appropriate time length is not secured, the time-out period after raising the power  
supply voltage may get delayed.  
When the time that the power supply voltage falls below the detection voltage is short, the S-1410/1411 Series may  
not detect a voltage. In that case, the time-out period after raising the power supply voltage may get delayed.  
___  
Since input pins (the WEN pin, the WDI pin and the W / T pin) in the S-1410/1411 Series are CMOS configurations,  
make sure that an intermediate potential is not input when the S-1410/1411 Series operates.  
________  
_______  
Since the WDO pin and the RST pin are affected by external resistance and external capacitance, use the  
S-1410/1411 Series after performing thorough evaluation with the actual application.  
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic  
protection circuit.  
SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any  
infringement by products including this IC of patents owned by a third party.  
24  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Characteristics (Typical Data)  
1. Current consumption during operation (ISS1) vs. Input voltage (VDD  
)
WDT = OFF, VDET(S) = 4.0 V, Ta = +25°C  
WDT = ON,  
VDET(S) = 4.0 V, Ta =  
+
25°C, WDI input  
5.0  
5.0  
Ta = 40C  
4.0  
3.0  
2.0  
1.0  
0.0  
4.5  
4.0  
3.5  
Ta = +105C  
Ta =  
5.0  
+
25C  
3.0  
4.0  
4.5  
5.5  
6.0  
6.5  
0
1
2
3
4
5
6
V
DD [V]  
V
DD [V]  
2. Current consumption during operation (ISS1) vs. Temperature (Ta)  
3. Detection voltage (  
VDET  
)
,
Release voltage (  
+
VDET) vs. Temperature (Ta)  
WDT = ON,  
VDET(S) = 4.0 V, VDD = 5.0 V, WDI input  
VDET(S) = 4.0 V  
5.0  
4.5  
+VDET  
VDET  
4.0  
3.0  
2.0  
1.0  
0.0  
4.0  
3.5  
3.0  
40 25  
0
25  
50  
75  
105  
40 25  
0
25  
50  
75  
105  
Ta [C]  
Ta [C]  
4. Reset time-out period (tRST) vs. Temperature (Ta)  
5. Watchdog time-out period (tWDU) vs. Temperature (Ta)  
VDD = 5.0 V, CPOR = 2200 pF  
VDD = 5.0 V, CWDT = 470 pF  
40  
40  
30  
20  
10  
0
30  
20  
10  
0
40 25  
0
25  
50  
75  
105  
40 25  
0
25  
50  
75  
105  
Ta [C]  
Ta [C]  
6. Reset output delay time (tROUT) vs. Temperature (Ta)  
7. Watchdog output delay time (tWOUT) vs. Temperature (Ta)  
VDD = VDET(S) + 1.0 V → −VDET(S) 1.0 V,  
VDD = 5.0 V, CWDT = 470 pF  
C
POR = 2200 pF  
40  
40  
30  
20  
10  
0
30  
20  
10  
0
40 25  
0
25  
Ta [C]  
50  
75  
105  
40 25  
0
25  
Ta [C]  
50  
75  
105  
25  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
8. Reset time-out period (tRST) vs. CPOR  
9. Watchdog time-out period (tWDU) vs. CWDT  
VDD = 5.0 V, Ta = +25°C  
VDD = 5.0 V, Ta = +25°C  
10  
100  
1
0.1  
10  
1
0.01  
0.1  
0.001  
0.0001  
0.01  
0.001  
0.0001  
0.001  
0.01  
0.1  
1
0.0001  
0.001  
0.01  
0.1  
1
C
POR [F]  
CWDT [F]  
10. Nch driver output current (IWOUT) vs. Input voltage (VDD  
)
VDS = 0.4 V, VDET(S) = 4.0 V  
6.0  
Ta =  
40C  
+25C  
4.0  
2.0  
0.0  
Ta =  
Ta =  
+
105C  
0
1
2
3
4
5
V
DD [V]  
26  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
Thermal Characteristics  
1. TMSOP-8  
T
j
= 125C max.  
1.0  
Board 2  
0.8 0.75 W  
0.6  
Board 1  
0.63 W  
0.4  
0.2  
0
0
50  
100  
150  
Ambient temperature (Ta) [C]  
Figure 41 Power Dissipation of Package (When Mounted on Board)  
Table 10  
1. 1 Board 1  
76.2 mm  
Item  
Specification  
Thermal resistance value  
(θja)  
160°C/W  
Size  
114.3 mm × 76.2 mm × t1.6 mm  
Material  
FR-4  
Number of copper foil layer  
1
2
Land pattern and wiring for testing: t0.070 mm  
2
Copper foil layer  
3
4
74.2 mm × 74.2 mm × t0.070 mm  
Thermal via  
Figure 42  
1. 2 Board 2  
76.2 mm  
Table 11  
Item  
Specification  
Thermal resistance value  
(θja)  
133°C/W  
Size  
114.3 mm × 76.2 mm × t1.6 mm  
Material  
FR-4  
Number of copper foil layer  
1
4
Land pattern and wiring for testing: t0.070 mm  
74.2 mm × 74.2 mm × t0.035 mm  
74.2 mm × 74.2 mm × t0.035 mm  
74.2 mm × 74.2 mm × t0.070 mm  
2
Copper foil layer  
3
4
Thermal via  
Figure 43  
27  
LOW CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION  
S-1410/1411 Series  
Rev.2.0_00  
2. HSNT-8(2030)  
Tj = +125°C max.  
1.0  
0.8  
0.6  
0.4  
0.2  
0
Board 2  
0.74 W  
Board 1  
0.55 W  
0
50  
100  
150  
Ambient temperature (Ta) [C]  
Figure 44 Power Dissipation of Package (When Mounted on Board)  
Table 12  
2. 1 Board 1  
76.2 mm  
Item  
Specification  
Thermal resistance value  
(θja)  
181°C/W  
Size  
114.3 mm × 76.2 mm × t1.6 mm  
Material  
FR-4  
Number of copper foil layer  
1
2
Land pattern and wiring for testing: t0.070 mm  
2
Copper foil layer  
3
4
74.2 mm × 74.2 mm × t0.070 mm  
Thermal via  
Figure 45  
2. 2 Board 2  
76.2 mm  
Table 13  
Item  
Specification  
Thermal resistance value  
(θja)  
135°C/W  
Size  
114.3 mm × 76.2 mm × t1.6 mm  
Material  
FR-4  
Number of copper foil layer  
1
4
Land pattern and wiring for testing: t0.070 mm  
74.2 mm × 74.2 mm × t0.035 mm  
74.2 mm × 74.2 mm × t0.035 mm  
74.2 mm × 74.2 mm × t0.070 mm  
2
Copper foil layer  
3
4
Thermal via  
Figure 46  
28  
2.90±0.2  
8
5
1
4
0.13±0.1  
0.2±0.1  
0.65±0.1  
No. FM008-A-P-SD-1.2  
TMSOP8-A-PKG Dimensions  
FM008-A-P-SD-1.2  
TITLE  
No.  
ANGLE  
UNIT  
mm  
SII Semiconductor Corporation  
2.00±0.05  
4.00±0.1  
1.00±0.1  
4.00±0.1  
+0.1  
-0  
1.5  
1.05±0.05  
0.30±0.05  
3.25±0.05  
1
8
4
5
Feed direction  
No. FM008-A-C-SD-2.0  
TMSOP8-A-Carrier Tape  
FM008-A-C-SD-2.0  
TITLE  
No.  
ANGLE  
UNIT  
mm  
SII Semiconductor Corporation  
16.5max.  
13.0±0.3  
Enlarged drawing in the central part  
13±0.2  
(60°)  
(60°)  
No. FM008-A-R-SD-1.0  
TMSOP8-A-Reel  
FM008-A-R-SD-1.0  
TITLE  
No.  
ANGLE  
UNIT  
QTY.  
4,000  
mm  
SII Semiconductor Corporation  
2.0±0.1  
5
8
(1.70)  
+0.05  
-0.02  
0.08  
1
4
0.5  
0.23±0.1  
No. PP008-A-P-SD-2.0  
TITLE  
DFN-8/HSNT-8-A-PKG Dimensions  
PP008-A-P-SD-2.0  
No.  
The heat sink of back side has different electric  
potential depending on the product.  
ANGLE  
UNIT  
Confirm specifications of each product.  
Do not use it as the function of electrode.  
mm  
SII Semiconductor Corporation  
+0.1  
-0  
2.0±0.05  
4.0±0.1  
0.25±0.05  
ø1.5  
+0.1  
-0  
0.60±0.05  
ø1.0  
4.0±0.1  
2.3±0.05  
4 3 2 1  
5 6 78  
Feed direction  
No. PP008-A-C-SD-1.0  
TITLE  
DFN-8/HSNT-8-A-Carrier Tape  
PP008-A-C-SD-1.0  
No.  
ANGLE  
UNIT  
mm  
SII Semiconductor Corporation  
+1.0  
- 0.0  
9.0  
11.4±1.0  
Enlarged drawing in the central part  
ø13±0.2  
(60°)  
(60°)  
No. PP008-A-R-SD-1.0  
TITLE  
DFN-8/HSNT-8-A-Reel  
PP008-A-R-SD-1.0  
No.  
QTY.  
5,000  
ANGLE  
UNIT  
mm  
SII Semiconductor Corporation  
1.6  
0.50  
0.30  
No. PP008-A-L-SD-1.0  
DFN-8/HSNT-8-A  
-Land Recommendation  
TITLE  
No.  
PP008-A-L-SD-1.0  
ANGLE  
UNIT  
mm  
SII Semiconductor Corporation  
Disclaimers (Handling Precautions)  
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and  
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without  
notice.  
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of  
any specific mass-production design.  
SII Semiconductor Corporation is not responsible for damages caused by the reasons other than the products or  
infringement of third-party intellectual property rights and any other rights due to the use of the information described  
herein.  
3. SII Semiconductor Corporation is not responsible for damages caused by the incorrect information described herein.  
4. Take care to use the products described herein within their specified ranges. Pay special attention to the absolute  
maximum ratings, operation voltage range and electrical characteristics, etc.  
SII Semiconductor Corporation is not responsible for damages caused by failures and/or accidents, etc. that occur  
due to the use of products outside their specified ranges.  
5. When using the products described herein, confirm their applications, and the laws and regulations of the region or  
country where they are used and verify suitability, safety and other factors for the intended use.  
6. When exporting the products described herein, comply with the Foreign Exchange and Foreign Trade Act and all  
other export-related laws, and follow the required procedures.  
7. The products described herein must not be used or provided (exported) for the purposes of the development of  
weapons of mass destruction or military use. SII Semiconductor Corporation is not responsible for any provision  
(export) to those whose purpose is to develop, manufacture, use or store nuclear, biological or chemical weapons,  
missiles, or other military use.  
8. The products described herein are not designed to be used as part of any device or equipment that may affect the  
human body, human life, or assets (such as medical equipment, disaster prevention systems, security systems,  
combustion control systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment,  
aviation equipment, aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle  
use or other uses. Do not use those products without the prior written permission of SII Semiconductor Corporation.  
Especially, the products described herein cannot be used for life support devices, devices implanted in the human  
body and devices that directly affect human life, etc.  
Prior consultation with our sales office is required when considering the above uses.  
SII Semiconductor Corporation is not responsible for damages caused by unauthorized or unspecified use of our  
products.  
9. Semiconductor products may fail or malfunction with some probability.  
The user of these products should therefore take responsibility to give thorough consideration to safety design  
including redundancy, fire spread prevention measures, and malfunction prevention to prevent accidents causing  
injury or death, fires and social damage, etc. that may ensue from the products' failure or malfunction.  
The entire system must be sufficiently evaluated and applied on customer's own responsibility.  
10. The products described herein are not designed to be radiation-proof. The necessary radiation measures should be  
taken in the product design by the customer depending on the intended use.  
11. The products described herein do not affect human health under normal use. However, they contain chemical  
substances and heavy metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips  
may be sharp. Take care when handling these with the bare hands to prevent injuries, etc.  
12. When disposing of the products described herein, comply with the laws and ordinances of the country or region where  
they are used.  
13. The information described herein contains copyright information and know-how of SII Semiconductor Corporation.  
The information described herein does not convey any license under any intellectual property rights or any other  
rights belonging to SII Semiconductor Corporation or a third party. Reproduction or copying of the information  
described herein for the purpose of disclosing it to a third-party without the express permission of SII Semiconductor  
Corporation is strictly prohibited.  
14. For more details on the information described herein, contact our sales office.  
1.0-2016.01  
www.sii-ic.com  

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