S-35392A [SII]

2-WIRE REAL-TIME CLOCK; 2线实时时钟
S-35392A
型号: S-35392A
厂家: SEIKO INSTRUMENTS INC    SEIKO INSTRUMENTS INC
描述:

2-WIRE REAL-TIME CLOCK
2线实时时钟

时钟
文件: 总47页 (文件大小:617K)
中文:  中文翻译
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Rev.1.3_00  
2-WIRE REAL-TIME CLOCK  
S-35392A  
The S-35392A is a CMOS 2-wire real-time clock IC which operates with the very low current  
consumption and in the wide range of operation voltage. The operation voltage is 1.3 V to 5.5  
V so that this IC can be used for various power supplies from main supply to backup battery.  
Due to the 0.45 µA current consumption and wide range of power supply voltage at time  
keeping, this IC makes the battery life longer. In the system which operates with a backup  
battery, the included free registers can be used as the function for user’s backup memory.  
Users always can take back the information in the registers which is stored before power-off  
the main power supply, after the voltage is restored.  
This IC has the function to correct advance/delay of the clock data speed, in the wide range,  
which is caused by the oscillation circuit’s frequency deviation. Correcting according to the  
temperature change by combining this function and a temperature sensor, it is possible to  
make a high precise clock function which is not affected by the ambient temperature.  
„ Features  
Low current consumption :  
0.45 µA typ. (VDD = 3.0 V, Ta = 25°C)  
Constant output of 32.768 kHz clock pulse (Nch open-drain output)  
Wide range of operating voltage :  
Built-in clock-correction function  
Built-in free user register  
1.3 to 5.5 V  
2-wire (I2C-bus) CPU interface  
Built-in alarm interrupter  
Built-in flag generator during detection of low power voltage or at power-on  
Auto calendar up to the year 2099, automatic leap year calculation function  
Built-in constant voltage circuit  
Built-in 32.768 kHz crystal oscillator (Cd built in, Cg external)  
Package : SNT-8A  
Lead-free product  
„ Applications  
Mobile game devices  
Mobile AV devices  
Digital still cameras  
Digital video cameras  
Electronic power meters  
DVD recorders  
TVs, VCRs  
Mobile phones, PHS  
Car navigation  
„ Package  
Drawing Code  
Package Name  
SNT-8A  
Package  
PH008-A  
Tape  
PH008-A  
Reel  
Land  
PH008-A  
PH008-A  
Seiko Instruments Inc.  
1
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Pin Configuration  
SNT-8A  
Top view  
8
7
6
5
VDD  
SDA  
SCL  
INT2  
32KO  
XOUT  
XIN  
1
2
3
4
VSS  
Figure 1 Pin Configuration (S-35392A-I8T1G)  
„ List of Pin  
Table 1  
Pin No.  
1
Symbol  
Description  
Pin for constant output of  
32.768 kHz  
I/O  
Configuration  
Nch open-drain output  
(no protective diode at VDD)  
32KO  
Output  
2
3
4
XOUT  
XIN  
VSS  
Connection pin for crystal  
oscillator  
GND pin  
Output pin for interrupt signal  
2
Nch open-drain output  
(no protective diode at VDD)  
CMOS input  
(no protective diode at VDD)  
Nch open-drain output  
5
Output  
INT2  
SCL  
6
Input pin for serial clock  
Input  
7
8
SDA  
VDD  
I/O pin for serial data  
Bi-directional (no protective diode at VDD)  
CMOS input  
Pin for positive power supply  
2
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Pin Function  
SDA (I/O for serial data) pin  
This pin is to data input/output for I2C-bus interface. This pin inputs/outputs data by synchronizing with a clock pulse  
from the SCL pin. This pin has CMOS input and Nch open drain output. Generally in use, pull up this pin to the VDD  
potential via a resistor, and connect it to any other device having open drain or open collector output with wired-OR  
connection.  
SCL (input for serial clock) pin  
This pin is to input a clock pulse for I2C-bus interface. The SDA pin inputs/outputs data by synchronizing with the clock  
pulse.  
XIN, XOUT (crystal oscillator connect) pin  
Connect a crystal oscillator between XIN and XOUT.  
32KO (constant output of 32.768 kHz) pin  
This is an output pin for 32.768 kHz. This pin constantly outputs a clock pulse after power-on.  
(output for interrupt signal 2) pin  
INT2  
This pin outputs a signal of interrupt, or a clock pulse. By using the status register 2, users can select either of; alarm  
interrupt, output of user-set frequency, per-minute edge interrupt or minute-periodical interrupt 1. This pin has Nch open  
drain output.  
VDD (positive power supply) pin  
Connect this VDD pin with a positive power supply. Regarding the values of voltage to be applied, refer to „  
Recommended Operation Conditions”.  
VSS pin  
Connect this VSS pin to GND.  
„ Equivalent Circuits of I/O Pin  
SCL  
SDA  
Figure 3 SCL Pin  
Figure 2 SDA Pin  
32KO, INT2  
Figure 4 32KO Pin, INT2 Pin  
Seiko Instruments Inc.  
3
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Block Diagram  
32KO  
Divider,  
timing generator  
INT1  
controller  
XIN  
Oscillator  
INT1 register  
XOUT  
Comparator 1  
Clock correction register  
Real-time data register  
Day Month Year  
Status register 1  
Status register 2  
Day of  
the week  
Second Minute Hour  
Comparator 2  
Free register  
INT2  
INT2  
controller  
INT2 register  
Shift register  
Low power supply  
voltage detector  
VDD  
VSS  
Power-on  
detector  
SDA  
SCL  
Serial  
interface  
Constant-  
voltage circuit  
Figure 5  
4
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Absolute Maximum Ratings  
Table 2  
Parameter  
Power supply voltage  
Input voltage  
Symbol  
VDD  
VIN  
VOUT  
Topr  
Tstg  
Applicable Pin  
Rating  
Unit  
V
V
V
°C  
°C  
V
V
V
SS 0.3 to VSS + 6.5  
SS 0.3 to VSS + 6.5  
SS 0.3 to VSS + 6.5  
40 to +85  
SCL, SDA  
Output voltage  
SDA, 32KO,  
INT2  
Operating ambient temperature*1  
Storage temperature  
55 to +125  
*1. Conditions with no condensation or frost. Condensation and frost cause short circuiting between pins, resulting in a  
malfunction.  
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical  
damage. These values must therefore not be exceeded under any conditions.  
„ Recommended Operation Conditions  
Table 3  
(VSS = 0 V)  
Parameter  
Symbol  
VDD  
Conditions  
Ta = 40 to +85°C  
Ta = 40 to +85°C  
Min.  
1.3  
DET 0.15  
Typ.  
3.0  
Max.  
5.5  
5.5  
7
Unit  
V
V
Power supply voltage *1  
Time keeping power supply voltage *2 VDDT  
Crystal oscillator CL value  
V
CL  
6
pF  
*1. The power supply voltage that allows communication under the conditions shown in Table 8 of „ AC Electrical  
Characteristics”.  
*2. The power supply voltage that allows time keeping. For the relationship with VDET (low power supply voltage detection  
voltage), refer to „ Characteristics (Typical Data)”.  
„ Oscillation Characteristics  
Table 4  
(Ta = 25°C, VDD = 3.0 V, VSS = 0 V, VT-200 crystal oscillator (CL = 6 pF, 32.768 kHz) manufactured by Seiko Instruments Inc.)  
Parameter  
Symbol  
VSTA  
tSTA  
δIC  
δV  
Cg  
Conditions  
Within 10 seconds  
Min.  
1.1  
10  
3  
Typ.  
8
Max.  
5.5  
1
+10  
+3  
Unit  
V
s
ppm  
ppm/V  
pF  
Oscillation start voltage  
Oscillation start time  
IC-to-IC frequency deviation*1  
Frequency voltage deviation  
External capacitance  
VDD = 1.3 to 5.5 V  
Applied to XIN pin  
Applied to XOUT pin  
9.1  
Internal oscillation capacitance  
*1. Reference value  
Cd  
pF  
Seiko Instruments Inc.  
5
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ DC Electrical Characteristics  
Table 5 DC Characteristics (VDD = 3.0 V)  
(Ta = −40 to +85°C, VSS = 0 V, VT=200 crystal oscillator (CL = 6 pF, 32.768 kHz, Cg = 9.1 pF) manufactured by Seiko Instruments Inc.)  
Parameter  
Current consumption 1  
Symbol  
IDD1  
Applicable Pin  
Conditions  
Min.  
Typ.  
0.45  
Max.  
1.13  
Unit  
µA  
Out of communication  
During communication  
(SCL = 100 kHz)  
VIN = VDD  
Current consumption 2  
IDD2  
6
14  
µA  
Input current leakage 1  
Input current leakage 2  
Output current leakage 1 IOZH  
IIZH  
IIZL  
SCL, SDA  
SCL, SDA  
0.5  
0.5  
0.5  
0.5  
0.8 × VDD  
SS 0.3  
3
5
0.5  
0.5  
0.5  
0.5  
µA  
µA  
µA  
µA  
V
V
mA  
mA  
VIN = VSS  
VOUT = VDD  
VOUT = VSS  
SDA, 32KO,  
INT2  
INT2  
Output current leakage 2 IOZL  
5
SDA, 32KO,  
SCL, SDA  
SCL, SDA  
Input voltage 1  
Input voltage 2  
Output current 1  
VIH  
VIL  
IOL1  
IOL2  
VSS + 5.5  
0.2 × VDD  
V
VOUT = 0.4 V  
VOUT = 0.4 V  
32KO,  
SDA  
INT2  
Output current 2  
10  
Power supply voltage  
detection voltage  
VDET  
0.65  
1
1.35  
V
Table 6 DC Characteristics (VDD = 5.0 V)  
(Ta = −40 to +85°C, VSS = 0 V, VT-200 crystal oscillator (CL = 6 pF, 32.768 kHz, Cg = 9.1 pF) manufactured by Seiko Instruments Inc.)  
Parameter  
Current consumption 1  
Symbol  
IDD1  
Applicable Pin  
Conditions  
Min.  
Typ.  
0.6  
Max.  
1.4  
Unit  
µA  
Out of communication  
During communication  
(SCL = 100 kHz)  
VIN = VDD  
Current consumption 2  
IDD2  
14  
30  
µA  
Input current leakage 1  
Input current leakage 2  
Output current leakage 1 IOZH  
IIZH  
IIZL  
SCL, SDA  
SCL, SDA  
0.5  
0.5  
0.5  
0.5  
0.8 × VDD  
SS 0.3  
5
6
0.5  
0.5  
0.5  
0.5  
µA  
µA  
µA  
µA  
V
V
mA  
mA  
VIN = VSS  
VOUT = VDD  
VOUT = VSS  
SDA, 32KO,  
INT2  
INT2  
Output current leakage 2 IOZL  
8
SDA, 32KO,  
SCL, SDA  
SCL, SDA  
Input voltage 1  
Input voltage 2  
Output current 1  
VIH  
VIL  
IOL1  
IOL2  
VSS + 5.5  
0.2 × VDD  
V
VOUT = 0.4 V  
VOUT = 0.4 V  
32KO,  
SDA  
INT2  
Output current 2  
13  
Power supply voltage  
detection voltage  
VDET  
0.65  
1
1.35  
V
6
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ AC Electrical Characteristics  
VDD  
Table 7 Measurement Conditions  
Input pulse voltage  
Input pulse rise/fall time  
VIH = 0.9 × VDD, VIL = 0.1 × VDD  
20 ns  
R = 1 kΩ  
Output determination voltage VOH = 0.5 × VDD, VOL = 0.5 × VDD  
Output load 100 pF + pull-up resistor 1 kΩ  
SDA  
C = 100 pF  
Remark The power supplies of the IC  
and load have the same  
electrical potential.  
Figure 6 Output Load Circuit  
Table 8 AC Electrical Characteristics  
(Ta = 40 to +85°C)  
VDD *2 1.3 V  
VDD *2 3.0 V  
Parameter  
Symbol  
Unit  
Min.  
0
4.7  
4
Typ.  
Max.  
100  
Min.  
0
Typ.  
Max.  
400  
0.9  
SCL clock frequency  
SCL clock low time  
fSCL  
kHz  
µs  
µs  
µs  
µs  
µs  
ns  
tLOW  
tHIGH  
tPD  
1.3  
0.6  
SCL clock high time  
SDA output delay time*1  
Start condition setup time  
Start condition hold time  
Data input setup time  
Data input hold time  
Stop condition setup time  
SCL, SDA rise time  
SCL, SDA fall time  
3.5  
1
0.3  
tSU.STA  
tHD.STA  
tSU.DAT  
tHD.DAT  
tSU.STO  
tR  
4.7  
4
250  
0
4.7  
0.6  
0.6  
100  
0
0.3  
0.3  
µs  
µs  
µs  
µs  
µs  
ns  
0.6  
1.3  
tF  
Bus release time  
Noise suppression time  
tBUF  
tI  
4.7  
100  
50  
*1. Since the output format of the SDA pin is Nch open-drain output, SDA output delay time is determined by the values of  
the load resistance (RL) and load capacity (CL) outside the IC. Therefore, use this value only as a reference value.  
*2. Regarding the power supply voltage, refer to „ Recommended Operation Conditions”.  
tR  
tF  
tHIGH  
tLOW  
SCL  
tSU.STO  
tHD.DAT  
tSU.DAT  
tHD.STA  
tSU.STA  
SDA  
(Input from  
S-35392A)  
tBUF  
tPD  
SDA  
(Output from  
S-35392A)  
Figure 7 Bus Timing  
Seiko Instruments Inc.  
7
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Configuration of Data Communication  
1. Configuration of data communication  
For data communication, the master device in the system generates a start condition for the S-35392A. Next, the master  
device transmits 4-bit device code “0110”, 3-bit command and 1-bit Read/Write command to the SDA bus. After that,  
output or input is performed from B7 of data. If data I/O has been completed, finish communication by inputting a stop  
condition to the S-35392A. The master device generates an acknowledgment signal for every 1-byte. Regarding details,  
refer to “„ Serial Interface”.  
Read/Write bit  
Start condition  
Acknowledgment bit  
Device code  
Command  
C1  
STA  
0
1
1
0
C2  
C0  
R / W ACK  
Stop condition  
1-byte data  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
ACK  
STP  
Figure 8 Data Communication  
8
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
2. Configuration of command  
8 types of command are available for the S-35392A, The S-35392A does Read/Write the various registers by inputting  
these fixed codes and commands. The S-35392A does not perform any operation with any codes and commands other  
than those below.  
Table 9 List of Command  
Device  
Code  
Command  
Description  
Data  
C2 C1 C0  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
0
0
0
0
0
1
Status register 1 access  
Status register 2 access  
RESET*1 12/24 SC0*2 SC1*2 INT1*3 INT2*3 BLD*4 POC*4  
INT1FE INT1ME INT1AE SC2*2 INT2FE INT2ME INT2AE TEST*5  
Y1  
M1  
D1  
W1  
H1  
m1  
s1  
H1  
m1  
s1  
Y2  
M2  
D2  
W2  
H2  
m2  
s2  
H2  
m2  
s2  
Y4  
M4  
D4  
W4  
H4  
m4  
s4  
H4  
m4  
s4  
Y8  
M8  
D8  
Y10  
M10  
D10  
Y20  
Y40  
Y80  
*6  
*6  
*6  
*6  
*6  
D20  
Real-time data 1 access  
(year data to)  
*6  
*6  
*6  
*6  
*6  
0
0
1
1
1
0
0
1
0
*6  
H8  
m8  
s8  
H8  
m8  
s8  
H10  
m10  
s10  
H10  
m10  
s10  
H20 AM/PM  
m20  
s20  
H20 AM/PM  
m20  
s20  
*6  
m40  
s40  
*6  
*6  
Real-time data 2 access  
(hour data to)  
*6  
m40  
s40  
*6  
INT1 register access  
(alarm time 1: week/hour/minute)  
(INT1AE = 1, INT1ME = 0,  
INT1FE = 0)  
*6  
*6  
*6  
*6  
W1  
H1  
m1  
W2  
H2  
m2  
W4  
H4  
m4  
A1WE  
0110  
H8  
m8  
H10  
m10  
H20 AM/PM A1HE  
m20 m40 A1mE  
INT1 register access  
(free register)  
SC3*2 SC4*2 SC5*2 SC6*2 SC7*2 SC8*2 SC9*2 SC10*2  
(settings other than alarm time 1)  
INT2 register access  
(alarm time 2: week/hour/minute)  
(INT2AE = 1, INT2ME = 0,  
INT2FE = 0)  
*6  
*6  
*6  
*6  
W1  
H1  
m1  
W2  
H2  
m2  
W4  
H4  
m4  
A2WE  
H20 AM/PM A2HE  
m20 m40 A2mE  
H8  
m8  
H10  
m10  
1
0
1
INT2 register access  
(
output of user-set frequency  
)
1 Hz  
2 Hz  
4 Hz  
8 Hz  
16 Hz SC11*2 SC12*2 SC13*2  
(INT2ME = 0, INT2FE = 1)  
Clock correction register access  
Free register access  
1
1
1
1
0
1
V0  
F0  
V1  
F1  
V2  
F2  
V3  
F3  
V4  
F4  
V5  
F5  
V6  
F6  
V7  
F7  
*1. Write-only flag. The S-35392A initializes by writing “1” in this register.  
*2. Scratch bit. A R/W-enabled, user-free register.  
*3. Read-only flag. Valid only when using the alarm function. When the alarm time matches, this flag is set to “1”, and it is  
cleared to “0” when Read.  
*4. Read-only flag. “POC” is set to “1” when power is applied. It is cleared to “0” when Read. Regarding “BLD”, refer to “„  
Low Power Supply Voltage Detection Circuit”.  
*5. Test bit for SII. Be sure to set “0” in use.  
*6. No effect by Write. It is “0” when Read.  
Seiko Instruments Inc.  
9
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Configuration of Register  
1. Real-time data register  
The real-time data register is a 7-byte register that stores the data of year, month, day, day of the week, hour, minute, and  
second in the BCD code. To Write/Read real-time data 1 access, transmit/receive the data of year in B7, month, day, day  
of the week, hour, minute, second in B0, in 7-byte. When you skip the procedure to access the data of year, month, day,  
day of the week, Read/Write real-time data 2 access. In this case, transmit/receive the data of hour in B7, minute, second  
in B0, in 3-byte.  
Year data (00 to 99)  
Start bit of real-time data 1 data access  
Y1  
B7  
Y2  
Y40  
Y4  
Y8  
Y10 Y20  
Y80  
B0  
Month data (01 to 12)  
M1  
B7  
M2  
M4  
M8 M10  
0
0
0
B0  
Day data (01 to 31)  
D1  
B7  
D2  
D4  
D8  
D10 D20  
0
0
0
B0  
Day of the week data (00 to 06)  
W1  
B7  
W2  
W4  
0
0
0
0
B0  
Hour data (00 to 23 or 00 to 11)  
Start bit of real-time data 2 data access  
H2  
H1  
B7  
H4  
H8  
H10 H20  
0
AM / PM  
B0  
Minute data (00 to 59)  
m1  
B7  
m2  
m4  
m8  
m10 m20 m40  
0
B0  
Second data (00 to 59)  
s1  
s2  
s4  
s8  
s10 s20  
s40  
0
B7  
B0  
Figure 9 Real-Time Data Register  
10  
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
Year data (00 to 99): Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80  
Sets the lower two digits of the Western calendar year (00 to 99) and links together with the auto calendar  
function until 2099.  
Example: 2053 (Y1, Y2, Y4, Y8, Y10, Y20, Y40, Y80) = (1, 1, 0, 0, 1, 0, 1, 0)  
Month data (01 to 12): M1, M2, M4, M8, M10  
Example: December (M1, M2, M4, M8, M10, 0, 0, 0) = (0, 1, 0, 0, 1, 0 ,0 ,0)  
Day data (01 to 31): D1, D2, D4, D8, D10, D20  
The count value is automatically changed by the auto calendar function.  
1 to 31: Jan., Mar., May, July, Aug., Oct., Dec., 1 to 30: April, June, Sep., Nov.  
1 to 29: Feb. (leap year), 1 to 28: Feb. (non-leap year)  
Example: 29 (D1, D2, D4, D8, D10, D20, 0, 0) = (1, 0, 0, 1, 0, 1, 0, 0)  
Day of the week data (00 to 06): W1, W2, W4  
A septenary up counter. Day of the week is counted in the order of 00, 01, 02, …, 06, and 00. Set up day of the  
week and the count value.  
Hour data (00 to 23 or 00 to 11): H1, H2, H4, H8, H10, H20, AM / PM  
In a 12-hour expression, write 0; AM, 1; PM in the AM/PM bit. In a 24-hour expression, users can Write either  
0 or 1. 0 is read when the hour data is from 00 to 11, and 1 is read when from 12 to 23.  
Example (12-hour expression): 12 p.m. (H1, H2, H4, H8, H10, H20, AM/PM, 0) = (0, 1, 0, 0, 1, 0, 1, 0)  
Example (24-hour expression): 22  
(H1, H2, H4, H8, H10, H20, AM/PM, 0) = (0, 1, 0, 0, 0, 1, 1, 0)  
Minute data (00 to 59): m1, m2, m4, m8, m10, m20, m40  
Example: 32 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (0, 1, 0, 0, 1, 1, 0, 0)  
Example: 55 minutes (m1, m2, m4, m8, m10, m20, m40, 0) = (1, 0, 1, 0, 1, 0, 1, 0)  
Second data (00 to 59): s1, s2, s4, s8, s10, s20, s40  
Example: 19 seconds (s1, s2, s4, s8, s10, s20, s40, 0) = (1, 0, 0, 1, 1, 0, 0, 0)  
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2. Status register 1  
Status register 1 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below.  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
B7  
RESET  
W
12 / 24  
R/W  
SC0  
R/W  
SC1  
R/W  
INT1  
R
INT2  
R
BLD  
R
POC  
R
R:  
Read  
Write  
Read/Write  
W:  
R/W:  
Figure 10 Status Register 1  
B0 : POC  
This flag is used to confirm whether the power is on. The power-on detector operates at power-on and B0 is set to “1”.  
This flag is Read-only. Once it is read, it is automatically set to “0”. When this flag is “1”, be sure to initialize. Regarding  
the operation after power-on, refer to „ Power-on Detection Circuit and Register Status”.  
B1 : BLD  
This flag is set to “1” when the power supply voltage decreases to the level of detection voltage (VDET) or less. Users  
can detect a drop in the power supply voltage. This flag is set to “1” once, is not set to “0” again even if the power  
supply increases to the level of detection voltage (VDET) or more. This flag is Read-only. When this flag is “1”, be sure  
to initialize. Regarding the operation of the power supply voltage detection circuit, refer to „ Low Power Supply  
Detection Circuit”.  
B2 : INT2, B3 : INT1  
This flag indicates the time set by alarm and when the time has reached it. This flag is set to “1” when the time that  
users set by using the alarm function has come. The INT1 flag in “1” in the alarm 1 function mode, the INT2 flag in “1”  
in the alarm 2 interrupt mode. This flag is Read-only. This flag is read once, is set to “0” automatically.  
B4 : SC1, B5 : SC0  
These flags are SRAM type registers, they are 2 bits as a whole, can be freely set by users.  
B6 : 12 / 24  
This flag is used to set 12-hour or 24-hour expression.  
0 : 12-hour expression  
1 : 24-hour expression  
B7 : RESET  
The internal IC is initialized by setting this bit to “1”. This bit is Write-only. It is always “0” when Read. When applying  
the power supply voltage to the IC, be sure to write “1” to this bit to initialize the circuit. Regarding each status of data  
after initialization, refer to „ Register Status After Initialization”.  
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3. Status register 2  
Status register 2 is a 1-byte register that is used to display and set various modes. The bit configuration is shown below.  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
B7  
INT2FE  
R/W  
INT2ME  
R/W  
INT2AE  
R/W  
TEST  
R/W  
INT1FE  
R/W  
INT1AE  
R/W  
SC2  
R/W  
INT1ME  
R/W  
R/W: Read/Write  
Figure 11 Status Register 2  
B0 : TEST  
This is a test flag for SII. Be sure to set this flag to “0” in use. If this flag is set to “1”, be sure to initialize to set “0”.  
B1 : INT2AE, B2 : INT2ME, B3 : INT2FE  
These bits are used to select the output mode for the  
pin. Table 10 shows how to select the mode. To use  
INT2  
alarm 2 interrupt, access the INT2 register after setting the alarm interrupt mode.  
Table 10 Output Modes for INT2 Pin  
INT2AE  
0
INT2ME  
INT2FE  
INT2 Pin Output Mode  
0
0
1
1
0
0
1
0
1
0
No interrupt  
*1  
Output of user-set frequency  
Per-minute edge interrupt  
Minute-periodical interrupt 1 (50% duty)  
Alarm 2 interrupt  
*1  
*1  
1
*1. Don’t care (Both of 0 and 1 are acceptable).  
B4 : SC2  
This is an SRAM type register that can be freely set by users.  
B5 : INT1AE, B6 : INT1ME, B7 : INT1FE  
To use the alarm 1 function, access the INT register 1 after setting INT1AE = “1”, INT1ME = “0”, and INT1FE = “0”.  
In other settings than this, these flags are disable for setting the alarm time (free registers).  
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4. INT1 register and INT2 register  
The INT1 register is to set up the alarm time. The INT2 register is to set up the output of user-set frequency or alarm  
interrupt. To switch the output mode, use the status register 2.  
The INT1 register works as an alarm-time data register in the alarm 1 interrupt mode selected by users. The INT1 flag (B3  
in the status register) displays the alarm time when it matches.  
The INT2 register works as an alarm-time data register in the alarm interrupt mode selected by using the status register 2.  
In the mode output of user-set frequency, the INT2 register works as a data register to set up the frequency for output  
clock. Clock pulse and output of alarm interrupt are output from the  
register) displays the alarm time when it matches.  
pin. And The INT2 flag (B2 in the status  
INT2  
(1) Alarm interrupt  
Users can set the alarm time (the data of day of the week, hour, minute) by using the INT1 and INT2 registers which  
are 3-byte data registers. The configuration of register is as well as the data register of day of the week, hour, minute,  
in the real-time data register; is expressed by the BCD code. Do not set a nonexistent day. Users are necessary to set  
up the alarm-time data according to the 12/24 hour expression that they set by using the status register 1.  
INT1 register  
W1 W2  
INT2 register  
W1  
A1WE  
W4  
0
0
W2  
W4  
0
0
0
A2WE  
0
0
0
B7  
B0  
B7  
B0  
AM /  
PM  
AM /  
PM  
H2 H4 H8  
A1HE  
A2HE  
H1  
B7  
H20  
H20  
H10  
H1 H2 H4 H8 H10  
B7  
B0  
B0  
m1  
B7  
m8 m10 m20 m40 A1mE  
B0  
m2  
m4  
m1  
B7  
m20 m40  
A2mE  
m8 m10  
m2 m4  
B0  
Figure 12 INT1 Register and INT2 Register (Alarm-Time Data)  
The INT1 register has A1WE, A1HE, A1mE at B0 in each byte. It is possible to make data valid; the data of day of the  
week, hour, minute which are in the corresponded byte; by setting these bits to “1”. This is as well in A2WE, A2HE,  
A2mE in the INT2 register.  
Setting example: alarm time “7:00 pm” in the INT1 register  
(a) 12-hour expression (status register 1 B6 = 0)  
set up 7:00 PM  
Data written to INT1 register  
*1  
*1  
*1  
*1  
*1  
*1  
*1  
Day of the week  
Hour  
0
1
1
1
1
0
0
0
1
Minute  
0
B7  
0
0
0
0
0
0
1
B0  
*1. Don’t care (Both of 0 and 1 are acceptable).  
(b) 24-hour expression (status register 1 B6 = 1)  
set up 19:00 PM  
Data written to INT1 register  
*1  
*1  
*1  
*1  
*1  
*1  
*1  
Day of the week  
Hour  
1
0
0
1
1
0
0
1
0
1
0
0
0
1*2  
0
Minute  
0
0
B7  
B0  
*1. Don’t care (Both of 0 and 1 are acceptable).  
AM/ PM  
*2. Set up the  
flag along with the time setting.  
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(2) Free register (INT1 register)  
The INT1 register is a 1-byte SRAM type register that can be set freely by users.  
B6  
B5  
B4  
B3  
SC7  
R/W  
B2  
B1  
B0  
B7  
SC3  
R/W  
SC8  
R/W  
SC9  
R/W  
SC10  
R/W  
SC4  
R/W  
SC5  
R/W  
SC6  
R/W  
R/W: Read/Write  
Figure 13 INT1 Register (Free Register)  
(3) Output of user-set frequency (INT2 register)  
The INT2 register is a 1-byte data register to set up the output frequency. Setting each bit B7 to B3 in the register to  
“1”, the frequency which corresponds to the bit is output in the AND-form. SC11 to SC13 in the INT2 register are 3-bit  
SRAM type registers that can be freely set by users.  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
B7  
1 Hz  
R/W  
16 Hz  
R/W  
SC11  
R/W  
SC12  
R/W  
SC13  
R/W  
2 Hz  
R/W  
4 Hz  
R/W  
8 Hz  
R/W  
R/W: Read/Write  
Figure 14 INT2 Register (Data Register for Output Frequency)  
Example: B7 to B3 = 50h  
16 Hz  
8 Hz  
4 Hz  
2 Hz  
1 Hz  
INT2 pin output  
Status register 2  
Set to INT2FE = 1  
Figure 15 Example of Output from INT2 Register (Data Register for Output Frequency)  
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5. Clock-correction register  
The clock-correction register is a 1-byte register that is used to correct advance/delay of the clock. When not using this  
function, set this register to “00h”. Regarding the register values, refer to „ Function to Clock-Correction”.  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
B7  
V4  
V5  
V6  
V7  
V0  
V1  
V2  
V3  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W: Read/Write  
Figure 16 Clock-Correction Register  
6. Free register  
The free register is a 1-byte SRAM type register that can be set freely by users.  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
B7  
F4  
F5  
F6  
F7  
F0  
F1  
F2  
F3  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W: Read/Write  
Figure 17 Free Register  
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„ Power-on Detector and Register Status  
The power-on detection circuit operates by power-on the S-35392A, as a result each register is cleared; each register is set  
as follows.  
Real-time data register :  
Status register 1 :  
Status register 2 :  
INT1 register :  
00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S)  
“01h”  
“01h”  
“80h”  
“00h”  
“00h”  
“00h”  
INT2 register :  
Clock correction register :  
Free register :  
“1” is set in the POC flag (B0 in the status register 1) to indicate that power has been applied. In this case, be sure to  
initialize. The POC flag is set to “0” due to initialization. (Refer to “„ Register Status After Initialization”.)  
For the regular operation of power-on detection circuit, as seen in Figure 18, the period to power-up the S-35392A is that  
the voltage reaches 1.3 V within 10 ms after setting the IC’s power supply voltage at 0 V. When the POC flag (B0 in the  
status register) is not in “1”, in this case, power-on the S-35392A once again.  
Do not transmit data immediately after power-on at least 0.5 sec because the power-on detection circuit is operating.  
Within 10 ms  
1.3 V  
0 V*1  
*1. 0 V indicates that there are no potential differences between the VDD  
pin and VSS pin of the S-35392A.  
Figure 18 How to Raise the Power Supply Voltage  
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„ Register Status After Initialization  
The status of each register after initialization is as follows.  
Real-time data register :  
Status register 1 :  
00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S)  
“0 B6 B5 B4 0 0 0 0 b”  
(In B6, B5, B4, the data of B6, B5, B6 in the status register 1 at initialization is set.  
Refer to Figure 19.)  
“00h”  
“00h”  
“00h”  
“00h”  
“00h”  
Status register 2 :  
INT1 register :  
INT2 register :  
Clock correction register :  
Free register :  
Read from status register 1  
9
Write to status register 1  
18  
0
1
9
18  
0
1
SCL  
SDA  
R / W  
R / W  
1
0 0 0 0  
0 1 1 0 0 0 0 0  
1
0
L L L L  
L
H
0
0 1 1 0 0 0 0  
1
L L  
Device code + command  
Device code + command  
B7 B5 : Not reset  
B5  
B7  
Write “1” to reset flag and SC0.  
: Output from S-35392A  
: Input from master device  
Figure 19 Status Register 1 Data at Initialization  
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„ Low Power Supply Voltage Detection Circuit  
The S-35392A has a low power supply voltage detection circuit, so that users can monitor drops in the power supply  
voltage by reading the BLD flag (B1 in the status register 1). There is a hysteresis width of approx. 0.15 V (Typ.) between  
detection voltage and release voltage (refer to “„ Characteristics (Typical Data)”). The low power supply voltage  
detection circuit does the sampling operation only once in one sec for 15.6 ms.  
If the power supply voltage decreases to the level of detection voltage (VDET) or less, “1” is set to the BLD flag so that  
sampling operation stops. Once “1” is detected in the BLD flag, no sampling operation is performed even if the power  
supply voltage increases to the level of release voltage or more, and “1” is held in the BLD flag. After initialization, or once  
the BLD flag is read, the BLD flag is automatically set to “0” to restart the sampling operation.  
If the BLD flag is “1” even after the power supply voltage is recovered, be sure to initialize the circuit. Without initializing,  
Read in the next BLD flag is done after sampling, the BLD flag gets reset to “0”. In this case, be sure to initialize although  
the BLD flag is in “0” because the internal circuit may be in the indefinite status.  
VDD  
Hysteresis width  
0.15 V approximately  
Release voltage  
Detection voltage  
BLD flag  
reading  
1 s  
1 s  
Stop  
Stop  
Stop  
15.6 ms  
Sampling pulse  
BLD flag  
Figure 20 Timing of Low Power Supply Voltage Detection Circuit  
„ Circuits Power-on and Low Power Supply Voltage Detection  
Figure 21 shows the changes of the POC flag and BLD flag due to VDD fluctuation.  
Low power supply  
voltage detection  
voltage  
Low power supply  
voltage detection  
voltage  
VDD  
VSS  
POC flag  
BLD flag  
Status register 1  
reading  
Figure 21 POC Flag and BLD Flag  
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„ Correction of Nonexistent Data and End-of-Month  
When users write the real-time data, the S-35392A checks it. In case that the data is invalid, the S-35392A does the  
following procedures.  
1. Processing of nonexistent data  
Table 11 Processing of Nonexistent Data  
Register  
Year data  
Month data  
Day data  
Day of the week data  
Normal Data  
00 to 99  
01 to 12  
01 to 31  
0 to 6  
Nonexistent Data  
XA to XF, AX to FX  
00, 13 to 19, XA to XF  
00, 32 to 39, XA to XF  
7
Result  
00  
01  
01  
0
24-hour  
12-hour  
0 to 23  
0 to 11  
00 to 59  
00 to 59  
24 to 29, 3X, XA to XF  
12 to 19, 2X, 3X, XA to XF  
60 to 79, XA to XF  
60 to 79, XA to XF  
00  
00  
00  
00  
Hour data *1  
Minute data  
Second data *2  
*1. In a 12-hour expression, Write the AM/PM flag (B1 in hour data in the real-time data register).  
In 24-hour expression, the AM/PM flag in the real-time data register is omitted. However in the flag in Read, users are  
able to read 0; 0 to 11, 1; 12 to 23.  
*2. Processing of nonexistent data, regarding second data, is done by a carry pulse which is generated one sec after, after  
Write. At this point the carry pulse is sent to the minute-counter.  
2. Correction of end-of-month  
A nonexistent day, such as February 30 and April 31, is set to the first day of the next month.  
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INT2  
„ Alarm 1 Function and  
Pin Output Mode  
In the output mode for  
pin, users are able to select the output;  
INT2  
alarm 2 interrupt, user-set frequency, per-minute edge interrupt, minute-periodical interrupt. To switch the output mode for  
pin and the alarm 1 function, use the status register 2. Refer to 3. Status register 2 in “„ Configuration of  
INT2  
Register”.  
When switching the output mode for  
pin, be careful of the output status of the pin. Especially, when using alarm 2  
INT2  
interrupt output, or the output of user-set frequency, switch the output mode after setting “00h” in the INT2 register. In  
per-minute edge interrupt output/minute-periodical interrupt output, it is unnecessary to set data in the INT2 register for  
users.  
Refer to the followings regarding each operation of output modes.  
1. Alarm 1 function and alarm 2 interrupt  
Alarm 2 interrupt output is the function to set the INT2 flag “H” by the output “L” from the INT2 pin, at the alarm time  
which is set by user has come. If setting the pin output to “H”, turn off the alarm function by setting “0” in INT2AE in the  
status register 2.  
By Read, the INT2 flag is once cleared automatically. In the alarm 1 function, the INT1 flag (B3 in the status register1) is  
set to “H” when the set time has come. The INT1 flag is also cleared once by Read.  
In the alarm 1 function, set the data of day of the week, hour, minute of the alarm time in the INT1 register. In alarm 2  
interrupt, set in the INT2 register. Refer to “4. INT1 register and INT2 register” in „ Configuration of Register”.  
Alarm setting of “W (day of the week), H (hour), m (minute)”  
INTx register alarm enable flag  
AxHE = AxmE = AxWE = "1"  
Status register 2 setting  
Alarm 1 function  
INT1ME = INT1FE = 0  
Alarm 2 interrupt  
INT1 register  
INT2 register  
INT2ME = INT2FE = 0  
mx  
Hx  
Wx  
Alarm 1 output  
(B3 in status register 1)  
Comparator  
Alarm 2 interrupt (INT2 pin)/  
alarm 2 output  
(B2 in status register 1)  
Day of  
the week  
Second Minute Hour  
Real-time data  
Day Month Year  
W (day of the week)  
59 s  
H h 00 m 00 s  
Change by program  
01 s  
H h (m 1) m 59 s  
H h (m + 1) m 00 s  
Real-time data  
Change by program  
Change by program  
INT1AE/INT2AE  
Status register 1 reading  
Alarm time matches  
Alarm time matches  
INT1 flag/  
INT2 flag  
*1  
OFF  
Period when alarm time matches  
INT2 pin  
*1. If users clear INT2AE once; “L” is not output from the INT2 pin by setting INT2AE enable again, within a period when  
the alarm time matches real-time data.  
Figure 22 Alarm Interrupt Output Timing (1/2)  
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Alarm setting of “H (hour)”  
Status register 2 setting  
Alarm 1 function  
INT1ME = INT1FE = 0  
Alarm 2 interrupt  
INT2ME = INT2FE = 0  
INTx register alarm enable flag  
AxmE = AxWE = "0", AxHE = "1"  
INT1 register  
INT2 register  
mx  
Hx  
Wx  
Dx  
Mx  
Yx  
Alarm 1 output  
(B3 in status register 1)  
Comparator  
Alarm 2 interrupt (INT2 pin)/  
alarm 2 output  
(B2 in status register 1)  
Day of  
Day  
Second  
Month  
59 s  
Minute Hour  
Year  
the week  
Real-time data  
Real-time data  
H h 00 m 00 s 01 s  
Change by program  
H h 01 m 00 s  
H h 59 m 59 s (H + 1) h 00 m 00 s  
(H 1) h 59 m 59 s  
Change by program  
Change by program  
Change by program  
INT1AE/INT2AE  
Status register 1 reading  
Status register 1 reading  
Alarm time matches  
Alarm time matches  
INT1 flag/  
INT2 flag  
*1  
Alarm time  
matches*2  
*1  
OFF  
OFF  
INT2 pin  
Period when alarm time matches  
*1. If users clear INT2AE once; “L” is not output from the INT2 pin by setting INT2AE enable again, within a period when  
the alarm time matches real-time data.  
*2. If turning the alarm output on by changing the program, within the period when the alarm time matches real-time data,  
“L” is output again from the INT2 pin when the minute is counted up.  
Figure 23 Alarm Interrupt Output Timing (2/2)  
2. Output of user-set frequency  
The output of user-set frequency is the function to output the frequency which is selected by using data, from the INT2  
pin, in the AND-form. Set up the data of frequency in the INT2 register.  
Refer to “4. INT1 register and INT2 register” in „ Configuration of Register”  
Status register 2 setting  
INT2 pin output mode  
Change by program  
INT2AE = Don’t care (0 or 1), INT2ME = 0  
INT2FE  
Free-run output starts  
OFF  
INT2 pin  
Figure 24 Output Timing of User-set Frequency  
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3. Per-minute edge interrupt output  
Per-minute edge interrupt output is the function to output “L” from the  
done, after selecting the output mode.  
pin, when the first minute-carry processing is  
INT2  
To set the pin output to “H”, in the  
this mode.  
pin output mode, input “0” in INT2ME in the status register 2 in order to turn off  
INT2  
Status register 2 setting  
INT2 pin output mode  
INT2AE = Don’t care (0 or 1), INT2FE = 0  
Change by program  
INT2ME  
Minute-carry  
processing  
Minute-carry processing  
OFF  
INT2 pin  
"L" is output again if this period is within 7.9 ms*1.  
*1. Pin output is set to “H” by disabling the output mode within 7.9 ms, because the signal of this procedure is maintained  
for 7.9 ms. Note that pin output is set to “L” by setting enable the output mode again.  
Figure 25 Timing of Per-Minute Edge Interrupt Output  
4. Minute-periodical interrupt output 1  
The minute-periodical interrupt 1 is the function to output the one-minute clock pulse (Duty 50%) from the  
when the first minute-carry processing is done, after selecting the output mode.  
pin,  
INT2  
Status register 2 setting  
INT2 pin output mode  
Change by program (OFF)  
INT2AE = 0  
INT2ME, INT2FE  
Minute-carry  
processing  
Minute-carry  
processing  
Minute-carry  
processing  
Minute-carry  
processing  
Minute-carry  
processing  
INT2 pin  
30 s  
30 s  
30 s  
30 s  
30 s  
30 s  
30 s  
30 s  
30 s  
"L" is output again if this period is within 7.9 ms*1.  
"H" is output again if this period is within 7.9 ms  
"L" is output at the next minute-carry processing  
*1. Setting the output mode disable makes the pin output “H”, while the output from the  
pin is in “L”.  
INT2  
Note that pin output is set to “L” by setting enable the output mode again.  
Figure 26 Timing of Minute-periodical Interrupt Output 1  
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„ Function to Clock-Correction  
The function to clock-correction is to correct advance/delay of the clock due to the deviation of oscillation frequency, in  
order to make a high precise clock. For correction, the S-35392A adjusts the clock pulse by using a certain part of the  
dividing circuit, not adjusting the frequency of the crystal oscillator. Correction is performed once every 20 seconds (or 60  
seconds). The minimum resolution is approx. 3 ppm (or approx. 1 ppm) and the S-35392A corrects in the range of 195.3 to  
+192.2 ppm (or of 65.1 to +64.1 ppm). (Refer to Table 12.) Users can set up this function by using the clock-correction  
register. Regarding how to calculate the setting data, refer to “1. How to calculate”. When not using this function, be sure  
to set “00h”.  
Table 12 Function to Clock-Correction  
B0 = 0  
B0 = 1  
Correction  
Minimum resolution  
Correction range  
Every 20 seconds  
3.052 ppm  
195.3 to +192.2 ppm  
Every 60 seconds  
1.017 ppm  
65.1 to +64.1 ppm  
24  
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
1. How to calculate  
(1) If current oscillation frequency > target frequency (in case the clock is fast)  
(Current oscillation frequency  
(Target oscillation frequency*3)  
actual measurement value*2)  
Correction value*1 = 128 Integral value  
(Current oscillation frequency  
(Minimum resolution*4)  
×
actual measurement value*2)  
Caution The figure range which can be corrected is that the calculated value is from 0 to 64.  
*1. Convert this value to be set in the clock correction register. For how to convert, refer to “(a) Calculation  
example 1”.  
*2. Measurement value when 1 Hz clock pulse is output from the INT2 pin.  
*3. Target value of average frequency when the clock correction function is used.  
*4. Refer to Table 12.  
(a) Calculation example 1  
In case of current oscillation frequency actual measurement value = 1.000070 [Hz], target oscillation frequency =  
1.000000 [Hz], B7 = 0 (Minimum resolution = 3.052 ppm)  
1.000070  
1.000000  
( )  
(
)
Correction value = 128 Integral value  
6
1.000070  
×
3.052 × 10−  
(
)
(
)
= 128 Integral value (22.93)= 128 22 = 106  
Convert the correction value “106” to 7-bit binary and obtain “1101010b”.  
Reverse the correction value “1101010b” and set it to B6 to B0 of the clock correction register.  
Thus, set the clock correction register:  
(B7, B6, B5, B4, B3, B2, B1, B0) = (0, 1, 0, 1, 0, 1, 1, 0)  
(2) If current oscillation frequency < target frequency (in case the clock is slow)  
(Current oscillation frequency  
actual measurement value)  
(Target oscillation frequency)  
+ 1  
Correction value = Integral value  
(Current oscillation frequency  
actual measurement value)  
×
(Minimum resolution)  
Caution The figure range which can be corrected is that the calculated value is from 0 to 62.  
(a) Calculation example 2  
In case of current oscillation frequency actual measurement value = 0.999920 [Hz], target oscillation frequency =  
1.000000 [Hz]. B7 = 0 (Minimum resolution = 3.052 ppm)  
1.000000  
0.999920  
( )  
(
)
Correction value = Integral value  
+ 1  
0.999920  
(
×
3.052 × 10-6  
(
)
)
= Integral value (26.21) + 1 = 26 + 1 = 27  
Thus, set the clock correction register:  
(B7, B6, B5, B4, B3, B2, B1, B0) = (1, 1, 0, 1, 1, 0, 0, 0)  
(b) Calculation example 3  
In case of current oscillation frequency actual measurement value = 0.999920 [Hz], target oscillation frequency =  
1.000000 [Hz], B7 = 1 (Minimum resolution = 1.017 ppm)  
1.000000  
0.999920  
( )  
(
)
Correction value = Integral value  
+ 1  
0.999920  
×
1.017 × 10-6  
(
)
(
)
= Integral value (78.66) + 1  
Thus, this calculated value exceeds the correctable range 0 to 62,  
B7 = “1” (minimum resolution = 1.017 ppm) indicates the correction is impossible.  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
2. Setting value for register and correction value  
Table 13 Setting Value for Register and Correction Value (Minimum Resolution: 3.052 ppm (B0 = 0))  
Correction Value  
[ppm]  
Rate  
[s/day]  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
192.3  
189.2  
186.2  
16.61  
16.35  
16.09  
0
1
0
1
0
1
1
0
0
1
1
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
0
0
0
6.1  
3.1  
0
3.1  
6.1  
9.2  
0.53  
0.26  
0
0.26  
0.53  
0.79  
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
189.2  
192.3  
195.3  
16.35  
16.61  
16.88  
Table 14 Setting Value for Register and Correction Value (Minimum Resolution: 1.017 ppm (B0 = 1))  
Correction Value  
[ppm]  
Rate  
[s/day]  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
1
0
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
1
1
1
64.1  
63.1  
62.0  
5.54  
5.45  
5.36  
0
1
0
1
0
1
1
0
0
1
1
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
2.0  
1.0  
0
1.0  
2.0  
3.0  
0.18  
0.09  
0
0.09  
0.18  
0.26  
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
63.1  
64.1  
65.1  
5.45  
5.54  
5.62  
26  
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
3. How to confirm setting value for register and result of correction  
The S-35392A does not adjust the frequency of the crystal oscillation by using the clock-correction function. Therefore  
users cannot confirm if it is corrected or not by measuring output 32.768 kHz. When the function to clock-correction is  
being used, the cycle of 1 Hz clock pulse output from the  
Figure 27.  
pin changes once in 20 times or 60 times, as shown in  
INT2  
INT2 pin  
(1 Hz output)  
a
a
b
a
a
Once  
19 times or 59 times  
B0 = 0, a : 19 times, b : Once  
B0 = 1, a : 59 times, b : Once  
Figure 27 Confirmation of Correction Result  
Measure a and b by using the frequency counter*1. Calculate the average frequency (Tave) based on the measurement  
results.  
B0 = 0, Tave = (a × 19 + b) ÷ 20  
B0 = 1, Tave = (a × 59 + b) ÷ 60  
Calculate the error of the clock based on the average frequency (Tave). The following shows an example for  
confirmation.  
Confirmation example: When B0 =0, 66h is set  
Measurement results: a = 1.000080 Hz, b = 0.998493 Hz  
Clock Correction Register Setting Value  
Before correction 00 h (Tave = a)  
Average Frequency [Hz] Per Day [s]  
1.000080  
86393  
86399.9  
After correction  
66 h (Tave = (a × 19 + b) ÷ 20) 1.00000065  
Calculating the average frequency allows to confirm the result of correction.  
*1. Use a high-accuracy frequency counter of 7 digits or more.  
Caution Measure the oscillation frequency under the usage conditions.  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Serial Interface  
The S-35392A receives various commands via I2C-bus serial interface to Read/Write data. Regarding transmission is as  
follows.  
1. Start condition  
A start condition is when the SDA line changes “H” to “L” when the SCL line is in “H”, so that the access starts.  
2. Stop condition  
A stop condition is when the SDA line changes “L” to “H” when the SCL line is in “H”, and the access stops, so that the  
S-35392A gets standby.  
tSU.STA tHD.STA  
tSU.STO  
SCL  
SDA  
Start condition  
Stop condition  
Figure 28 Start/Stop Conditions  
3. Data transfer and acknowledgment signal  
Data transmission is performed for every 1-byte, after detecting a start condition. Transmit data while the SCL line is in  
“L”, and be careful of spec of tSU.DAT and tHD. DAT when changing the SDA line. If the SDA line changes while the SCL line  
is in “H”, the data will be recognized as start/stop condition in spite of data transmission. Note that by this case, the  
access will be interrupted.  
During data transmission, every moment receiving 1-byte data, the devices which work for receiving data send an  
acknowledgment signal back. For example, as seen in Figure 29, in case that the S-35392A is the device working for  
receiving data and the master device is the one working for sending data; when the 8-bit clock pulse falls, the master  
device releases the SDA line. After that, the S-35392A sends an acknowledgment signal back, and set the SDA line to  
“L” at the 9-bit clock pulse. The S-35392A does not output an acknowledgment signal is that the access is not being  
done regularly.  
SCL  
8
9
(Input from  
S-35392A)  
1
tSU.DAT  
tHD.DAT  
SDA is released  
High-Z  
SDA  
(Output from  
master device)  
Output acknowledgment  
(“L” active)  
SDA  
High-Z  
(Output from  
S-35392A)  
Start condition  
tPD  
Figure 29 Output Timing of Acknowledgment Signal  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
The followings are Read/Write in the S-35392A.  
(1) Data Read in S-35392A  
After detecting a start condition, the S-35392A receives device code and command. The S-35392A enters the  
Read-data mode by the Read/Write bit “1”. The data is output from B7 in 1-byte. Input an acknowledgment signal  
from the master device every moment that the S-35392A outputs 1-byte data. However, do not input an  
acknowledgment signal (input NO_ACK) for the last data-byte output from the master device. This procedure  
notifies the completion of Read. Next, input a stop condition to the S-35392A to finish access.  
1-byte data  
18  
1
9
SCL  
SDA  
R/W  
B7  
0 1 1 0 0 0 0  
1
B0  
Device code + command  
Input NO_ACK after the 1st byte  
of data has been output.  
: Output from S-35392A  
: Input from master device  
Figure 30 Example of Data Read 1 (1-Byte Data Register)  
3-byte data  
1
9
36  
18  
27  
SCL  
R/W  
0 1 1 0 0 1 1  
1
SDA  
B0  
B0  
B7  
B7  
B7  
B0  
Device code + command  
: Output from S-35392A  
: Input from master device  
Input NO_ACK after the 3rd byte of  
data has been output.  
Figure 31 Example of Data Read 2 (3-Byte Data Register)  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
(2) Data Write in S-35392A  
After detecting a start condition, S-35392A receives device code and command. The S-35392A enters the Write-data  
mode by the Read/Write bit “0”. Input data from B7 to B0 in 1-byte. The S-35392A outputs an acknowledgment signal  
(“L”) every moment that 1-byte data is input. After receiving the acknowledgment signal which is for the last byte-data,  
input a stop condition to the S-35392A to finish access.  
1-byte data  
18  
1
9
SCL  
SDA  
R/W  
0 1 1 0 0 0 0 0  
B7  
B0  
Device code + command  
: Output from S-35392A  
: Input from master device  
Figure 32 Example of Data Write 1 (1-Byte Data Register)  
3-byte data  
18  
36  
1
9
27  
SCL  
R/W  
0 1 1 0 0 1 1 0  
SDA  
B7  
B0 B7  
B0  
B0  
B7  
Device code + command  
: Output from S-35392A  
: Input from master device  
Figure 33 Example of Data Read 2 (3-Byte Data Register)  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
4. Data access  
(1) Real-time data 1 access  
72  
63  
1
9
18  
SCL  
R/W  
0
1 1 0 0 1 0  
SDA  
B0  
Second data  
B7  
B0  
Year data  
B7  
Device code +  
command  
I/O mode switching  
I/O mode switching  
*1. Set NO_ACK = 1 in Read.  
*2. Transmit ACK = 0 from the master device to the S-35392A in Read.  
Figure 34 Real-Time Data 1 Access  
(2) Real-time data 2 access  
1
9
36  
18  
27  
SCL  
SDA  
R/W  
1
0
1 1 0 0 1  
B0  
B7  
B7  
B7  
B0  
B0  
Second data  
Device code +  
command  
Minute data  
Hour data  
I/O mode switching  
I/O mode switching  
*1. Set NO_ACK = 1 in Read.  
*2. Transmit ACK = 0 from the master device to the S-35392A in Read.  
Figure 35 Real-Time Data 2 Access  
(3) Status register 1 access and status register 2 access  
9
18  
1
SCL  
SDA  
R/W  
*1  
1 1 0 0 0  
0
B7  
B0  
Status data  
Device code +  
command  
I/O mode switching  
I/O mode switching  
*1. 0 : Status register 1 selected, 1 : Status register 2 selected  
*2. Set NO_ACK = 1 in Read.  
Figure 36 Status Register 1 Access and Status Register 2 Access  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
(4) INT1 register access and INT2 register access  
In Read/Write the INT1 and INT2 registers, data varies depending on the setting of the status register 2. Be sure to  
Read/Write after setting the status register 2. When setting the alarm by using the status register 2, these registers  
work as 3-byte alarm time data registers, in other statuses, they work as 1-byte registers. When outputting the  
user-set frequency, they are the data registers to set up the frequency.  
Regarding details of each data, refer to “4. INT1 register and INT2 register” in „ Configuration of Register”.  
Caution Users cannot use both functions of alarm 1 interrupt and the output of user-set frequency  
simultaneously.  
9
18  
27  
1
36  
SCL  
SDA  
R/W  
*1  
1 1 0 1 0  
0
B7  
B0  
B7  
Minute data  
B0  
B7  
B0  
Device code +  
command  
Day of the  
week data  
Hour data  
I/O mode switching  
I/O mode switching  
*1. 0 : INT1 register selected, 1 : INT2 register selected  
*2. Set NO_ACK = 1 in Read.  
*3. Transmit ACK = 0 from the master device to the S-35392A in Read.  
Figure 37 INT1 Register Access and INT2 Register Access  
9
18  
1
SCL  
SDA  
R/W  
*1  
0
1 1 0 1 0  
B7  
B0  
Device code +  
command  
Frequency  
setting data  
I/O mode switching  
I/O mode switching  
*1. 0 : INT1 register selected, 1 : INT2 register selected  
*2. Set NO_ACK = 1 in Read.  
Figure 38 INT1 Register and INT2 Register (Data Register for Output Frequency) Access  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
(5) Clock correction register access  
1
9
18  
SCL  
SDA  
R/W  
0
1 1 0 1 1 0  
B7  
B0  
Device code +  
command  
Clock  
correction data  
I/O mode switching  
I/O mode switching  
*1. Set NO_ACK = 1 in Read.  
Figure 39 Clock Correction Register Access  
(6) Free register access  
1
9
18  
SCL  
R/W  
0
1 1 0 1 1 1  
SDA  
B0  
B7  
Device code +  
command  
Free register  
data  
I/O mode switching  
*1. Set NO_ACK = 1 in Read.  
I/O mode switching  
Figure 40 Free Register Access  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Reset After Communication Interruption  
In case of communication interruption in the S-35392A, for example, during communication the power supply voltage drops  
so that only the master device is reset; the S-35392A does not operate the next procedure because the internal circuit  
keeps the state prior to interruption. The S-35392A does not have a reset pin so that users usually reset its internal circuit by  
inputting a stop condition. However, if the SDA line is outputting “L” (during output of acknowledgment signal or Read), the  
S-35392A does not accept a stop condition from the master device. In this case, users are necessary to finish  
acknowledgment output or Read the SDA line. Figure 41 shows how to reset. First, input a start condition from the master  
device (The S-35392A cannot detect a start condition because the SDA line in the S-35392A is outputting “L”). Next, input a  
clock pulse equivalent to 7-byte data access (63-clock) from the SCL line. During this, release the SDA line for the master  
device. By this procedure, SDA I/O before interruption is finished, so that the SDA line in the S-35392A is released. After  
that, inputting a stop condition resets the internal circuit so that restore the regular communication. This reset procedure is  
recommended to perform at initialization of the system after rising the master device’s power supply voltage.  
Start  
condition  
Stop  
condition  
Clocks equivalent to 7-byte data access  
1
2
8
9
62  
63  
SCL  
SDA  
(Output from  
master device)  
“L” or High-Z  
“L” or High-Z  
SDA  
(Output from  
S-35392A)  
“L”  
“L”  
High-Z  
SDA  
Figure 41 How to Reset  
34  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Flowchart of Initialization at Power-on and Example of Real-time Data Set-up  
Figure 42 shows the flowchart of initialization at power-on and an example of real-time data set-up. Regarding how to apply  
power, refer to „ Power-on Detection Circuit and Register Status”. It is unnecessary for users to comply with this  
flowchart of real-time data strictly. And if using the default data at initializing, it is also unnecessary to set up again.  
START  
Power-on  
Wait for 0.5 s  
Read status register 1  
NO  
POC = 1  
YES  
Initialization after power-on  
Initialize  
(status register 1 B7 = 1)  
Read status register 1  
NO  
POC = 0  
YES  
NO  
BLD = 0  
YES  
Set 24-hour/12-hour  
display to status register 1  
Read status register 1  
NG  
Confirm data in status  
register 1  
Example of real-time data setting  
OK  
Set real-time data 1  
Read real-time data 1  
Read status register 2  
NO  
TEST = 0  
YES  
END  
Figure 42 Example of Initialization Flowchart  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Examples of Application Circuits  
VCC  
10 kΩ  
10 kΩ  
System  
power supply  
VCC  
32KO  
VDD  
INT2  
CPU  
S-35392A  
SDA  
VSS  
SCL  
XIN  
XOUT  
VSS  
Cg  
Caution 1. Because the I/O pin has no protective diode on the VDD side, the relation of VCC VDD is possible,  
but pay careful attention to the specifications.  
2. Start communication under stable condition after power-on the power supply in the system.  
Figure 43 Application Circuit 1  
System power  
supply  
10 k  
10 kΩ  
VCC  
32KO  
INT2  
VDD  
VSS  
CPU  
S-35392A  
SDA  
SCL  
XIN  
XOUT  
VSS  
Cg  
Caution Start communication under stable condition after power-on the power supply in the system.  
Figure 44 Application Circuit 2  
Caution The above connection diagrams do not guarantee operation. Set the constants after performing  
sufficient evaluation using the actual application.  
36  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Adjustment of Oscillation Frequency  
1. Configuration of oscillator  
Since crystal oscillation is sensitive to external noise (the clock accuracy is affected), the following measures are  
essential for optimizing the oscillation configuration.  
(1) Place the S-35392A, crystal oscillator, and external capacitor (Cg) as close to each other as possible.  
(2) Increase the insulation resistance between pins and the substrate wiring patterns of XIN and XOUT.  
(3) Do not place any signal or power lines close to the oscillator.  
(4) Locating the GND layer immediately below the oscillator is recommended.  
(5) Locate the bypass capacitor adjacent to the power supply pin of the S-35392A.  
Parasitic capacitance*3  
XIN  
R
R
f
Oscillator internal constant  
standard values:  
C
g
Crystal oscillator: 32.768 kHz  
d
CL  
= 6 pF*1  
XOUT  
R
R
C
f
=
=
=
100 M  
100 kΩ  
8 pF  
Cg  
= None*2 to 9.1 pF  
d
d
Parasitic capacitance*3  
Cd  
S-35392A  
*1. When setting the value for the crystal oscillator’s CL as 7 pF, connect Cd externally if necessary.  
*2. Design the board so that the parasitic capacitance is 5 pF.  
*3. The oscillator operates unless Cg is not connected. Note that the oscillation frequency is in the direction that it  
advances.  
Figure 45 Connection Diagram 1  
S-35392A  
1
2
3
4
8
7
6
5
XOUT  
XIN  
VSS  
Crystal oscillator  
Cg  
Locate the GND layer in the  
layer immediately below  
Figure 46 Connection Diagram 2  
Caution 1. When using the crystal oscillator with a CL exceeding the rated value (7 pF) (e.g : CL = 12.5 pF),  
oscillation operation may become unstable. Use a crystal oscillator with a CL value of 6 pF or 7 pF.  
2. Oscillation characteristics is subject to the variation of each component such as substrate parasitic  
capacitance, parasitic resistance, crystal oscillator, and Cg. When configuring an oscillator, pay  
sufficient attention for them.  
Seiko Instruments Inc.  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
2. Measurement of oscillation frequency  
When the S-35392A is turned on, a signal of 32.768 kHz is output from the 32KO pin. Turn the power on and measure the  
signal with a frequency counter following the circuit configuration shown in Figure 47.  
Remark If the error range is 1 ppm in relation to 32.768 kHz, the time is shifted by approximately 2.6 seconds per  
month (calculated using the following expression).  
10–6 (1 ppm) 60 seconds 60 minutes 24 hours 30 days 2.592 seconds  
×
×
×
×
=
VDD  
XIN  
1 k  
1 kΩ  
SDA  
SCL  
C
g
10 kΩ  
S-35392A  
XOUT  
32KO  
Frequency  
counter  
Open  
or pull-up  
INT2  
VSS  
Figure 47 Configuration of Oscillation Frequency Measurement Circuit  
Caution 1. Use a high-accuracy frequency counter of 7 digits or more.  
2. Measure the oscillation frequency under the usage conditions.  
38  
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2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
3. Adjustment of oscillation frequency  
(1) Adjustment by setting Cg  
Matching of the crystal oscillator with the nominal frequency must be performed with the stray capacitance on the  
board included. Select a crystal oscillator and optimize the Cg value in accordance with the flowchart below.  
START  
Select a crystal  
oscillator*1  
YES  
Variable  
capacitance  
Trimmer capacitor  
NO  
Set to center  
Fixed capacitor  
of variable  
capacitance*3  
Set C  
g
NO  
Frequency  
YES  
NO  
C in  
g
specification  
YES  
Change C  
g
Make fine adjustment  
of frequency using  
variable capacitance  
NO  
Optimal  
value*2  
YES  
END  
*1. Request a crystal manufacturer for matching evaluation between the IC and a crystal. The recommended  
crystal characteristic values are, CL value (load capacitance) = 6 pF, R1 value (equivalent serial resistance) = 50  
kmax.  
*2. The Cg value must be selected on the actual PCB since it is affected by stray capacitance. Select the external Cg  
value in a range of 0 pF to 9.1 pF.  
*3. Adjust the rotation angle of the variable capacitance so that the capacitance value is slightly smaller than the  
center, and confirm the oscillation frequency and the center value of the variable capacitance. This is done in  
order to make the capacitance of the center value smaller than one half of the actual capacitance value because a  
smaller capacitance value increases the frequency variation.  
Figure 48 Crystal Oscillator Setting Flow  
Caution 1. The oscillation frequency varies depending on the ambient temperature and power supply  
voltage. Refer to “„ Characteristics (Typical Data)”.  
2. The 32.768 kHz crystal oscillator operates more slowly at an operating temperature than higher  
or lower 20 to 25 C. Therefore, it is recommended to set the oscillator to operate slightly faster  
°
at normal temperature.  
Seiko Instruments Inc.  
39  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Product Name Structure  
S-35392A  
-
I8T1  
G
Package name (abbreviation) and IC packing specification  
I8T1: SNT-8A, Tape  
Product name  
„ Precautions  
Although the IC contains a static electricity protection circuit, static electricity or voltage that exceeds the limit of the  
protection circuit should not be applied.  
Seiko Instruments Inc. assumes no responsibility for the way in which this IC is used in products created using this  
IC or for the specifications of that product, nor does Seiko Instruments Inc. assume any responsibility for any  
infringement of patents or copyrights by products that include this IC either in Japan or in other countries.  
40  
Seiko Instruments Inc.  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
„ Characteristics (Typical Data)  
(1) Standby current vs. VDD characteristics  
(2) Current consumption vs. Input clock characteristics  
Ta = 25°C, CL = 6 pF  
Ta = 25°C, CL = 6 pF  
1.0  
0.8  
50  
45  
40  
35  
VDD = 5.0 V  
30  
25  
0.6  
IDD1  
[µA]  
IDD2  
[µA]  
0.4  
20  
15  
VDD = 3.0 V  
0.2  
0
10  
5
0
2
3
4
0
100  
200  
300  
400  
500  
10  
6
0
1
5
6
SCL frequency [kHz]  
V
DD [V]  
(3) Standby current vs. Temperature characteristics  
(4) Standby current vs. Cg characteristics  
CL = 6 pF  
Ta = 25°C, CL = 6 pF  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
VDD = 5.0 V  
VDD = 5.0 V  
IDD1  
IDD1  
[µA]  
[µA]  
VDD = 3.0 V  
VDD = 3.0 V  
0
25  
Ta [°C]  
50  
40 25  
75 85  
0
2
4
6
8
Cg [pF]  
(5) Oscillation frequency vs. Cg characteristics  
(6) Oscillation frequency vs. VDD characteristics  
Ta = 25°C, CL = 6 pF  
Ta = 25°C, CL = 7.5 pF  
100  
80  
60  
40  
20  
50  
40  
30  
20  
10  
0
10  
20  
30  
40  
50  
VDD = 5.0 V  
f/f  
[ppm]  
f/f  
[ppm]  
0
VDD = 3.0 V  
20  
40  
60  
80  
100  
0
2
4
6
8
10  
0
2
3
4
1
5
Cg [pF]  
VDD [V]  
Seiko Instruments Inc.  
41  
2-WIRE REAL-TIME CLOCK  
S-35392A  
Rev.1.3_00  
(7) Oscillation frequency vs. Temperature  
characteristics  
(8) Oscillation start time vs. Cg characteristics  
Ta = 25°C  
Cg = 7.5 pF  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
20  
VDD = 5.0 V  
0
20  
VDD = 3.0 V  
40  
tSTA  
[ms]  
f/f  
[ppm]  
VDD = 5.0 V  
VDD = 3.0 V  
60  
80  
100  
120  
140  
0
8
10  
0
2
4
6
40 25  
75 85  
0
25  
Ta [°C]  
50  
Cg [pF]  
(9) Output current characteristics 1 (VOUT vs. IOL1  
)
(10) Output current characteristics 2 (VOUT vs. IOL2  
SDA pin, Ta = 25 C  
)
°
32KO pin, INT2 pin, Ta = 25°C  
50  
50  
40  
30  
20  
10  
0
40  
VDD = 5.0 V  
VDD = 5.0 V  
30  
IOL1  
IOL2  
[mA]  
[mA]  
20  
VDD = 3.0 V  
VDD = 3.0 V  
10  
0
0
1
2
3
4
0
0.5  
1
1.5  
2
2.5  
VOUT [V]  
VOUT [V]  
(11) BLD detection, release voltage, VDDT (Min) vs.  
Temperature characteristics  
CL = 6 pF  
1.4  
Release voltage  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
Detection voltage  
VDDT (Min)  
BLD  
[V]  
0
0
25  
Ta [ C]  
50  
40  
25  
75 85  
°
42  
Seiko Instruments Inc.  
1.97±0.03  
6
5
8
7
+0.05  
-0.02  
0.08  
1
2
3
4
0.5  
0.48±0.02  
0.2±0.05  
No. PH008-A-P-SD-2.0  
SNT-8A-A-PKG Dimensions  
PH008-A-P-SD-2.0  
TITLE  
No.  
SCALE  
UNIT  
mm  
Seiko Instruments Inc.  
+0.1  
-0  
4.0±0.1  
2.0±0.05  
0.25±0.05  
ø1.5  
0.65±0.05  
ø0.5±0.1  
4.0±0.1  
2.25±0.05  
5°  
4 3 2 1  
5 6 7 8  
Feed direction  
No. PH008-A-C-SD-1.0  
TITLE  
SNT-8A-A-Carrier Tape  
PH008-A-C-SD-1.0  
No.  
SCALE  
UNIT  
mm  
Seiko Instruments Inc.  
12.5max.  
9.0±0.3  
Enlarged drawing in the central part  
ø13±0.2  
(60°)  
(60°)  
No. PH008-A-R-SD-1.0  
SNT-8A-A-Reel  
TITLE  
No.  
PH008-A-R-SD-1.0  
5,000  
SCALE  
UNIT  
QTY.  
mm  
Seiko Instruments Inc.  
0.52  
2.01  
0.52  
0.3  
0.3  
0.3  
0.2  
0.2 0.3  
0.2  
Caution Making the wire pattern under the package is possible. However, note that the package  
may be upraised due to the thickness made by the silk screen printing and of a solder  
resist on the pattern because this package does not have the standoff.  
No. PH008-A-L-SD-3.0  
SNT-8A-A-Land Recommendation  
TITLE  
No.  
PH008-A-L-SD-3.0  
SCALE  
UNIT  
mm  
Seiko Instruments Inc.  
·
·
The information described herein is subject to change without notice.  
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein  
whose related industrial properties, patents, or other rights belong to third parties. The application circuit  
examples explain typical applications of the products, and do not guarantee the success of any specific  
mass-production design.  
·
·
·
When the products described herein are regulated products subject to the Wassenaar Arrangement or other  
agreements, they may not be exported without authorization from the appropriate governmental authority.  
Use of the information described herein for other purposes and/or reproduction or copying without the  
express permission of Seiko Instruments Inc. is strictly prohibited.  
The products described herein cannot be used as part of any device or equipment affecting the human  
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus  
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.  
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the  
failure or malfunction of semiconductor products may occur. The user of these products should therefore  
give thorough consideration to safety design, including redundancy, fire-prevention measures, and  
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.  
·

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