S-93C76ADFJ-TBH-G [SII]
CMOS SERIAL E2PROM; CMOS串行E2PROM
| 型号： | S-93C76ADFJ-TBH-G |
| 厂家： | 
SEIKO INSTRUMENTS INC |
| 描述： | CMOS SERIAL E2PROM |
| 文件： | 总33页 (文件大小：386K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Rev. 3.2_00
CMOS SERIAL E2PROM
S-93C76A
The S-93C76A is
a
high speed, low current
consumption, 8 K-bit serial E2PROM with a wide
operating voltage range. It is organized as 512-word
× 16-bit respectively. Each is capable of sequential
read, at which time addresses are automatically
incremented in 16-bit blocks.
Features
• Low current consumption
Standby:
2.0 µA Max. (VCC = 5.5 V)
Operating: 0.8 mA Max. (VCC = 5.5 V)
0.4 mA Max. (VCC = 2.5 V)
• Wide operating voltage range Read:
Write:
1.8 to 5.5 V (at −40 to +85°C)
2.7 to 5.5 V (at −40 to +85°C)
• Sequential read capable
• Write disable function when power supply voltage is low
• Endurance:
107 cycles/word*1 (at +25°C) write capable,
106 cycles/word*1 (at +85°C)
3 × 105 cycles/word*1 (at +105°C)
*1. For each address (Word: 16 bits)
• Data retention: 10 years (after rewriting 106 cycles/word at +85°C)
• S-93C76A:
8 K-bit
• High-temperature operation : +105°C Max. supported
(Only S-93C76ADFJ-TBH-G and S-93C76AFT-TBH-G)
• Lead-free products
Packages
Drawing code
Tape
Package name
Package
DP008-F
FJ008-A
FT008-A
Reel
FJ008-D
FT008-E
8-Pin DIP
8-Pin SOP(JEDEC)
8-Pin TSSOP
FJ008-D
FT008-E
Caution This product is intended to use in general electronic devices such as consumer electronics,
office equipment, and communications devices. Before using the product in medical
equipment or automobile equipment including car audio, keyless entry and engine control
unit, contact to SII is indispensable.
Seiko Instruments Inc.
1
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Pin Configurations
8-Pin DIP
Top view
Table 1
Pin No.
Symbol
CS
Description
Chip select input
Serial clock input
Serial data input
Serial data output
Ground
Test
No connection
Power supply
1
2
3
4
5
6
7
8
VCC
NC
TEST
GND
1
2
3
4
8
7
6
5
CS
SK
DI
SK
DI
DO
GND
TEST*1
NC
DO
Figure 1
VCC
*1. Connect to GND or VCC.
S-93C76ADP-G
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
Remark See Dimensions for details of the package drawings.
8-Pin SOP(JEDEC)
Top view
Table 2
Pin No.
Symbol
CS
Description
Chip select input
Serial clock input
Serial data input
Serial data output
Ground
Test
No connection
Power supply
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
8
CS
SK
DI
VCC
NC
SK
DI
DO
TEST
GND
GND
TEST*1
NC
DO
Figure 2
VCC
*1. Connect to GND or VCC.
S-93C76ADFJ-TB-G
S-93C76ADFJ-TBH-G
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
Remark See Dimensions for details of the package drawings.
2
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
8-Pin TSSOP
Top view
Table 3
Pin No.
Symbol
CS
Description
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
8
Chip select input
VCC
NC
CS
SK
DI
SK
Serial clock input
Serial data input
Serial data output
Ground
TEST
GND
DI
DO
DO
GND
TEST*1
NC
Test
No connection
Power supply
Figure 3
VCC
S-93C76AFT-TB-G
S-93C76AFT-TBH-G
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected
so long as the absolute maximum rating is not exceeded.
Remark See Dimensions for details of the package drawings.
Seiko Instruments Inc.
3
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Block Diagram
VCC
GND
Address
decoder
Memory array
Data register
Output buffer
DO
DI
Mode decode logic
CS
SK
Clock generator
Figure 4
4
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Instruction Sets
Table 4
Instruction
Start Bit Operation Code
Address
Data
SK input clock
1
1
1
1
1
1
1
1
2
1
0
1
0
0
0
0
3
0
1
1
0
0
0
0
4
x
x
x
0
1
1
0
5
6
7
8
9
10 11 12 13
14 to 29
READ (Read data)
WRITE (Write data) *2
ERASE (Erase data) *2
WRAL (Write all) *2
ERAL (Erase all) *2
EWEN (Write enable) *2
EWDS (Write disable)
A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 to D0 Output*1
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0
D15 to D0 Input
1
0
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D15 to D0 Input
*1. When the 16-bit data in the specified address has been output, the data in the next address is output.
*2. WRITE, ERASE, WRAL, ERAL, and EWEN are guaranteed only at VCC ≥ 2.7 V.
Remark x: Don’t care
Seiko Instruments Inc.
5
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Absolute Maximum Ratings
Table 5
Item
Power supply voltage
Input voltage
Symbol
Ratings
−0.3 to +7.0
−0.3 to VCC +0.3
−0.3 to VCC
−40 to +105
−65 to +150
Unit
V
VCC
VIN
V
Output voltage
VOUT
Topr
Tstg
V
°C
°C
Operating ambient temperature
Storage temperature
Caution The absolute maximum ratings are rated values exceeding which the product could
suffer physical damage. These values must therefore not be exceeded under any
conditions.
Recommended Operating Conditions
Table 6
−
40 to
+
Typ.
85
°
C
+
85 to
+105°C
Item
Symbol
Conditions
Unit
Min.
1.8
Max.
5.5
Min. Typ. Max.
4.5
4.5
READ/EWDS
WRITE/ERASE/
5.5
5.5
V
V
Power supply voltage VCC
High level input voltage VIH
Low level input voltage VIL
2.7
2.0
0.8
0.8
5.5
WRAL/ERAL/EWEN
VCC
VCC
VCC
0.8
2.0
0.0
VCC
0.8
V
V
V
V
V
V
VCC
VCC
VCC
VCC
VCC
VCC
=
=
=
=
=
=
4.5 to 5.5 V
2.7 to 4.5 V
1.8 to 2.7 V
4.5 to 5.5 V
2.7 to 4.5 V
1.8 to 2.7 V
×
×
VCC
VCC
0.0
0.0
0.0
0.2
×
×
VCC
VCC
0.15
Pin Capacitance
Table 7
(Ta = 25°C, f = 1.0 MHz,
V
CC = 5.0 V)
Item
Symbol
Conditions
Min.
Typ.
Max.
Unit
pF
pF
Input Capacitance
Output Capacitance
CIN
8
10
V
IN = 0 V
COUT
V
OUT = 0 V
Endurance
Table 8
Operating
Item
Symbol
Min.
Typ.
Max.
Unit
Temperature
106
−40 to +85°C
+85 to +105°C
Endurance
NW
cycles/word*1
3 × 105
*1. For each address (Word: 16 bits)
6
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
DC Electrical Characteristics
Table 9
−
40 to
4.5 to 5.5 V VCC 2.5 to 4.5 V VCC
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
DO no load 0.8 0.5 0.4 0.8 mA
+
85
°
C
+
85 to
Unit
1.8 to 2.5 V VCC 4.5 to 5.5 V
+105°C
Item
Symbol Conditions
VCC
=
=
=
=
Current consumption (READ) ICC1
Table 10
−
40 to
4.5 to 5.5 V VCC
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
2.0 1.5 2.0
+
85
°
C
+
85 to
+105°C
Item
Symbol Conditions
DO no load
Unit
mA
VCC
=
=
2.7 to 4.5 V VCC 4.5 to 5.5 V
=
Current consumption (WRITE) ICC2
Table 11
−
40 to
+
85
2.5 to 4.5 V VCC
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
°
C
+
85 to
Unit
1.8 to 2.5 V VCC 4.5 to 5.5 V
+105°C
Item
Symbol
ISB
Conditions
VCC
=
4.5 to 5.5 V VCC
=
=
=
CS = GND, DO = Open,
Standby current
consumption
2.0
2.0
2.0
2.0
µ
Other inputs to VCC or
GND
A
Input leakage
current
ILI
VIN
=
GND to VCC
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
0.1 1.0
µA
Output leakage
current
ILO
VOL
VOUT
=
GND to VCC
2.1 mA
100
µA
0.4
0.1
0.4
0.1
V
Low level
IOL
IOL
=
=
2.4
0.1
0.1
2.4
output voltage
V
V
V
V
µ
A
I
OH = −400
OH = −100
OH = −10
µA
High level
VOH
I
µ
A
µA
VCC
−
VCC−
0.3
0.2
VCC
−
0.3
0.2
VCC
−
VCC−
0.3
0.2
output voltage
I
VCC
−
VCC
−
0.2
Write enable
Only when write
disable mode
latch data hold VDH
voltage
1.5
1.5
1.5
1.5
V
Seiko Instruments Inc.
7
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
AC Electrical Characteristics
Table 12 Measurement Conditions
Input pulse voltage
Output reference voltage
Output load
0.1 × VCC to 0.9 × VCC
0.5 × VCC
100 pF
Table 13
−40 to +85°C
CC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V VCC = 4.5 to 5.5 V
+85 to +105°C
Item
Symbol
Unit
V
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
CS setup time
CS hold time
tCSS
0.2
0
—
—
—
—
—
—
—
—
—
—
—
—
—
0.4
0
0.2
0.2
0.2
—
0
—
—
—
—
—
—
—
—
—
—
—
—
—
1.0
0
0.4
0.4
0.4
—
0
—
—
—
—
—
—
—
—
—
—
—
—
—
0.2
0
0.2
0.1
0.1
0.6
µs
µs
µs
µs
µs
µs
tCSH
tCDS
tDS
CS deselect time
Data setup time
Data hold time
Output delay time
Clock frequency
Clock pulse width
0.2
0.1
0.1
—
0
—
—
—
tDH
tPD
fSK
—
—
—
0.4
2.0
—
0.15
0.15
0.8
0.5
—
0.5
0.5
2.0
0.25
—
1.0
1.0
0
1.0 MHz
tSKL, tSKH 0.25
1.0
0
0
2.0
0
0
0.25
0
µs
µs
µs
Output disable time tHZ1, tHZ2
Output enable time tSV
0
0
0.15
0.15
0
Table 14
−40 to +85°C
+85 to +105°C
Item
Write time
Symbol
Unit
ms
V
CC = 2.7 to 5.5 V
V
CC = 4.5 to 5.5 V
Min.
Typ.
4.0
Max.
10.0
Min.
Typ.
4.0
Max.
10.0
tPR
tCSS
tCDS
CS
SK
tSKL
tSKH
tCSH
tDS
tDH
tDS
tDH
DI
Valid data
tPD
Valid data
tPD
Hi-Z
DO
tSV
tHZ2
tHZ1
(READ)
DO
(VERIFY)
Figure 5 Timing Chart
8
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Operation
All instructions are executed by making CS “H” and then inputting DI at the rising edge of the SK pulse. An
instruction is input in the order of its start bit, instruction, address, and data. The start bit is recognized
when “H” of DI is input at the rising edge of SK after CS has been made “H”. As long as DI remains “L”,
therefore, the start bit is not recognized even if the SK pulse is input after CS has been made “H”. The SK
clock input while DI is “L” before the start bit is input is called a dummy clock. By inserting as many dummy
clocks as required before the start bit, the number of clocks the internal serial interface of the CPU can
send out and the number of clocks necessary for operation of the serial memory IC can be adjusted.
Inputting the instruction is complete when CS is made “L”. CS must be made “L” once during the period of
tCDS in between instructions.
“L” of CS indicates a standby status. In this status, input of SK and DI is invalid, and no instruction is
accepted.
1. Reading (READ)
The READ instruction is used to read the data at a specified address. When this instruction is
executed, the address A0 is input at the rising edge of SK and the DO pin, which has been in a high-
impedance (Hi-Z) state, outputs “L”. Subsequently, 16 bits of data are sequentially output at the rising
edge of SK.
If SK is output after the 16-bit data of the specified address has been output, the address is
automatically incremented, and the 16-bit data of the next address is then output. By inputting SK
sequentially with CS kept at “H”, the data of the entire memory space can be read. When the address
is incremented from the last address (A8 … A1 A0 = 1 … 1 1), it returns to the first address (A8 … A1 A0
= 0 … 0 0).
CS
SK
DI
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
26 27 28 29 30 31 32
42 43 44 45 46 47 48
1
1
0
X
A8 A7 A6 A5 A4 A3 A2 A1 A0
DO
0
D15 D14 D13
D2 D1 D0 D15 D14 D13
A8A7A6A5A4A3A2A1A0+1
D2 D1 D0 D15 D14 D13
A8A7A6A5A4A3A2A1A0+2
Figure 6 Read Timing
Seiko Instruments Inc.
9
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. Writing (WRITE, ERASE, WRAL, ERAL)
Write instructions (WRITE, ERASE, WRAL, and ERAL) are used to start writing data to the non-volatile
memory by making CS “L” after the specified number of clocks has been input.
The write operation is completed within the write time tPR (10 ms) no matter which write instruction is
used. The typical write time is less than half 10 ms. If the end of the write operation is known,
therefore, the write cycle can be minimized. To ascertain the end of a write operation, make CS “L” to
start the write operation and then make CS “H” again to check the status of the DO output pin. This
series of operations is called a verify operation.
If DO outputs “L” during the verify operation period in which CS is “H”, it indicates that a write operation
is in progress. If DO outputs “H”, it indicates that the write operation is finished. The verify operation
can be executed as many times as required. This operation can be executed in two ways. One is
detecting the positive transition of DO output from “L” to “H” while holding CS at “H”. The other is
detecting the positive transition of DO output from “L” to “H” by making CS “H” once and checking DO
output, and then returning CS to “L”.
During the write period, SK and DI are invalid. Do not input any instructions during this period. Input an
instruction while the DO pin is outputting “H” or is in a high-impedance state. Even while the DO pin is
outputing “H”, DO immediately goes into a high-impedance (Hi-Z) state if “H” of DI (start bit) is input at
the rising edge of SK.
Keep DI “L” during the verify operation period.
2. 1 Writing data (WRITE)
This instruction is used to write 16-bit data to a specified address.
After making CS “H”, input a start bit, the WRITE instruction, an address, and 16-bit data. If data of
more than 16 bits is input, the written data is sequentially shifted at each clock, and the 16 bits input
last are the valid data. The write operation is started when CS is made “L”. It is not necessary to
set data to “1” before it is written.
tCDS
CS
SK
DI
1
2
3
4
5
6
7
8
9
10 11 12 13 14
29
D0
<1>
0
1
X
A8 A7 A6 A5 A4 A3 A2 A1 A0 D15
tHZ1
Ready
tSV
Hi-Z
DO
tPR
Figure 7 Data Write Timing
10
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. 2 Erasing data (ERASE)
This instruction is used to erase specified 16-bit data. All the 16 bits of the data are “1”. After
making CS “H”, input a start bit, the ERASE instruction, and an address. It is not necessary to input
data. The data erase operation is started when CS is made “L”.
tCDS
CS
SK
DI
1
2
3
4
5
6
7
8
9
10 11 12 13
<1>
1
1
X
A8 A7 A6 A5 A4 A3 A2 A1 A0
tHZ1
tSV
Hi-Z
DO
tPR
Figure 8 Data Erase Timing
2. 3 Writing to chip (WRAL)
This instruction is used to write the same 16-bit data to the entire address space of the memory.
After making CS “H”, input a start bit, the WRAL instruction, an address, and 16-bit data. Any
address may be input. If data of more than 16 bits is input, the written data is sequentially shifted at
each clock, and the 16-bit data input last is the valid data. The write operation is started when CS
is made “L”. It is not necessary to set the data to “1” before it is written.
tCDS
CS
SK
DI
1
2
3
4
5
6
7
8
9
10 11 12 13 14
D15
29
D0
<1>
0
0
0
1
tHZ1
Ready
tSV
8Xs
Hi-Z
DO
tPR
Figure 9 Chip Write Timing
2. 4 Erasing chip (ERAL)
This instruction is used to erase the data of the entire address space of the memory.
All the data is “1”. After making CS “H”, input a start bit, the ERAL instruction, and an address. Any
address may be input. It is not necessary to input data. The chip erase operation is started when
CS is made “L”.
tCDS
CS
SK
DI
1
2
3
4
5
6
7
8
9
10 11 12 13
<1>
0
0
1
0
tHZ1
tSV
8Xs
Hi-Z
Busy
DO
tPR
Figure 10 Chip Erase Timing
Seiko Instruments Inc.
11
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
3. Write enable (EWEN) and write disable (EWDS)
The EWEN instruction is used to enable a write operation. The status in which a write operation is
enabled is called the program-enabled mode.
The EWDS instruction is used to disable a write operation. The status in which a write operation is
disabled is called the program-disabled mode.
The write operation is disabled upon power application and detection of a low supply voltage. To
prevent an unexpected write operation due to external noise or a CPU malfunctions, it should be kept in
write disable mode except when performing write operations, after power-on and before shutdown.
Stand by
CS
SK
DI
1
2
3
4
5
6
7
8
9
10
11
12
13
<1>
0
0
8Xs
11 = EWEN
00 = EWDS
Figure 11 Write Enable/Disable Timing
Start Bit
A start bit is recognized by latching the high level of DI at the rising edge of SK after changing CS to high
(start bit recognition). A write operation begins by inputting the write instruction and setting CS to low.
Subsequently, by setting CS to high again, the DO pin outputs a low level if the write operation is still in
progress and a high level if the write operation is complete (verify operation). Therefore, only after a write
operation, in order to input the next command, CS is set to high, which switches the DO pin from a high-
impedance state (Hi-Z) to a data output state. However, if start bit is recognized, the DO pin returns to the
high-impedance state (refer to Figure 5 Timing Chart).
Make sure that data output from the CPU does not interfere with the data output from the serial memory IC
when configuring a 3 -wire interface by connecting the DI input pin and DO output pin, as such interference
may cause a start bit fetch problem. Take the measures described in “ 3-Wire Interface (Direct
Connection between DI and DO)”.
12
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Write Disable Function when Power Supply Voltage is Low
The S-93C76A provides a built-in detector to detect a low power supply voltage and disable writing. When
the power supply voltage is low or at power application, the write instructions (WRITE, ERASE, WRAL, and
ERAL) are cancelled, and the write disable state (EWDS) is automatically set. The detection voltage is 1.75
V typ., the release voltage is 2.05 V typ., and there is a hysteresis of about 0.3 V (refer to Figure 12).
Therefore, when a write operation is performed after the power supply voltage has dropped and then risen
again up to the level at which writing is possible, a write enable instruction (EWEN) must be sent before a
write instruction (WRITE, ERASE, WRAL, or ERAL) is executed.
When the power supply voltage drops during a write operation, the data being written to an address at that
time is not guaranteed.
Hysteresis
About 0.3 V
Power supply voltage
Release voltage (+VDET
)
Detection voltage (−VDET
1.75 V Typ.
)
2.05 V Typ.
Write instruction cancelled
Write disable state (EWDS) automatically set
Figure 12 Operation when Power Supply Voltage is Low
Seiko Instruments Inc.
13
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
3-Wire Interface (Direct Connection between DI and DO)
There are two types of serial interface configurations: a 4-wire interface configured using the CS, SK, DI,
and DO pins, and a 3-wire interface that connects the DI input pin and DO output pin.
When the 3-wire interface is employed, a period in which the data output from the CPU and the data output
from the serial memory collide may occur, causing a malfunction. To prevent such a malfunction, connect
the DI and DO pins of the S-93C76A via a resistor (10 to 100 kΩ) so that the data output from the CPU
takes precedence in being input to the DI pin (refer to Figure 13).
CPU
S-93C76A
SIO
DI
DO
R: 10 to 100 kΩ
Figure 13 Connection of 3-Wire Interface
I/O Pins
1. Connection of input pins
All the input pins of the S-93C76A employ a C-MOS structure, so design the equipment so that high
impedance will not be input while the S-93C76A is operating. Especially, deselect the CS input (a low
level) when turning on/off power and during standby. When the CS pin is deselected (a low level),
incorrect data writing will not occur. Connect the CS pin to GND via a resistor (10 to 100 kΩ pull-down
resistor). To prevent malfunction, it is recommended to use equivalent pull-down resistors for pins other
than the CS pin.
2. Input and output pin equivalent circuits
The following shows the equivalent circuits of input pins of the S-93C76A. None of the input pins
incorporate pull-up and pull-down elements, so special care must be taken when designing to prevent a
floating status.
Output pins are high-level/low-level/high-impedance tri-state outputs. The TEST pin is disconnected
from the internal circuit by a switching transistor during normal operation. As long as the absolute
maximum rating is satisfied, the TEST pin and internal circuit will never be connected.
14
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. 1 Input pin
CS
Figure 14 CS Pin
SK, DI
Figure 15 SK DI Pin
TEST
Figure 16 TEST Pin
Seiko Instruments Inc.
15
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. 2 Output pin
Vcc
DO
Figure 17 DO Pin
3. Input pin noise elimination time
The S-93C76A includes a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This means
that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width of 20 ns or less can be
eliminated.
Note, therefore, that noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage
exceeds VIH/VIL.
Precaution
● Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
● SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned by a third party.
16
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Characteristics (Typical Data)
1. DC Characteristics
1. 1 Current consumption (READ) ICC1
vs. ambient temperature Ta
1. 2 Current consumption (READ) ICC1
vs. ambient temperature Ta
VCC = 3.3 V
VCC = 5.5 V
fSK = 500 kHz
DATA = 0101
f
SK = 2 MHz
DATA = 0101
0.4
0.4
0.2
0
ICC1
ICC1
(mA)
(mA)
0.2
0
−40
0
85
−40
85
0
Ta (°C)
Ta (°C)
1. 3 Current consumption (READ) ICC1
vs. ambient temperature Ta
1. 4 Current consumption (READ) ICC1
vs. power supply voltage VCC
VCC = 1.8 V
fSK = 10 kHz
DATA = 0101
Ta = 25°C
f
SK = 1 MHz, 500 kHz
DATA = 0101
0.4
0.4
0.2
0
ICC1
ICC1
(mA)
1 MHz
(mA)
0.2
0
500 kHz
−40
0
85
2
3
4
5
6
7
Ta (°C)
VCC (V)
1. 5 Current consumption (READ) ICC1
vs. power supply voltage VCC
1. 6 Current consumption (READ) ICC1
vs. Clock frequency fSK
VCC = 5.0 V
Ta = 25°C
Ta = 25°C
f
SK = 100 kHz, 10 kHz
DATA = 0101
0.4
0.4
0.2
0
ICC1
ICC1
(mA)
(mA)
100 kHz
0.2
10 kHz
0
10 k 100 k 1 M 2M 10M
2
3
7
4
5 6
f
SK (Hz)
VCC (V)
Seiko Instruments Inc.
17
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
1. 7 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1. 8 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
VCC = 3.3 V
VCC = 5.5 V
1.0
1.0
ICC2
ICC2
(mA)
(mA)
0.5
0
0.5
0
0
85
−40
−40
0
85
Ta (°C)
Ta (°C)
1. 9 Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1. 10 Current consumption (WRITE) ICC2
vs. power supply voltage VCC
VCC = 2.7 V
Ta = 25°C
1.0
1.0
ICC2
ICC2
(mA)
(mA)
0.5
0
0.5
0
−40
0
85
2
3
4
5 6
7
VCC (V)
Ta (°C)
1. 11 Current consumption in standby mode ISB
vs. ambient temperature Ta
1. 12 Current consumption in standby mode ISB
vs. power supply voltage VCC
Ta = 25°C
VCC = 5.5 V
CS = GND
CS = GND
1.0
ISB
1.0
ISB
(µA)
(µA)
0.5
0.5
0
0
2
3
4
5 6
7
0
85
−40
VCC (V)
Ta (°C)
18
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
1. 13 Input leakage current ILI
1. 14 Input leakage current IL1
vs. ambient temperature Ta
vs. ambient temperature Ta
VCC = 5.5 V
CS, SK, DI,
TEST = 0 V
VCC = 5.5 V
CS, SK, DI,
TEST = 5.5 V
1.0
1.0
ILI
(µA)
ILI
(µA)
0.5
0.5
0
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1. 15 Output leakage current ILO
1. 16 Output leakage current ILO
vs. ambient temperature Ta
vs. ambient temperature Ta
VCC = 5.5 V
VCC = 5.5 V
DO = 0 V
DO = 5.5 V
1.0
1.0
ILO
(µA)
ILO
(µA)
0.5
0
0.5
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1. 17 High-level output voltage VOH
vs. ambient temperature Ta
1. 18 High-level output voltage VOH
vs. ambient temperature Ta
VCC = 4.5 V
VCC = 2.7 V
I
OH = −400 µA
I
OH = −100 µA
4.6
4.4
4.2
2.7
2.6
2.5
OH
(V)
VOH
(V)
0
85
−40
0
85
−40
Ta (°C)
Ta (°C)
Seiko Instruments Inc.
19
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
1. 19 High-level output voltage VOH
vs. ambient temperature Ta
1. 20 High-level output voltage VOH
vs. ambient temperature Ta
VCC = 2.5 V
VCC = 1.8 V
I
OH = −100 µA
IOH = −10 µA
2.5
2.4
2.3
1.9
VOH
(V)
VOH
(V)
1.8
1.7
−40
0
85
0
85
−40
Ta (°C)
Ta (°C)
1. 21 Low-level output voltage VOL
vs. ambient temperature Ta
1. 22 Low-level output voltage VOL
vs. ambient temperature Ta
VCC = 4.5 V
VCC = 1.8 V
IOL = 2.1 mA
0.3
IOL = 100 µA
0.03
VOL
(V)
0.2
0.1
VOL
(V)
0.02
0.01
0
85
−40
0
85
−40
Ta (°C)
Ta (°C)
1. 23 High-level output current IOH
vs. ambient temperature Ta
1. 24 High-level output current IOH
vs. ambient temperature Ta
VCC = 2.7 V
VCC = 4.5 V
V
OH = 2.4 V
V
OH = 2.4 V
−2
−1
0
−20.0
−10.0
0
IOH
IOH
(mA)
(mA)
0
85
−40
0
85
−40
Ta (°C)
Ta (°C)
20
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
1. 25 High-level output current IOH
1. 26 High-level output current IOH
vs. ambient temperature Ta
vs. ambient temperature Ta
VCC = 2.5 V
VCC = 1.8 V
V
OH = 2.2 V
V
OH = 1.6 V
−2
−1
0
−1.0
IOH
IOH
(mA)
(mA)
−0.5
0
0
85
−40
−40
0
85
Ta (°C)
Ta (°C)
1. 27 Low-level output current IOL
vs. ambient temperature Ta
1. 28 Low-level output current IOL
vs. ambient temperature Ta
VCC = 1.8 V
VCC = 4.5 V
V
OL = 0.1 V
V
OL = 0.4 V
1.0
0.5
20
10
0
IOL
IOL
(mA)
(mA)
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1. 29 Input inverted voltage VINV
1. 30 Input inverted voltage VINV
vs. power supply voltage VCC
vs. ambient temperature Ta
Ta = 25°C
CS, SK, DI
VCC = 5.0 V
CS, SK, DI
3.0
VINV
3.0
VINV
(V)
(V)
1.5
0
2.0
0
1
2
3
4 5
6
7
−40
85
0
V
CC (V)
Ta (°C)
Seiko Instruments Inc.
21
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
1. 31 Low supply voltage detection voltage
vs. ambient temperature Ta
−
VDET
1. 32 Low supply voltage release voltage
vs. ambient temperature Ta
+VDET
2.0
2.0
−VDET
+VDET
(V)
(V)
1.0
0
1.0
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
22
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. AC Characteristics
2. 1 Maximum operating frequency fMAX.
vs. power supply voltage VCC
2. 2 Write time tPR
vs. power supply voltage VCC
Ta = 25°C
Ta = 25°C
2M
4
2
1M
fMAX.
tPR
(Hz)
(ms)
100k
10k
1
2
3
4
5 6
7
1
2
3
4
5
VCC (V)
VCC (V)
2. 3 Write time tPR
2. 4 Write time tPR
vs. ambient temperature Ta
vs. ambient temperature Ta
VCC = 3.0 V
VCC = 5.0 V
6
6
tPR
tPR
(ms)
4
(ms)
4
2
2
0
85
−40
0
85
−40
Ta (°C)
Ta (°C)
2. 5 Write time tPR
2. 6 Data output delay time tPD
vs. ambient temperature Ta
vs. ambient temperature Ta
VCC = 2.7 V
VCC = 4.5 V
6
0.3
tPD
PR
(ms)
4
(µs)
0.2
2
0.1
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
Seiko Instruments Inc.
23
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
2. 7 Data output delay time tPD
vs. ambient temperature Ta
2. 8 Data output delay time tPD
vs. ambient temperature Ta
VCC = 2.7 V
VCC = 1.8 V
0.6
tPD
1.5
tPD
(µs)
(µs)
0.4
1.0
0.2
0.5
0
85
0
85
−40
−40
Ta (°C)
Ta (°C)
24
Seiko Instruments Inc.
CMOS SERIAL E2PROM
S-93C76A
Rev.3.2_00
Product Name Structure
S-93C76A xxx − TB x − G
Operation temperature
none:
H:
−40 to +85°C
−40 to +105°C (Only 8-Pin SOP(JEDEC) and 8-Pin TSSOP)
IC direction in tape specification (Except 8-Pin DIP)
Package code
DP:
DFJ:
FT:
8-Pin DIP
8-Pin SOP(JEDEC)
8-Pin TSSOP
Product name
S-93C76A : 8k bit
Seiko Instruments Inc.
25
9.6(10.6max.)
8
5
1
4
7.62
0.89
1.3
+0.11
-0.05
0.25
2.54
0.48±0.1
0° to 15°
No. DP008-F-P-SD-3.0
DIP8-F-PKG Dimensions
DP008-F-P-SD-3.0
TITLE
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
5.02±0.2
8
5
1
4
0.20±0.05
1.27
0.4±0.05
No. FJ008-A-P-SD-2.1
SOP8J-D-PKG Dimensions
FJ008-A-P-SD-2.1
TITLE
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1(10 pitches:40.0±0.2)
2.0±0.05
ø1.55±0.05
0.3±0.05
8.0±0.1
ø2.0±0.05
2.1±0.1
5°max.
6.7±0.1
8
5
1
4
Feed direction
No. FJ008-D-C-SD-1.1
SOP8J-D-Carrier Tape
FJ008-D-C-SD-1.1
TITLE
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
60°
2±0.5
13.5±0.5
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.2
No. FJ008-D-R-SD-1.1
SOP8J-D-Reel
TITLE
FJ008-D-R-SD-1.1
No.
SCALE
UNIT
QTY.
2,000
mm
Seiko Instruments Inc.
+0.3
-0.2
3.00
5
8
1
4
0.17±0.05
0.2±0.1
0.65
No. FT008-A-P-SD-1.1
TSSOP8-E-PKG Dimensions
FT008-A-P-SD-1.1
TITLE
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1
2.0±0.05
ø1.55±0.05
0.3±0.05
+0.1
-0.05
8.0±0.1
ø1.55
(4.4)
+0.4
-0.2
6.6
8
1
4
5
Feed direction
No. FT008-E-C-SD-1.0
TITLE
TSSOP8-E-Carrier Tape
FT008-E-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
13.4±1.0
17.5±1.0
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.5
No. FT008-E-R-SD-1.0
TSSOP8-E-Reel
FT008-E-R-SD-1.0
TITLE
No.
SCALE
UNIT
QTY.
3,000
mm
Seiko Instruments Inc.
·
·
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
·
·
·
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
·
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