SC84502BP [SILAN]
PS/2 MOUSE CONTROLLER; PS / 2鼠标控制器型号: | SC84502BP |
厂家: | SILAN MICROELECTRONICS JOINT-STOCK |
描述: | PS/2 MOUSE CONTROLLER |
文件: | 总14页 (文件大小:144K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Silan
Semiconductorsꢀ
SC84502
ꢀ
PS/2 MOUSE CONTROLLER
DESCRIPTION
The SC84502 Mouse Controller is specially designed to control
PS/2 mouse device. This single chip can interface three key-
switches and four photo-couples direct to 8042. SC84502 can
receive command and echo status or data format which are
compatible with IBM PS/2 mode mouse. Key debouncing circuit is
provided to prevent false entry and improve the accuracy.
DIP-14
In the conventional mouse,
a great number of noises are
generated when the grid is partially closed or opened. These noise
are usually mistaken for movement signals by conventional mouse
controller and the cursor of the display screen is thus moved
frequently up and down or back and forth. This will consumes a great
amount of energy. The SC84502 PS/2 mouse controller provides
noise immunity circuits to eliminate these noise In order to reduce
energy consumption.
DIP-16
ꢀ
ORDERING INFORMATION
FEATURES
SC84502AP
SC84502BP
DIP-14 PACKAGE
DIP-16 PACKAGE
* Being compatible with PS/2 mouse mode
* Built-in noise immunity circuit
* Low power dissipation
* RC oscillation
APPLICATIONS
* Three key-switches and four photo-couples inputs
* Both key-press and key-release debounce interval 12ms
* Through three key-switches input, SC84502 can exert seven
different output
* Optical mouse or pen-mouse
* Mechanical mouse or pen-mouse
* Optomechanical mouse or pen-mouse
* Mechanical track ball
* The motion detector of the SC84502 could sense 8m/sec
maximum with 200 DPI wheels
* Optomechanical track ball
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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2000.12.31
Rev: 1.0
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Semiconductorsꢀ
SC84502
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PIN CONFIGURATIONS
VDD
OP
OSCR
16
1
2
3
4
5
6
7
8
VDD
OSCR
Y2
Y1
X2
X1
L
1
14
13
12
11
10
9
Y2
Y1
X2
X1
L
15
14
13
12
11
10
9
OP
2
NC
OSC OUT
3
NC
CLK
4
OSC OUT
CLK
DATA
5
VSS
6
DATA
VSS
M
R
M
7
8
R
BLOCK DIAGRAM
( Refer to SC84502BP )
OP
2
V
DD
SS
1
8
3
4
X1
12
V
COUNTER
X2
13
NC
NC
Y1
14
Y2
15
L
11
TIMING
CONTROLLER
M
10
R
9
DATA
I/O
OSCR
16
5
SYSTEM
CLOCK
GENERATOR
OSC OUT
7
6
DATA CLK
DC ELECTRICAL CHARACTERISTICS (Tamb=25~70°C)ꢀ
Parameter
Operating Voltage
Symbol
VDD
Condition
Min
Typ
5
Max Unit
--
4.5
--
5.5
1.2
V
Operating Current
Iop
No Load
--
mA
X1,X2,Y1,Y2
Ipl
70
--
--
--
--
µA
µA
--
--
Low Input reference current
X1,X2,Y1,Y2
Iph
106
High Input reference current
(to be continued)
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Semiconductorsꢀ
SC84502
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(continued)
Parameter
Symbol
Condition
Min
0.8
0.8
1.5
Typ
--
Max Unit
Schmitt trigger input, Ipl=76µA
Comparator input, Ipl=80µA
Comparator input, Ipl=500µA
1.2
1.2
2.1
V
V
V
X1,X2,Y1,Y2 input current
Vpl
--
--
CLK, DATA positive-going
threshold voltage
Vt+
Vt-
--
--
3.2
1.2
--
--
3.8
1.9
V
V
CLK, DATA negative-going
threshold voltage
Low Input Voltage, Other Pins
High Input Voltage, Other Pins
L,M,R Input Current
Vail
Vaih
Imi
--
--
--
--
--
1.5
--
V
V
--
3.5
Pull Up Resistor, Vin=5V
16.6
50
µA
PS/2 mouse mode
Idc
Vprl
Iil
Vin = 0V
0.56
--
--
--
--
1.86
0.4
mA
V
DATA,CLK input Current
PS/2 mouse mode
Iprl = -2 mA
Vin = 0V
DATA,CLK low output Voltage
L,M,R,X1,X2,Y1,Y2
0
1.0
µA
Input Leakage Current
Note: All voltages in above table are compared with VSS.
All parameters in above table are tested under VDD=5V.
CLK & DATA output gates are open drains that connect to pull up resistors.
AC ELECTRICAL CHARACTERISTICS
( Tamb = 0 ~ 70°C)
Parameter
Oscillating Frequency
Symbol
Min
Typ
Max
Unit
kHz
ms
µs
Fosc
Tkd
34.3-10%
34.3
12
34.3+10%
Key Debounce
--
14.3
14.3
--
--
--
--
--
--
--
--
--
--
--
Rising Edge Crossed Width Fosc=35 kHz
Falling Edge Crossed Width Fosc=35 kHz
Mouse CLK Active Time
Tr
--
Tf
--
µs
Tmca
Tmci
Tmdc
Tsca
Tsci
Tsdc
Tscd
42.9
42.9
14.3
42.9
42.9
14.3
28.6
µs
Mouse CLK Inactive Time
--
µs
Time that Mouse Sample DATA from CLK rising Edge
System CLK Active Time
--
µs
--
µs
System CLK Inactive Time
--
µs
Time from DATA Transition to Falling Edge of CLK
Time from rising Edge of CLK to DATA Transition
Time to mouse Inhibit after the 11th CLK to
ensure mouse does not start another Transmission
--
µs
--
µs
Tpi
0
--
50
µs
Note: The AC timings are measured under using 35kHz system clock signal.
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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Rev: 1.0
2000.12.31
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Semiconductorsꢀ
SC84502
ꢀ
X1, X2, Y1, Y2 INPUT IMPEDANCE
UNIT:KΩ
MAX.
16.0
15.0
14.0
TYP.
13.0
12.0
MIN.
11.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
1.0
2.0
3.0
4.0
5.0
INPUT VOLTAGE
PIN DESCRIPTION
(refer to SC84502BP)
Pin No. Pin Name
I/O
Description
1
2
VDD
OP
--
Positive Power Supply.
X, Y inputs:
Floating: Comparator input.
GND: Schmitt trigger input.
Short to OSC OUT: Testing Mode.
I
3
4
5
6
7
8
NC
NC
--
--
O
No Connection
No Connection
Clock output.
OSCOUT
CLK
I/O 8042 auxiliary port CLK line.
I/O 8042 auxiliary port DATA line.
DATA
VSS
--
Negative Power Supply
Three key-switches esert seven different combinations totally. Both key-pressed
and key-released signals will be sent accompanied with horizontal and vertical
state. The status of the key-switches will be preserved, whenever the value of
horizontal or vertical counters will present at DATA. And the debounce interval for
both key-press and key release is 12ms.
9
R
M
L
I
10
11
12
13
14
15
16
X1
X2
Four photo-couple signal denote UP, DOWN, LEFT and RIGHT state.
During the scanning period, as long as the photo-couples change their states, the
value of vertical or horizontal, counter will increase or decrease accordingly.
I
I
Y1
Y2
OSCR
50kΩ ± 5% pull low for 35kHz oscillation
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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2000.12.31
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Semiconductorsꢀ
SC84502
ꢀ
FUNCTION DESCRIPTIONS
1. OPERATING MODE
There are four operating modes in PS/2 mouse:
i) Reset Mode:
In this mode a self-test is initiated during power-on or by a Reset command. After reset signal, PS/2 mouse
will send:
1) Completion code AA&ID code 00.
2) Set default:
sampling rate: 100 reports/s
non-autospeed
stream mode
2 dot/count
disable
ii) Stream Mode:
The maximum rate of transfer is the programmed sample rate.
Data report is transmitted if
1) switch is pressed
2) movement has been detect
iii) Remote Mode:
Data is transmitted only in response to a Read Data command.
iv) Wrap Mode:
Any byte of data sent by the system, except hex EC(Reset wrap mode) or hex FF(Reset), is returned by
SC84502.
2. PS/2 MOUSE DATA REPORT
i) In stream mode: A data report is sent at the end of a sample interval.
ii)In remote mode: A data report is sent in response to Read Data command.
iii) Data report format:
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Semiconductorsꢀ
SC84502
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Byte
Bit
0
Description
Left button status; 1 = pressed
Right button status; 1 = pressed
Middle button status; 1 = pressed
Reserve
1
1
2
3
4
X data sign; 1 = negative
Y data sign; 1 = negative
X data overflow; 1 = overflow
Y data overflow; 1 = overflow
X data(D0 ~ D7)
5
6
7
2
3
0-7
0-7
Y data(D0 ~ D7)
3.PS/2 MOUSE DATA TRANSMISSION
i) SC84502 generates the clocking signal when sending data to and receiving data from the system.
ii) The system requests SC84502 receive system data output by forcing the DATA line to an inactive level and
allowing CLK line to go to an active level.
iii) Data transmission frame:
Bit
1
Function
Start bit(always 0)
2 ~ 9
10
Data bits(D0 ~D7)
Parity bit(odd parity)
Stop bit (always 1)
11
iv) Data Output (data from SC84502 to system)
If CLK is low (inhibit status), data is no transmission.
If CLK is high and DATA is low(request-to-send), data is updated. Data is received from the system and no
transmission are started by SC84502 until CLK and DATA both high. If CLK and DATA are both high, the
transmission is ready. DATA is valid prior to the falling edge of CLK and beyond the rising edge of CLK.
During transmission, SC84502 check for line contention by checking for an inactive level on CLK at
intervals not to exceed 100µ sec. Contention occurs when the system lowers CLK to inhibit SC84502
output after SC84502 has started a transmission. If this occurs before the rising edge of the contention
does not occur by the tenth clock, the transmission is complete.
Following a transmission, the system inhibits SC84502 by holding CLK low until it can service the input or
until the system receives a request to send a response from SC84502.
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Semiconductorsꢀ
SC84502
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v) Data Input (from system to SC84502)
System first check if SC84502 is transmitting data. If SC84502 is transmitting, the system can override the
output forcing CLK to an inactive level prior to the tenth clock. If SC84502 transmission is beyond the tenth
clock, the system receives the data. If SC84502 is not transmitting or if the system choose to override the
output, the system force CLK to an inactive level for a period of not less than 100m sec while preparing for
output. When the system is ready to output start bit (0), it allows CLK go to active level. If request-to-send is
detected, SC84502 clocks 11 bits. Following the tenth clock SC84502 checks for an active level on the
DATA line, and if found, force DATA low , and clock once more. If occurs framing error, SC84502 continue
to clock until DATA is high, then clocks the line control bit and request a Resend. When the system sends
out a command or data transmission that requires a response, the system waits for SC84502 to response
before sending its next output.
4. PS/2 MOUSE ERROR HANDLING
i) A Resend command ( FE ) following receipt of an invalid input or any input with incorrect parity.
ii) If two invalid input are received in succession, an error code of hex FC send to the system.
iii) The counter accumulators are cleared after receiving any command except “Resend”.
iv) SC84501 receives a Resend command ( FE ), it transmit its last packet of data.
vꢀꢁIn the stream mode “Resend” is received by SC84502 following a 3-byte data packet transmission to the
system. SC84502 resend the 3-byte data packet prior to clearing the counter.
vi) A response is sent within 25 ms if
a). The system requires a response
b). An error is detected in the transmission
vii). When a command requiring a response is issued by the system ,another command should not be issue until
either the response is received or 25ms has passed.
5. PS/2 MOUSE COMMANDS DESCRIPTION
There are 16 valid commands that transmits between the system and SC84502. The “FA” code is always the
first response to any valid input received from the system other than a Set Wrap Mode or Resend command.
The following table list the commands:
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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Semiconductorsꢀ
SC84502
ꢀ
Hex Code
Command
Reset
SC84502 echo code
FF
FA, AA, 00
FE
Resend
XX, (XX, XX)
F6
Set Default
FA
F5
Disable
FA
F4
Enable
FA
F3, XX
F2
Set Sampling Rate
Read Device Type
Set Remote Mode
Set Wrap Mode
Reset Wrap Mode
Read Data
FA, FA
FA, 00
F0
FA
EE
FA
EC
EB
FA
FA, XX, XX, XX
EA
Set Stream Mode
Status Request
Set Resolution
Set Autospeed
Reset Autospeed
FA
E9
FA, XX, XX, XX
E8, XX
E7
EA, FA
FA
E6
FA
The following describes valid commands:
a). Reset ( FF )
SC84502 operation:
i). Completion the reset.
ii). Transmitted FA,AA,00 to the system.
iii). Set default:
sampling rate: 100 reports/s
non-autospeed
stream mode
2 dots/count
disable
b). Resend ( FE )
i). Any time SC84502 receives an invalid command, it returns a Resend command to the system.
ii). When SC84502 receives a Resend command, it retransmits its last packet of data. If the last packet
was a Resend command, it transmits the packet just prior to the Resend command.
iii). In stream mode, if a Resend command is received by SC84502 immediately following a 3-byte data
packet transmission to the system.
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Semiconductorsꢀ
SC84502
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c). Set Default (F6)
The command reinitializes all conditions to the power-on defaults.
d). Disable (F5)
This command is used in the stream mode to stop transmissions from SC84502.
e). Enable (F4)
Begins transmissions, if in stream mode.
f). Set Sampling Rate (F3, XX)
In the stream mode, this command sets the sampling rate to the value indicated by byte hex XX, shown in
following:
Second byte XX
Sample Rate
10/sec
0A
14
28
3C
50
64
C8
20/sec
40/sec
60/sec
80/sec
100/sec
200/sec
g). Read Device Type (F2)
SC84502 always echoes “FA, 00 “ following this command.
h). Set Remote Mode (F0)
Data values are reported only in response to a Read Data command.
i). Set Wrap Mode (EE)
Wrap mode remains until Reset (FF) or Reset Wrap Mode (EC) is received.
j). Reset Wrap Mode (EC)
SC84502 returns to the previous mode of operation after receiving this command.
k). Read Data (EB)
This command is executed in either remote or stream mode. The data is transmitted even if there has been
no movement since the last report or the button status is unchanged. Following a Read Data command, the
registers are cleared after a data transmission.
l). Set Stream Mode (EA)
This command sets SC84502 in stream mode.
m). Status Request (E9)
When this command is issued by the system, SC84502 respond with a 3-byte status report as follows:
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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Semiconductorsꢀ
SC84502
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Byte
Bit
0
Description
1=Right button pressed
1=Middle button pressed
1= Left button pressed
Reserved
1
1
2
3
4
0=Normal speed, 1=Autospeed
0=Disabled, 1=Enabled
0=Stream mode, 1=Remote mode
Reserved
5
6
7
2
3
0–7
0-7
Current resolution setting (D0-D7)
Current sampling rate (D0-D7)
n). Set Resolution ( E8,XX )
SC84502 provides four resolutions selected by the second byte of this command as follows:
Second Byte XX
Resolution
8 dot/count
4 dot/count
2 dot/count
1 dot/count
00
01
02
03
o). Set Autospeed ( E7 )
At the end of a sample interval in the stream mode, the current X and Y data values are converted new
values. The sign bits are not involved in this conversion. The conversion is only in stream mode. The
relationship between the input and output count follows:
Input
Output
0
0
1
1
2
1
3
3
6
4
5
9
N (≥6)
2.0*N
p). Reset Autospeed ( E6 )
This command restore normal speed.
6.TESTING MODE
Whenever OPT is connected to OSC OUT, the chip will enter buyer's testing mode. The X direction output signals
of comparators will present to L and M pin. Pressing "R" key can toggle the output from X direction to Y direction.
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Semiconductorsꢀ
SC84502
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TIMING DIAGRAM
(1) Photo-couples pulse width
X1(Y1)
X2(Y2)
Tr
Tf
(2) PS/2 Mouse
(A) Receiving Data
1st
CLK
2rd
CLK
9th
CLK
10th
CLK
11th
CLK
Inhibit
CLK
Tmca
Tmci
Tmdc
DATA
Line
Control
Bit
Start
Bit
Parity
Bit
Stop
Bit
Bit0-Bit7
(B) Sending Data
1st
2nd
10th
11th
CLK
CLK
CLK
CLK
CLK
Tscl
Tsca
Tpi
Tsdc
Tscd
DATA
Start
Bit
Parity
Bit
Stop
Bit
Bit0-Bit7
AC TIMING POINT
Output:
VDD-2.6
VSS+0.4
DATA
CLK PIN(PS/2 mouse mode)
VSS+1.6
Input:
X1, X2, Y1, Y2 PIN
VSS
VDD-0.8
V
SS+0.8
CLK, DATA PIN
L, M, R PIN
V
DD
V
SS
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Semiconductorsꢀ
SC84502
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SC84502 I/O PIN EQUIVALENT CIRCUITS
CLK:
X1,X2,Y1,Y2:
X1,X2,Y1,Y2
MOUSE DIGITAL SIGNAL
VCC
VCC
13.2kΩ
PS/2 MOUSE ENABLE
DATA INPUT SIGNAL
CLK
VCC
VCC
DATA INPUT SIGNAL
VPP/4
13.2kΩ
10kΩ
R, M, L:
DATA:
VCC
(R, L, M)
INTERNAL SIGNAL
(R,M,L)
VCC
DATA
PS/2 MOUSE ENABLE
DATA INPUT SIGNAL
DATA INPUT SIGNAL
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SC84502
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APPLICATIONS CIRCUITS
OP
V
DD
+5V
2
16
3
1
OSC DR
NC
Y2
Y1
X2
X1
L
15
14
13
12
11
10
9
NC
4
50k¡
OSC OUT
CLK
10µf
5
6
7
CLK
510
¡
510¡
DATA
DATA
M
GROUND
Vss
R
8
SC84502AP
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Semiconductorsꢀ
SC84502
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PACKAGE OUTLINE
DIP-14-300-2.54
UNIT:mm
2.54
1.50
15 degree
19.4
0.46
DIP-16-300-2.54
UNIT:mm
2.54
1.50
15 degree
19.4
0.46
ꢀ
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
ꢀ
2000.12.31
Rev: 1.0
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