500DKAC200M000ABF [SILICON]

Oscillator, 0.9MHz Min, 200MHz Max, 200MHz Nom;


型号：	500DKAC200M000ABF
厂家：	SILICON
描述：	Oscillator, 0.9MHz Min, 200MHz Max, 200MHz Nom
文件：	总4页 (文件大小：91K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Si500D

DIFFERENTIAL OUTPUT SILICON OSCILLATOR

Features

Quartz-free silicon oscillator

Any-rate output frequencies from 0.9 to 200 MHz

Quick turn delivery

Highly reliable startup and operation

Tri-state or power down operation

1.8, 2.5, or 3.3 V options

LVPECL, LVDS, HCSL, differential CMOS,

and differential SSTL versions available

3.2 x 4.0 mm footprint compatible with

industry-standard 3.2 x 5.0 mm pinout

Low power

Pb-free and RoHS compliant

Specifications

Parameters

Condition

Min

Typ

Max

Units

Frequency Range

0.9

—

–55

1.71

2.25

2.97

—

34.0

19.3

14.9

25.3

29.0

24.5

24.3

22.2

9.7

1.0

—

1.1

—

200

±150

+70

MHz

ppm

C°

Frequency Stability

Operating Temperature

Storage Temperature

See Note 1.

+125

1.98

2.75

3.63

36.0

22.2

16.5

29.3

31.8

27.7

26.7

1.8 V option

2.5 V option

3.3 V option

Supply Voltage

LVPECL

Low Power LVPECL

LVDS

HCSL

Differential CMOS(3.3 V option,10 pF,200 MHz)

Differential SSTL-3

Differential SSTL-2

Differential SSTL-18

Tri-State

Supply Current

10.7

1.9

54 + 13 ns/T

460

Powerdown

—

Output Symmetry

= 0

46 – 13 ns/T

DIFF

CLK

LVPECL/LVDS

HCSL/Differential SSTL

Differential CMOS, 15 pF, >80 MHz

Mid-level

—

800

1.6

– 1.34

.880

Rise and Fall Times (20/80%)

– 1.5

LVPECL Output Option

(DC coupling, 50 Ω to V – 2.0 V)

Diff swing

.720

Mid-level

Diff swing

Mid-level

Diff swing

Mid-level

Diff swing

Mid-level

Diff swing

—

.68

N/A

—

Low Power LVPECL Output Option

(AC coupling, 100 Ω Differential Load)

.95

1.26

0.45

0.96

0.45

.425

.82

1.15

0.25

0.85

0.25

0.35

0.65

LVDS Output Option (2.5/3.3 V)

= 100 Ω diff)

TERM

LVDS Output Option (1.8 V)

= 100 Ω diff)

TERM

HCSL Output Option

DC termination per pad

, sourcing 9 mA

– 0.6

—

0.6

CMOS Output Voltage

, sinking 9 mA

SSTL-18

SSTL-2

.5 x V + 0.375

.5 x V + 0.48

.5 x V – 0.375

.5 x V – 0.48

SSTL Output Voltage

SSTL-3

.45 x V + 0.48

—

.45 V – 0.48

Powerup Time

OE Deassertion to Clk Stop

Return from Output Driver Stopped Mode

Return From Tri-State Time

Return From Powerdown Time

From time V crosses min spec supply

—

µs

250 + 3 x T

12 + 3 x T

CLK

Non-CMOS

ps RMS

Period Jitter (1-sigma)

CMOS, C = 7 pF

1.0 MHz – min(20 MHz, 0.4 x F

),non-CMOS

0.6

0.7

OUT

Integrated Phase Jitter

1.0 MHz – min(20 MHz, 0.4 x F

),CMOS format

1.5

OUT

Notes:

1. Inclusive of 25 C° initial frequency accuracy, operating temperature range, supply voltage change, output load change, 1st year aging at

25 C°, shock and vibration.

2. See AN409 for further details regarding output clock termination recommendations. SSTL minimum output voltage is minimum V_OH. SSTL

maximum output voltage is maximum V_OL

Rev. 0.2 9/08

Si500D

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

Si500D

Package Specifications

Table 1. Package Diagram Dimensions (mm)

Dimension

Min

0.80

Nom

0.85

0.03

0.64

Max

0.90

0.05

0.69

Dimension

Min

0.00

—

Nom

0.05

—

Max

0.10

0.08

0.00

aaa

0.59

bbb

—

3.20 BSC.

ccc

—

1.27 BSC.

4.00 BSC.

0.95

ddd

eee

—

0.10

0.05

1.00

1.05

Table 2. Pad Connections

Table 3. Tri-State/Powerdown/Driver Stopped

Function on OE (3rd Option Code)

NC—Make no external

connection to this pin

Active

Open

Active

Tri-

State

Active

Power-

down

Active

Driver

Stopped

Level

GND

Output

Tri-

State

Active

Power-

down

Active

Driver

Stopped

Active

Level

Complementary Output

VDD

0 C CC CC

T T T T T T

Y YWW

Dimension

(mm)

2.70

1.27

0.75

1.55

0 = Si500

CCCCC = mark code

TTTTTT = assembly manufacturing code

YY = year

WW = work week

Figure 2. Top Mark

Figure 1. Recommended Land Pattern

Rev. 0.2

Si500D

Environmental Compliance

Parameter

Conditions/Test Method

Mechanical Shock

Mechanical Vibration

Resistance to Soldering Heat

Solderability

MIL-STD-883, Method 2002.4

MIL-STD-883, Method 2007.3 A

MIL-STD-202, 260 C° for 8 seconds

MIL-STD-883, Method 2003.8

IEC 68-2-3

Damp Heat

Moisture Sensitivity Level

J-STD-020, MSL 3

Ordering Information

The Si500D supports a variety of options including frequency, output format, supply voltage, and tri-

state/powerdown. Specific device configurations are programmed into the Si500D at time of shipment.

Configurations are specified using the figure below. Silicon Labs provides a web-based part number utility that can

be used to simplify part number configuration. Refer to www.silabs.com/XOPartNumber to access this tool. The

Si500D XO series is supplied in a ROHS-compliant, Pb-free, 6-pad, 3.2 x 4.0 mm package. Tape and reel

packaging is available as an ordering option.

500D

XXMXXXX

Frequency

Si500

Differential

Oscillator

R = Tape & Reel

Blank = Tubes

xMxxxxx: f_OUT< 10 MHz

xxMxxxx: 10 MHz < f_OUT< 100 MHz

xxxMxxx: f_OUT> 100 MHz

1^stOption Code

V_DDFormat

LVPECL

3^rdOption Code

Oper. Temp Range (degC)

0 to 70 deg C

3.3

2.5

1.8

Tri-State/Powerdown/

Output Driver Stopped

Low Power LVPECL

LVDS

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

LVPECL

Low Power LVPECL

LVDS

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

LVDS

OE active high/tristate

OE active low/tristate

OE active high/powerdown

OE active low/powerdown

OE active high/driver stopped

OE active low/driver stopped

Product Revision = B

2^ndOption Code

Package

Stability (ppm, max)

±150

3.2 x 4.0 mm SMD

HCSL

Dual Output CMOS

Differential CMOS

Dual Output SSTL

Differential SSTL

Rev. 0.2

Si500D

CONTACT INFORMATION

Silicon Laboratories Inc.

400 West Cesar Chavez

Austin, TX 78701

Tel: 1+(512) 416-8500

Fax: 1+(512) 416-9669

Toll Free: 1+(877) 444-3032

Email: XOinfo@silabs.com

Internet: www.silabs.com

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.

Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from

the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features

or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-

resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-

quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to

support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-

sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-

plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.

Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.

Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.

Rev. 0.2

500DKAC200M000ABF [SILICON]

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