500SEAB26M0000ACF [SILICON]
CMOS Output Clock Oscillator, 26MHz Nom, ROHS COMPLIANT, SMD, 4 PIN;![500SEAB26M0000ACF](http://pdffile.icpdf.com/pdf2/p00299/img/icpdf/500SMAFFREQA_1808121_icpdf.jpg)
型号: | 500SEAB26M0000ACF |
厂家: | ![]() |
描述: | CMOS Output Clock Oscillator, 26MHz Nom, ROHS COMPLIANT, SMD, 4 PIN 机械 输出元件 振荡器 |
文件: | 总6页 (文件大小:74K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Si500S
SINGLE-ENDED OUTPUT SILICON OSCILLATOR
Features
Quartz-free, MEMS-free, and PLL-free all-silicon oscillator Footprint compatible with industry-
standard 3.2 x 5.0 mm XOs
CMOS and SSTL versions available
Driver stopped, tri-state, or powerdown
operation
RoHS compliant
1.8, 2.5, or 3.3 V options
Low power
More than 10x better fit rate than
competing crystal solutions
Any output frequencies from 0.9 to 200 MHz
Short lead times
Excellent temperature stability (±20 ppm)
Highly reliable startup and operation
High immunity to shock and vibration
Low jitter: <1.5 ps rms
0 to 85 °C operation includes 10-year aging in hot
environments
Specifications
Condition
Min
Typ
Max
Units
Parameters
Frequency Range
0.9
—
200
MHz
Temperature stability,
0 to +70 °C
—
—
—
—
±10
±20
—
—
—
ppm
ppm
ppm
ppm
Temperature stability,
0 to +85 °C
Frequency Stability
Total stability,
±150
±250
0 to +70 °C operation1
Total stability,
—
0 to +85 °C operation2
Commercial
0
—
—
—
—
—
—
70
85
°C
°C
°C
V
Operating Temperature
Storage Temperature
Extended commercial
0
–55
1.71
2.25
2.97
+125
1.98
2.75
3.63
1.8 V option
2.5 V option
3.3 V option
Supply Voltage
V
V
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4. VTT = .5 x VDD
.
5. VTT = .45 x VDD
.
Rev. 1.1 10/11
Copyright © 2011 by Silicon Laboratories
Si500S
Si500S
Condition
Min
—
—
—
—
—
—
—
—
—
—
—
—
Typ
13.9
16.7
15.8
19.3
17.7
21.5
18.1
18.0
16.8
11.8
9.7
Max
16
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Parameters
1.8 V option, 40 pF, 40 MHz, CMOS
1.8 V option, 10 pF, 200 MHz, CMOS
2.5 V option, 40 pF, 40 MHz, CMOS
2.5 V option, 10 pF, 200 MHz, CMOS
3.3 V option, 40 pF, 40 MHz, CMOS
3.3 V option, 10 pF, 200 MHz, CMOS
SSTL-3.3, 200 MHz
19
18
22
20
24
Supply Current
20.2
19.7
18.7
13.1
10.7
1.9
SSTL-2.5, 200 MHz
SSTL-1.8, 200 MHz
Output Stopped, CMOS
Tri-State
Powerdown
1.0
54 +
13 ns/TCLK
Output Symmetry
0.5 x VDD
46 – 13 ns/TCLK
—
—
%
CMOS, CL = 15 pF measured from
20 to 80% of VDD
1.4
2.0
ns
Rise and Fall Times3
SSTL
—
VDD – 0.5
—
—
—
—
—
—
—
—
—
—
0.6
ns
V
VOH, sourcing 9 mA
—
0.5
CMOS Output Voltage
V
OL, sinking 9 mA
V
VOH
VOL
VOH
VOL
VOH
VOL
VTT + 0.375
—
—
SSTL-1.8 Output Voltage4
SSTL-2.5 Output Voltage4
SSTL-3.3 Output Voltage5
V
V
V
VTT – 0.375
—
VTT + 0.48
—
VTT – 0.48
—
VTT + 0.48
—
VTT – 0.48
From time VDD crosses min spec
supply
Powerup Time
—
—
—
—
—
—
2
ms
ns
ns
250 +
3 x TCLK
OE Deassertion to Clk Stop
Return from Output Driver
Stopped Mode
250 +
3 x TCLK
Return from Tri-State Time
—
—
—
—
12 + 3 x TCLK
2
µs
Return from Powerdown Time
ms
ps
RMS
Period Jitter (1-sigma)
SSTL3
—
1
2
1 MHz – 0.4 x FOUT, SSTL or CMOS
and CL < 7 pF,
ps
RMS
Integrated Phase Jitter
—
0.7
1.5
FOUT > 2.5 MHz
Notes:
1. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
first-year aging at 25 °C, shock, vibration, and one solder reflow.
2. Inclusive of 25 °C initial frequency accuracy, operating temperature range, supply voltage change, output load change,
ten-year aging at 85 °C, shock, vibration, and one solder reflow.
3. See “AN409: Output Termination Options for the Si500S and Si500D Silicon Oscillators” for further details regarding
output clock termination recommendations.
4. VTT = .5 x VDD
.
5. VTT = .45 x VDD
.
2
Rev. 1.1
Si500S
Package Specifications
Table 1. Package Diagram Dimensions (mm)
Dimension
Min
0.80
0.00
1.15
Nom
0.85
Max
0.90
0.05
1.25
Dimension
L1
Min
Nom
Max
0.10
0.10
0.10
0.08
0.10
0.05
A
A1
b
0.00
0.05
0.03
aaa
1.20
bbb
D
e
3.20 BSC
2.54 BSC
4.00 BSC
1.00
ccc
ddd
E
eee
L
0.95
1.05
Table 2. Pad Connections
Table 3. Tri-State/Powerdown/Driver Stopped
Function on OE (3rd Option Code)
1
2
3
4
OE
GND
Output
VDD
A
B
C
D
E
F
Open Active Active Active Active Active
Active
1
Tri-
State
Power-
down
Driver
Stopped
Active
Active
Active
Level
0
Tri-
Power-
down
Driver
Stopped
Active
Active
Active
Level State
0 C CC CC
T T T T T T
Y YWW
Dimension
(mm)
2.90
2.40
1.40
1.70
C1
E
X1
Y1
0 = Si500
CCCCC = mark code
TTTTTT = assembly manufacturing code
YY = year
WW = work week
Figure 2. Top Mark
Figure 1. Recommended Land Pattern
Rev. 1.1
3
Si500S
Environmental Compliance
Parameter
Conditions/Test Method
Mechanical Shock
Mechanical Vibration
Resistance to Soldering Heat
Solderability
MIL-STD-883, Method 2002.4
MIL-STD-883, Method 2007.3 A
MIL-STD-202, 260 C° for 8 seconds
MIL-STD-883, Method 2003.8
IEC 68-2-3
Damp Heat
Moisture Sensitivity Level
J-STD-020, MSL 3
Ordering Information
The Si500S supports a variety of options including frequency, output format, supply voltage, and tri-
state/powerdown/output driver stopped mode. Specific device configurations are programmed into the Si500S at
time of shipment. Configurations are specified using the figure below. Silicon Labs provides a web-based part
number
utility
that
can
be
used
to
simplify
part
number
configuration.
Refer
to
www.silabs.com/SiliconXOPartnumber to access this tool. The Si500S silicon oscillator is supplied in a ROHS-
compliant, 4-pad, 3.2 x 4.0 mm package. Tape and reel packaging is available as an ordering option.
500S
X
X
X
XXMXXXX
A
C
X
R
Frequency
R = Tape & Reel
Blank = Cut-Tape
Si500 Oscillator
xMxxxxx: fOUT < 10 MHz
xxMxxxx: 10 MHz < fOUT < 100 MHz
xxxMxxx: fOUT > 100 MHz
1st Option Code
VDD Format
3rd Option Code
Oper. Temp Range
Tri-State/Powerdown/
Output Driver Stopped
A
D
E
H
J
3.3
3.3
2.5
2.5
1.8
1.8
CMOS
SSTL
CMOS
SSTL
CMOS
SSTL
F
*H
0 to 70 °C
0 to 85 °C
A
B
C
D
E
F
OE active high/tristate
OE active low/tristate
OE active high/powerdown
OE active low/powerdown
OE active high/driver stopped
OE active low/driver stopped
Product Revision = C
M
2nd Option Code
Package
Stability (ppm, max)
A
3.2 x 4.0 mm SMD
A
B
±150
±250
*Note: Only +250 ppm is supported.
4
Rev. 1.1
Si500S
DOCUMENT CHANGE LIST
Revision 0.3 to Revision 0.4
Revision B to Revision C updated in Ordering Information
0 to 85 C° Operating Temperature Range option added
Multiple CMOS output format codes removed
Revision 0.4 to Revision 1.0
Clarified SSTL specifications.
Revised CMOS supply current max values .
Revision 1.0 to Revision 1.1
Updated Ordering information for ±250 ppm from 0 to
+85 °C.
Updated jitter from 1.5 ps to 1.5 ps rms.
Updated operating temperature to include extended
commercial at 0 to +85 °C.
Rev. 1.1
5
Si500S
CONTACT INFORMATION
Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Please visit the Silicon Labs Technical Support web page:
https://www.silabs.com/support/pages/contacttechnicalsupport.aspx
and register to submit a technical support request.
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-
plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
6
Rev. 1.1
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