C8051F012 [SILICON]
20 MIPS, 32 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU; 20 MIPS , 32 KB闪存, 10位ADC , 32引脚混合信号MCU型号: | C8051F012 |
厂家: | SILICON |
描述: | 20 MIPS, 32 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU |
文件: | 总2页 (文件大小:166K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
C8051F012
20 MIPS, 32 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
10-Bit ADC
-
Pipelined instruction architecture; executes 70% of Instructions in 1 or 2
system clocks
-
-
-
-
-
-
±1 LSB INL; no missing codes
-
Up to 20 MIPS throughput with 20 MHz clock
Expanded interrupt handler; up to 21 interrupt sources
Programmable throughput up to 100 ksps
4 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
-
Memory
-
-
256 bytes data RAM
32 kB Flash; in-system programmable in 512-byte sectors (512 bytes
Two 12-Bit DACs
are reserved)
-
Voltage output
Digital Peripherals
-
10 µsec settling time
-
-
-
8 port I/O; all are 5 V tolerant
Comparator
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
-
16 programmable hysteresis values
Configurable to generate interrupts or reset
available concurrently
-
Programmable 16-bit counter/timer array with five capture/compare
modules
Internal Voltage Reference
-
4 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
V
Monitor/Brown-out Detector
DD
-
On-Chip JTAG Debug
Clock Sources
-
-
-
-
On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit
emulation
-
-
-
Internal programmable oscillator: 2–16 MHz
External oscillator: Crystal, RC, C, or Clock
Can switch between clock sources on-the-fly
Supports breakpoints, single stepping, watchpoints, inspect/modify
memory, and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Fully compliant with IEEE 1149.1 specification
Supply Voltage: 2.7 to 3.6 V
-
Typical operating current: 10 mA at 20 MHz
Multiple power saving sleep and shutdown modes
-
32-Pin LQFP
Temperature Range: –40 to +85 °C
VDD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
VDD
Digital Power
P
0
UART
C
DGND
DGND
R
SMBus
D
r
O
SPI Bus
AV+
S
AV+
AGND
AGND
v
Analog Power
5-Chnl
S
PCA
B
P
1
Timers
32 kB
A
TCK
TMS
TDI
Boundary Scan
Debug HW
8
0
5
1
0,1,2
FLASH
JTAG
Logic
R
D
r
TDO
Timer 3
256 Byte
RAM
Reset
v
S
RST
Port 0
W
Latch
P
2
VDD
WDT
I
Monitor
Port 1
T
Latch
D
r
C
External
Oscillator
Circuit
C
o
r
XTAL1
XTAL2
Port 2
H
Latch
System Clock
v
SFR Bus
Internal
P
3
Oscillator
Port 3
Latch
e
VREF
DAC1
VREF
D
r
DAC1
v
(12-Bit)
DAC0
DAC0
(12-Bit)
AIN0.0
AIN0.1
AIN0.2
AIN0.3
ADC
100 ksps
(10-Bit)
A
Prog
Gain
M
U
X
TEMP
SENSOR
CP0+
CP0-
CP0
CP1
Precision Mixed Signal
Copyright © 2004 by Silicon Laboratories
6.15.2004
C8051F012
20 MIPS, 32 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GLOBAL CHARACTERISTICS
Analog Supply Voltage
Analog Supply Current
2.7
3.6
V
Internal REF, ADC, DAC, Comparators all
0.8
5
mA
active
Analog Supply Current with
analog sub-systems inactive
Digital Supply Voltage
Digital Supply Current with
CPU active
Internal REF, ADC, DAC, Comparators all
disabled
µA
2.7
3.6
V
Clock = 20 MHz
Clock = 1 MHz
10
0.5
20
2
mA
mA
µA
µA
Clock = 32 kHz
Digital Supply Current
(shutdown mode)
Oscillator not running
VDD Data Retention Voltage
CPU & DIGITAL I/O
Clock Frequency Range
Port Output High Voltage
Port Output Low Voltage
Input High Voltage
Input Low Voltage
SMBus SCL Frequency
SPI Bus Clock Frequency
A/D CONVERTER
Resolution
RAM remains valid
1.5
V
DC
20
MHz
V
IOH = –3 mA, Port I/O push-pull
IOL = 8.5 mA
VDD – 0.7
0.6
V
0.8 x VDD
V
0.2 x VDD
SYSCLK/8
SYSCLK/2
V
SYSCLK = MCU system clock
SYSCLK = MCU system clock
MHz
MHz
10
bits
LSB
LSB
ksps
V
Integral Nonlinearity
Differential Nonlinearity
Throughput Rate
±1
±1
Guaranteed Monotonic
100
VREF
Input Voltage Range
D/A CONVERTERS
Resolution
0
12
bits
LSB
LSB
LSB
µs
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Specified from Data Word 014h to FEBh
Guaranteed Monotonic
Data Word = 014h
To ½ LSB of full-scale
±4
±1
±3
Output Settling Time
Output Voltage Swing
COMPARATOR
10
0
VREF – 1 LSB
V
Supply Current
1.5
4
µA
µs
V
Response Time
| (CP+) – (CP-) | = 100 mV
Input Voltage Range
Input Bias Current
Input Offset Voltage
–0.25
–5
(AV+) +0.25
0.001
+5
nA
mV
–10
+10
C8051F005DK Development Kit
Package Information
D
D1
MIN NOM MAX
(mm) (mm) (mm)
A
-
-
-
1.60
0.15
A1 0.05
E1
A2 1.35 1.40 1.45
E
b
D
0.30 0.37 0.45
-
-
-
-
-
9.00
7.00
0.80
9.00
7.00
-
-
-
-
-
32
PIN 1
D1
e
IDENTIFIER
1
A2
A
E
E1
A1
b
e
Precision Mixed Signal
Copyright © 2004 by Silicon Laboratories
6.15.2004
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
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