C8051F044-GQ [SILICON]
25 MIPS, 64 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU; 25 MIPS ， 64 KB闪存， 10位ADC ， 100引脚混合信号MCU
| 型号： | C8051F044-GQ |
| 厂家： | 
SILICON |
| 描述： | 25 MIPS, 64 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU |
| 文件： | 总2页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C8051F044
25 MIPS, 64 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
10-Bit ADC
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
-
-
-
-
-
-
±1 LSB INL; guaranteed monotonic
-
-
Up to 25 MIPS throughput with 25 MHz system clock
Programmable throughput up to 100 ksps
13 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
Expanded interrupt handler
Memory
-
-
4352 bytes data RAM
64 kB Flash; in-system programmable in 512-byte sectors (512 bytes
are reserved)
High-Voltage Differential Amplifier
-
External parallel data memory interface
-
-
-
60 V common mode input range
Offset adjust from –60 to +60 V
16 gain settings from 0.05 to 16
CAN Bus 2.0B
-
-
32 message objects
”Mailbox" implementation only interrupts CPU when needed
Three Comparators
Internal Voltage Reference
Digital Peripherals
Precision V Monitor/Brown-out Detector
-
-
64 port I/O; all are 5 V tolerant
DD
On-Chip JTAG Debug & Boundary Scan
Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
ports available concurrently
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
-
-
-
-
Programmable 16-bit counter array with 6 capture/compare modules
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using timer 3 or PCA
-
Provides breakpoints, single stepping, watchpoints, stack monitor, pro-
gram trace memory
-
-
Inspect/modify memory and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Clock Sources
-
-
Internal programmable 2% oscillator: up to 25 MHz
-
IEEE1149.1 compliant boundary scan
External oscillator: Crystal, RC, C, or Clock
Supply Voltage: 2.7 to 3.6 V
Package
-
-
Typical operating current: 10 mA at 25 MHz
-
100-pin TQFP (standard lead and lead-free packages)
Multiple power saving sleep and shutdown modes
Ordering Part Numbers
Temperature Range: –40 to +85 °C
-
-
Lead-free package: C8051F044-GQ
Standard package: C8051F044
VDD
VDD
Digital Power
UART0
UART1
P0.0
P0.7
P0
Drv
VDD
DGND
DGND
DGND
AV+
8
0
5
1
C
R
O
S
S
B
A
R
SMBus
SPI Bus
PCA
SFR Bus
P1.0
P1.7
Analog Power
AV+
P1
Drv
AV+
AGND
AGND
AGND
Timers
0,1,2,3,4
P2.0/CPx
P2.7/CPx
TCK
TMS
TDI
P2
Drv
Boundary Scan
JTAG
Logic
Debug HW
Port
0,1,2,3
&4
TDO
64 kB
FLASH
Reset
RST
P3.0/AINAMUX0
P3.7/AINAMUX7
P3
Drv
Latches
VDD
Monitor
WDT
MONEN
C
o
r
32x136
CANRAM
CANTX
CANRX
CAN
2.0B
External
Oscillator
Circuit
XTAL1
XTAL2
System
Clock
256 byte
RAM
VREF
VREF
4 kB
XRAM
e
P2.0
P2.1
Internal
2%
Oscillator
+
-
CP0
P2.2
P2.3
+
-
CP1
P2.4
P2.5
+
-
CP2
VREF0
AIN0.0
AIN0.1
AIN0.2
AIN0.3
P4.0
A
M
U
X
ADC
100 ksps
(10-Bit)
P4
DRV
P4.4
Port 4 <from crossbar>
Bus Control
Prog
Gain
P4.5/ALE
P4.6/RD
P4.7/WR
External Data Memory Bus
Ctrl Latch
P5.0/A0
P5 Latch
Addr [7:0]
P6 Latch
P5
DRV
Address [15:0]
TEMP
SENSOR
P5.7/A7
P6.0/A8
A
P6
DRV
M
U
X
8:2
Addr [15:8]
P7 Latch
P6.7/A15
P7.0/D0
P7
DRV
HVAIN+
HVAIN-
Data [7:0]
HVAMP
P7.7/D7
Data Latch
HVREF
HVCAP
CAN 2.0B
Copyright © 2005 by Silicon Laboratories
5.5.2005
C8051F044
25 MIPS, 64 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
Parameter
Global Characteristics
Supply Voltage
Conditions
Min
Typ
Max
Units
2.7
—
—
3.6
—
V
Supply Current with
CPU active
Clock = 25 MHz
Clock = 1 MHz
Clock = 32 kHz; VDD Monitor Enabled
10
0.5
20
mA
mA
µA
Supply Current (shutdown)
Clock Frequency Range
A/D Converter
Oscillator off; VDD Monitor Disabled
—
0.1
—
—
µA
DC
25
MHz
Resolution
—
—
10
—
—
±1
±1
—
bits
LSB
LSB
dB
Integral Nonlinearity
Differential Nonlinearity
Guaranteed Monotonic
Signal-to-Noise Plus
Distortion
59
—
Throughput Rate
Input Voltage Range
Comparators
—
0
—
—
100
ksps
V
VREF
Supply Current
Response Time
(each Comparator)
—
—
1.5
4
—
—
µA
µs
(CP+ – CP-) = 100 mV
C8051F040DK Development Kit
Package Information
D
MIN NOM MAX
(mm) (mm) (mm)
D1
A
-
-
-
1.20
0.15
A1 0.05
A2 0.95 1.00 1.05
b
D
0.17 0.22 0.27
-
-
-
-
-
16.00
14.00
0.50
-
-
-
-
-
D1
e
E1
E
E
16.00
14.00
E1
100
PIN 1
DESIGNATOR
1
e
A2
A
b
A1
CAN 2.0B
Copyright © 2005 by Silicon Laboratories
5.5.2005
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
相关型号：
C8051F044-GQR
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This change is considered a minor change which does not affect form, fit, function, quality, or reliability.
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