C8051F531A [SILICON]
25 MIPS, 8 kB Flash, 12-Bit ADC, 20-Pin Automotive MCU; 25 MIPS ， 8 kB的闪存， 12位ADC ， 20引脚汽车MCU
| 型号： | C8051F531A |
| 厂家： | 
SILICON |
| 描述： | 25 MIPS, 8 kB Flash, 12-Bit ADC, 20-Pin Automotive MCU |
| 文件： | 总1页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C8051F531A
25 MIPS, 8 kB Flash, 12-Bit ADC, 20-Pin Automotive MCU
Analog Peripherals
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of instructions in one or
two system clocks
12-Bit ADC, 5 V input signal; up to 16 external inputs
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-
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±1 LSB INL; guaranteed monotonic
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Up to 25 MIPS throughput
Programmable throughput up to 200 ksps
Data-dependent windowed interrupt generator
Programmable gain maximizes input signal span
Memory
-
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8 kB Flash; in-system programmable; flexible security features
256 bytes data RAM
Built-in Temperature Sensor (±3 °C)
Programmable Comparator
Digital Peripherals
Precision Internal Voltage Reference
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-
-
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Up to 16 digital I/O; all are 5 V push-pull
V
Monitor/Brown-out Detector
SPI™ and UART serial ports available concurrently
Programmable 16-bit counter array with three capture/compare modules
Three general-purpose 16-bit counter/timers
DD
On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Clock Sources
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-
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Provides breakpoints, single stepping, watch-points
Inspect/modify memory, registers, and stack
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Internal programmable 0.5% oscillator: Up to 25 MHz
External oscillator: Crystal, RC, C, or CMOS Clock
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Ordering Part Numbers
2
Temperature Range: –40 to +125 °C
Operating Voltage: 1.8 to 5.25 V
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C8051F531A-IT, 20-Pin TSSOP (RoHS-compliant), 6 x 6 mm
2
C8051F531A-IM, 20-Pin QFN (RoHS-compliant), 4 x 4 mm
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Multiple power saving sleep and shutdown modes
Development Kit: C8051F530ADK
VREGIN
Port I/O Configuration
Power On
Reset
CIP-51 8051 Controller
Core (25 MHz)
Digital Peripherals
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6/C2D
P0.7/XTAL1
Reset
8 kB Flash Program
Memory
UART0
Debug /
Programming
Hardware
C2CK/RST
Port 0
Drivers
Timers 0,
256 Byte SRAM
1, 2
Priority
Crossbar
C2D
Decoder
3 Channel
PCA/WDT
P1.0/XTAL2
P1.1
P1.2
SPI
Voltage Regulator
(LDO)
VREGIN
P1.3
P1.4
P1.5
P1.6
Port 1
Drivers
Crossbar Control
SFR
Bus
VDD
GND
Analog Peripherals
P1.7
Voltage
Reference
VREF
System Clock Setup
VDD
VREF
XTAL1
XTAL2
External Oscillator
VDD
VREF
A
M
U
X
12-bit
200ksps
ADC
Internal Oscillator
(±0.5%)
Temp
Sensor
GND
CP0, CP0A
+
-
Comparator
Automotive
Copyright © 2008 by Silicon Laboratories
11.20.2008
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