SI4825-A10-CSR [SILICON]
Audio Single Chip Receiver,;
| 型号： | SI4825-A10-CSR |
| 厂家： | 
SILICON |
| 描述： | Audio Single Chip Receiver, 商用集成电路 |
| 文件： | 总21页 (文件大小：1247K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si4825-A10
BROADCAST MECHANICAL TUNING AM/FM/SW RADIO RECEIVER
Features
Worldwide FM band support
(64–109 MHz)
Worldwide AM band support
(504–1750 kHz)
SW band support
(2.3–28.5 MHz)
No manual alignment necessary
Mono audio output
Selectable support AM/FM/SW
regional bands
Automatic frequency control (AFC)
Integrated LDO regulator
2.0 to 3.6 V supply voltage
Wide range of ferrite loop sticks and
air loop antennas supported
16-pin SOIC
RoHS-compliant
Direct volume control
Not EN55020 compliant*
Ordering Information:
*Note: For consumer applications that
require EN 55020 compliance,
use Si483x.
See page 14.
Enhanced FM/SW band coverage
Applications
Pin Assignments
Table and portable radios
Mini/micro systems
CD/DVD players
Modules
Clock radios
Mini HiFi
Si4825-A10 (SOIC)
Boom boxes
Entertainment systems
1
AOUT
GND
16
LNA_EN
Description
2
3
4
5
6
7
8
15
14
13
12
11
10
9
TUNE1
TUNE2
BAND
NC
VDD
The Si4825 is the entry level mechanical-tuned digital CMOS AM/FM/SW radio
receiver IC that integrates the complete receiver function from antenna input to
audio output. The Si4825 extends Silicon Laboratories multi-band tuner family,
and further increases the ease and attractiveness of design radio reception to
audio devices through small size and board area, minimum component count, and
superior, proven performance. The Si4825 requires a simple application circuit
and removes any requirements for manually tuning components during the
manufacturing process. The receiver has very low power consumption, runs off
two AAA batteries, and delivers the performance benefits of digital tuning to the
analog radio market.
XTALI
XTALO
VOL-
VOL+
RST
FMI
RFGND
AMI
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
Functional Block Diagram
Si4825
7,272,373;
7,355,476;
7,272,375;
7,426,376;
7,321,324;
7,471,940;
ADC
ADC
AMI
AM
ANT
LNA
AGC
DSP
DAC
ADC
AOUT
RFGND
7,339,503; 7,339,504.
FM
ANT
FMI
0/90
TUNE1/2
BAND
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD
XTAL
OSC
Rev. 1.0 5/13
Copyright © 2013 by Silicon Laboratories
Si4825
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si4825-A10
2
Rev. 1.0
Si4825-A10
TABLE OF CONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.2. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.3. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.4. SW Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.5. Frequency Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.6. Band Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.7. Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.8. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
5. Pin Descriptions: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
6. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
7. Package Outline: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
8. PCB Land Pattern: Si4825-A10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
9. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
9.1. Si4825-A10 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
9.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
10. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Rev. 1.0
3
Si4825-A10
1. Electrical Specifications
Table 1. Recommended Operating Conditions1,2
Parameter
Symbol Test Condition
Min
2
Typ
—
Max
3.6
—
Unit
V
3
Supply Voltage
V
DD
Power Supply Powerup Rise Time
Ambient Temperature Range
Note:
V
10
0
—
µs
DDRISE
T
25
70
°C
A
1. Typical values in the data sheet apply at VDD = 3.3 V and 25 °C unless otherwise stated.
2. All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for
minimum VDD = 2.7 V.
3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to 2.0 V. Part
initialization may become unresponsive below 2.3 V.
Table 2. DC Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
—
Typ
20.0
19.0
10
Max
—
Unit
mA
mA
µA
FM Mode
*
I
Supply Current
FM
AM/SW Mode
*
I
—
—
Supply Current
AM
Supplies and Interface
Powerdown Current
V
I
—
—
DD
DDPD
*Note: Specifications are guaranteed by characterization.
4
Rev. 1.0
Si4825-A10
Table 3. Reset Timing Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
RSTB Pulse Width
Symbol
Min
100
100
0
Typ
—
Max
—
Unit
µs
t
t
PRST
SRST
RRST
VDD valid time before RSTB rises
RSTB low time before VDD becomes invalid
Notes:
—
—
µs
t
—
—
µs
1. RSTB must be held low for at least 100 µs after the voltage supply has been ramped up.
2. RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down.
tRRST
tSRST
tPRST
VDD
RSTB
Figure 1. Reset Timing
Rev. 1.0
5
Si4825-A10
Table 4. FM Receiver Characteristics1,2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Input Frequency
Symbol
Test Condition
Min
64
Typ
—
Max
109
—
Unit
MHz
f
RF
Sensitivity with Headphone
(S+N)/N = 26 dB
—
4.0
µV EMF
3
Network
4,5
—
—
—
—
—
—
—
—
—
15
—
10
—
4
5
—
—
—
—
—
—
—
—
30
—
0.5
—
50
k
LNA Input Resistance
4,5
pF
dB
LNA Input Capacitance
4,5,6,7
m = 0.3
50
105
45
60
72
45
—
—
0.1
—
—
AM Suppression
4,8
dBµV EMF
dB
Input IP3
4
4
±200 kHz
±400 kHz
Adjacent Channel Selectivity
dB
Alternate Channel Selectivity
5,6,7
mV
Audio Output Voltage
RMS
5,6,7,9,10
dB
Audio Mono S/N
4
–3 dB
–3 dB
Hz
kHz
%
Audio Frequency Response Low
4
Audio Frequency Response High
6,5,11
Audio THD
4,10
R
Single-ended
Single-ended
k
pF
Audio Output Load Resistance
L
L
4,10
C
Audio Output Load Capacitance
Notes:
1. Additional testing information is available in “AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 98.1 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN738: Si4825/36-A Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. Frequency is 64~109 MHz.
4. Guaranteed by characterization.
5. VEMF = 1 mV.
6. FMOD = 1 kHz, MONO, and L = R unless noted otherwise.
7. f = 22.5 kHz.
8. |f2 – f1| > 2 MHz, f = 2 x f – f .
0
1
2
9. BAF = 300 Hz to 15 kHz, A-weighted.
10. At AOUT pin.
11. f = 75 kHz.
6
Rev. 1.0
Si4825-A10
Table 5. AM/SW Receiver Characteristics1, 2
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Input Frequency
Symbol
Test Condition
Medium Wave (AM)
Short Wave (SW)
(S+N)/N = 26 dB
Min
504
2.3
—
Typ
—
Max
1750
28.5
—
Unit
kHz
f
RF
—
MHz
3,4,5
30
µV EMF
Sensitivity
5
THD < 8%
—
—
300
40
—
—
mV
Large Signal Voltage Handling
RMS
RMS
5
∆V = 100 mVRMS, 100 Hz
dB
Power Supply Rejection Ratio
DD
3,6
—
54
—
mV
Audio Output Voltage
3,4,6
—
45
—
dB
Audio S/N
3,6
—
0.1
—
—
%
Audio THD
5,7
180
450
µH
Antenna Inductance
Notes:
1. Additional testing information is available in “AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.”
Volume = maximum for all tests. Tested at RF = 6 MHz.
2. To ensure proper operation and receiver performance, follow the guidelines in “AN738: Si4825/36-A Antenna,
Schematic, Layout, and Design Guidelines.” Silicon Laboratories will evaluate schematics and layouts for qualified
customers.
3. FMOD = 1 kHz, 30% modulation, 2 kHz channel filter.
4. BAF = 300 Hz to 15 kHz, A-weighted.
5. Guaranteed by characterization.
6. VIN = 5 mVrms.
7. Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance levels.
Table 6. Reference Clock and Crystal Characteristics
(VDD = 2.7 to 3.6 V, TA = 0 to 70 °C)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Reference Clock
XTALI Supported Reference Clock
Frequencies
—
32.768
—
—
kHz
Reference Clock Frequency
Tolerance for XTALI
–100
100
ppm
Crystal Oscillator
Crystal Oscillator Frequency
—
–100
—
32.768
—
—
100
3.5
kHz
ppm
pF
Crystal Frequency Tolerance
Board Capacitance
—
Rev. 1.0
7
Si4825-A10
Table 7. Thermal Conditions
Parameter
Thermal Resistance*
Ambient Temperature
Junction Temperature
Symbol
Min
—
0
Typ
80
Max
—
Unit
°C/W
°C
JA
T
25
70
A
T
—
—
77
°C
J
*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB pad.
Table 8. Absolute Maximum Ratings1,2
Parameter
Supply Voltage
Symbol
Value
–0.5 to 5.8
10
Unit
V
V
I
DD
IN
3
Input Current
mA
C
Operating Temperature
Storage Temperature
T
–40 to 95
–55 to 150
0.4
OP
T
C
STG
4
RF Input Level
V
PK
Notes:
1. Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2. The Si4825 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV HBM.
Handling and assembly of these devices should only be done at ESD-protected workstations.
3. For input pins RST, VOL+, VOL–, XTALO, XTALI, BAND, TUNE2, TUNE1, LNA_EN.
4. At RF input pins, FMI and AMI.
8
Rev. 1.0
Si4825-A10
2. Typical Application Schematic
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Notes:
1. Place C4 close to VDD and GND pins.
2. Pin 15 GND connects directly to GND plane on PCB.
3. Pin 5 leave floating.
4. To ensure proper operation and receiver performance, follow the guidelines in "AN738: Si4825/36-A Antenna,
Schematic, Layout, and Design Guidelines." Silicon Labs will evaluate the schematics and layouts for qualified
customers.
5. Pin 6 connects to the FM antenna interface and pin 8 connects to the AM antenna interface.
6. Place Si4825 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.
7. Recommend keeping the AM ferrite loop antenna at least 5 cm away from the tuner chip.
8. Keep the AM ferrite loop antenna at least 5 cm away from MCU, audio AMP, and other circuits which have AM
interference.
9. Place the transformer T1 away from any sources of interference and even away from the I/O signals of the Si4825.
Rev. 1.0
9
Si4825-A10
3. Bill of Materials
Table 9. Si4825-A Bill of Materials
Value/Description
Component(s)
Supplier
Murata
Murata
Venkel
Murata
Kennon
Venkel
Venkel
Venkel
Venkel
Venkel
C1
C4
C5
B1
Reset capacitor 0.1 µF, ±20%, Z5U/X7R
Supply bypass capacitor, 0.1 µF, ±20%, Z5U/X7R
Coupling capacitor, 0.47 µF, ±20%, Z5U/X7R
Ferrite bead 2.5 k/100 MHz
VR1
R1
R3
R4
R5
R6
U1
Variable resistor (POT), 100 k, ±10%
Reset timing resistor, 100 k, ±5%
Resistor, 133 k, ±1%,
Resistor, 160 k, ±1%
Resistor, 67 k, ±1%
Resistor,140 k, ±1%
Si4825-A AM/FM/SW Analog Tune Analog Display Radio Tuner
Silicon
Laboratories
S1
Band switch
Any, depends
on customer
ANT1
Ferrite stick,180-450 μH
Jiaxin
Optional Components
C2, C3
Y1
Crystal load capacitors, 22 pF, ±5%, COG
(Optional: for crystal oscillator option)
Venkel
32.768 kHz crystal (Optional: for crystal oscillator option)
Epson or equiv-
alent
ANT2
Air loop antenna, 10–20 μH
Various
10
Rev. 1.0
Si4825-A10
4. Functional Description
Si4825
ADC
ADC
AMI
AM
ANT
LNA
DSP
DAC
AOUT
RFGND
FM
ANT
AGC
FMI
0/90
TUNE1/2
BAND
ADC
AFC
REG
CONTROL INTERFACE
XTALI
2.0~3.6V
VDD
XTAL
OSC
Figure 2. Si4825 Functional Block Diagram
4.2. FM Receiver
4.1. Overview
The Si4825 is the entry level mechanical-tuned digital The Si4825 integrates a low noise amplifier (LNA)
CMOS AM/FM/SW radio receiver IC that integrates the supporting the worldwide FM broadcast band (64 to
complete receiver function from antenna input to audio 109 MHz) and the TV audio stations within the
output. The Si4825 extends Silicon Laboratories multi- frequency range in China area are also supported.
band tuner family, and further increases the ease and
Pre-emphasis and de-emphasis is a technique used by
attractiveness of design radio reception to audio
FM broadcasters to improve the signal-to-noise ratio of
devices through small size and board area, minimum
FM receivers by reducing the effects of high frequency
component count, and superior, proven performance.
interference and noise. When the FM signal is
The Si4825 requires a simple application circuit, and
removes any requirements for manually tuning
components during the manufacturing process.
transmitted,
a
pre-emphasis filter is applied to
accentuate the high audio frequencies. All FM receivers
incorporate a de-emphasis filter which attenuates high
Leveraging Silicon Laboratories' proven and patented frequencies to restore a flat frequency response. Two
digital low intermediate frequency (low-IF) receiver time constants are used in various regions. The de-
architecture, the Si4825 delivers desired RF emphasis time constant can be chosen to be 50 or
performance and interference rejection in AM, FM, and 75 µs.
SW bands. The high integration and complete system
production test simplifies design-in, increases system
quality, and improves manufacturability.
Rev. 1.0
11
Si4825-A10
4.3. AM Receiver
4.5. Frequency Tuning
The highly integrated Si4825-A10 supports worldwide
A
valid channel can be found by tuning the
AM band reception from 504 to 1750 kHz with five sub- potentiometer that is connected to the TUNE1 and
bands using a digital low-IF architecture with a minimum TUNE2 pin of the Si4825-A10 chip.
number of external components and no manual
4.6. Band Select
alignment required. This patented architecture allows
for high-precision filtering, offering excellent selectivity The Si4825-A10 supports worldwide AM band with five
and SNR with minimum variation across the AM band. sub-bands, US/Europe/Japan/China FM band with five
The Si4825 supports the worldwide AM band with five sub-bands, and SW band with 36 sub-bands. For details
sub-bands. One of the bands is a universal AM band on band selection, refer to “AN738: Si4825/36-A
(AM4, 520–1730 kHz) supporting both 9 kHz and Antenna, Schematic, Layout, and Design Guidelines."
10 kHz channel spaces for all regional AM standards of
4.7. Volume Control
the world. Similar to the FM receiver, the Si4825-A10
optimizes sensitivity and rejection of strong interferers, The Si4825 not only allows customers to use the
allowing better reception of weak stations.
traditional PVR wheel volume control through an
external speaker amplifier, it also supports direct digital
volume control through pins 10 and pin 11 by using
volume up and down buttons. Refer to "AN738:
Si4825/36-A Antenna, Schematic, Layout, and Design
Guidelines."
To offer maximum flexibility, the receiver supports a
wide range of ferrite loop sticks from 180–450 µH. An
air loop antenna is supported by using a transformer to
increase the effective inductance from the air loop.
Using a 1:5 turn ratio inductor, the inductance is
increased by 25 times and easily supports all typical AM
air loop antennas, which generally vary between 10 and
20 µH.
4.8. Reset, Powerup, and Powerdown
Setting the RSTB pin low will disable analog and digital
circuitry, reset the registers to their default settings, and
disable the bus. Setting the RSTB pin high will bring the
device out of reset.
4.4. SW Receiver
The Si4825 supports 36 short wave (SW) band
receptions from 2.3 to 28.5 MHz, 18 of which are meter Figure 1 shows typical reset, startup, and shutdown
wave band (Narrow), and the rest of the SW bands are timings for the Si4825. RSTB must be held low
with wider frequency range that can be used in SW (asserted) during any power supply transitions and kept
radio with 1 or 2 SW bands. Si4825 supports extensive asserted as specified in Figure 1 after the power
short wave features such as minimal discrete supplies are ramped up and stable. Failure to assert
components and no factory adjustments. The Si4825 RSTB as indicated here may cause the device to
supports using the FM antenna to capture short wave malfunction and may result in permanent device
signals.
damage.
A powerdown mode is available to reduce power
consumption when the part is idle. Putting the device in
powerdown mode will disable analog and digital circuitry
while keeping the bus active.
12
Rev. 1.0
Si4825-A10
5. Pin Descriptions: Si4825-A10
1
AOUT
GND
16
15
14
13
12
11
10
9
LNA_EN
2
TUNE1
3
TUNE2
VDD
4
XTALI
BAND
5
NC
XTALO
VOL-
VOL+
RST
6
FMI
7
RFGND
8
AMI
Pin Number(s)
Name
LNA_EN
TUNE1
TUNE2
BAND
NC
Description
1
2
3
4
5
6
7
8
Enable SW external LNA.
Frequency tuning
Frequency tuning
Band selection and de-emphasis selection
No connect. Leave floating.
FMI
FM RF inputs. FMI should be connected to the antenna trace.
RF ground. Connect to ground plane on PCB.
AM RF input. AMI should be connected to the AM antenna.
RFGND
AMI
9
RST
VOL+
VOL–
XTALO
XTALI
VDD
Device reset (active low) input
Volume button up
10
11
12
13
14
15
16
Volume button down
Crystal oscillator output
Crystal oscillator input/external reference clock input
Supply voltage. May be connected directly to battery.
Ground. Connect to ground plane on PCB.
Audio output
GND
AOUT
Rev. 1.0
13
Si4825-A10
6. Ordering Guide
1,2
Description
AM/FM/SW Broadcast Radio Receiver
Package
Type
Operating
Temperature/Voltage
Part Number
Si4825-A10-CS
16L SOIC
Pb-free
0 to 70 °C
2.0 to 3.6 V
Notes:
1. Add an “(R)” at the end of the device part number to denote tape and reel option. The devices will typically operate at
25 °C with degraded specifications for VDD voltage ramped down to 2.0 V.
2. The -C suffix in the part number indicates Consumer Grade product. Please visit www.silabs.com to get more
information on product grade specifications.
14
Rev. 1.0
Si4825-A10
7. Package Outline: Si4825-A10
The 16-pin SOIC illustrates the package details for the Si4825-A10. Table 10 lists the values for the dimensions
shown in the illustration.
Figure 3. 16-Pin SOIC
Rev. 1.0
15
Si4825-A10
Table 10. Package Dimensions
Dimension
Min
Max
1.75
0.25
—
A
A1
A2
b
—
0.10
1.25
0.31
0.51
0.25
c
0.17
D
9.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
0.40
E
E1
e
L
1.27
L2
h
0.25 BSC
0.25
0.50
8°
θ
0°
aaa
bbb
ccc
ddd
0.10
0.20
0.10
0.25
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MS-012, Variation AC.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for
Small Body Components.
16
Rev. 1.0
Si4825-A10
8. PCB Land Pattern: Si4825-A10
Figure 4, “PCB Land Pattern,” illustrates the PCB land pattern details for the Si4825-A10-CS SOIC. Table 11 lists
the values for the dimensions shown in the illustration.
Figure 4. PCB Land Pattern
Table 11. PCB Land Pattern Dimensions
Dimension
Feature
Pad Column Spacing
Pad Row Pitch
Pad Width
(mm)
5.40
1.27
0.60
1.55
C1
E
X1
Y1
Pad Length
Notes:
1. This Land Pattern Design is based on IPC-7351 pattern SOIC127P600X165-16N
for Density Level B (Median Land Protrusion).
2. All feature sizes shown are at Maximum Material Condition (MMC) and a card
fabrication tolerance of 0.05 mm is assumed.
Rev. 1.0
17
Si4825-A10
9. Top Marking
9.1. Si4825-A10 Top Marking
9.2. Top Marking Explanation
Mark Method:
Pin 1 Mark:
Laser
Mold Dimple (Bottom-Left Corner)
0.71 mm (2.0 Point) Right-Justified
Custom Part Number
Font Size:
Line 1 Mark Format:
Si4825A10
Circle = 1.3 mm Diameter
“e3” Pb-Free Symbol
YY = Year
WW = Work week
Assigned by the Assembly House. Corresponds to the
year and work week of the mold date.
Line 2 Mark Format:
TTTTTT = Manufacturing code
Manufacturing Code from the Assembly Purchase
Order form.
18
Rev. 1.0
Si4825-A10
10. Additional Reference Resources
Contact your local sales representatives for more information or to obtain copies of the following references:
AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines
AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure
Si4825-DEMO Board User’s Guide
Rev. 1.0
19
Si4825-A10
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.8
Updated Table 1, “Recommended Operating
Conditions”
Updated Table 2, "DC Characteristics"
Updated Table 4, "FM Receiver Characteristics"
Updated Table 5, "AM/SW Receiver Characteristics"
Updated Section "4.3. AM Receiver"
Updated Section "10. Additional Reference
Resources"
Section 5 "Pin Descriptions: Si4825-A10"
Revision 0.8 to Revision 1.0
Updated Table 3. "Reset Timing Characteristics"
Inserted Section 4.8. "Reset, Powerup, and
Powerdown"
20
Rev. 1.0
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Disclaimer
Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers
using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific
device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein are for illustrative purposes only. Silicon Laboratories
reserves the right to make changes without further notice and limitation to product information, specifications, and descriptions herein, and does not give warranties as to the accuracy
or completeness of the included information. Silicon Laboratories shall have no liability for the consequences of use of the information supplied herein. This document does not imply
or express copyright licenses granted hereunder to design or fabricate any integrated circuits. The products must not be used within any Life Support System without the specific
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相关型号：
SI4825DDY-T1-GE3
Small Signal Field-Effect Transistor, 10.9A I(D), 30V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HALOGEN FREE AND ROHS COMPLIANT, SOP-8
VISHAY
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