TSM6025AEURT [SILICON]
A 2.5V, Low-Power/Low-Dropout Precision Voltage Reference;型号: | TSM6025AEURT |
厂家: | SILICON |
描述: | A 2.5V, Low-Power/Low-Dropout Precision Voltage Reference |
文件: | 总10页 (文件大小:1219K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TSM6025
A +2.5V, Low-Power/Low-Dropout Precision Voltage Reference
FEATURES
DESCRIPTION
Alternate Source for MAX6025
Initial Accuracy:
The TSM6025 is a 3-terminal, series-mode 2.5-V
precision voltage reference and is a pin-for-pin,
alternate source for the MAX6025 voltage reference.
Like the MAX6025, the TSM6025 consumes only
27μA of supply current at no-load, exhibits an initial
output voltage accuracy of less than 0.2%, and a low
output voltage temperature coefficient of 15ppm/°C.
In addition, the TSM6025’s output stage is stable for
all capacitive loads to 2200pF and is capable of
sinking and sourcing load currents up to 500μA.
0.2% (max) – TSM6025A
0.4% (max) – TSM6025B
Temperature Coefficient:
15ppm/°C (max) – TSM6025A
25ppm/°C (max) – TSM6025B
Quiescent Supply Current: 35μA (max)
Low Supply Current Change with VIN: <1μA/V
Output Source/Sink Current: ±500μA
Low Dropout at 500μA Load Current: 100mV
Load Regulation: 0.14μV/μA
Line Regulation : 25μV/V
Since the TSM6025 is a series-mode voltage
reference, its supply current is not affected by
changes in the applied supply voltage unlike two-
terminal shunt-mode references that require an
external resistor. The TSM6025’s small form factor
and low supply current operation combine to make it
an ideal choice in low-power, precision applications.
Stable with CLOAD up to 2200pF
APPLICATIONS
Industrial and Process-Control Systems
Hard-Disk Drives
Battery-Operated Equipment
Data Acquisition Systems
Hand-Held Equipment
The TSM6025 is fully specified over the -40°C to
+85°C temperature range and is available in a 3-pin
SOT23 package.
Precision 3V/5V Systems
Smart Industrial Transmitters
TYPICAL APPLICATION CIRCUIT
Output Voltage Temperature Drift
2.5035
2.5025
2.5015
2.5005
2.4995
2.4985
-40
-15
35
60
85
10
TEMPERATURE DRIFT- °C
Page 1
© 2014 Silicon Laboratories, Inc. All rights reserved.
TSM6025
ABSOLUTE MAXIMUM RATINGS
IN to GND.................................................................-0.3V to +13.5V
OUT to GND.................................................................... -0.3V to 7V
Short Circuit to GND or IN (VIN < 6V)..............................Continuous
Output Short Circuit to GND or IN (VIN ≥ 6V) .............................. 60s
Continuous Power Dissipation (TA = +70°C)
Operating Temperature Range................................. -40°C to +85°C
Storage Temperature Range.................................. -65°C to +150°C
Lead Temperature (Soldering, 10s)...................................... +300°C
3-Pin SOT23 (Derate at 4.0mW/°C above +70°C)..........320mW
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and
lifetime.
PACKAGE/ORDERING INFORMATION
PART
MARKING
ORDER NUMBER
TSM6025AEUR+
TSM6025AEUR+T
TSM6025BEUR+
TSM6025BEUR+T
CARRIER QUANTITY
Tape
-----
& Reel
ACX
Tape
3000
& Reel
Tape
-----
& Reel
ACY
Tape
3000
& Reel
Lead-free Program: Silicon Labs supplies only lead-free packaging.
Consult Silicon Labs for products specified with wider operating temperature ranges.
Page 2
TSM6025 Rev. 1.0
TSM6025
ELECTRICAL CHARACTERISTICS
VIN = +5V, IOUT = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. See Note 1.
PARAMETER
OUTPUT
SYMBOL CONDITIONS
MIN
TYP
2.500
2.500
MAX
UNITS
2.495
-0.20
2.490
-0.40
2.505
0.20
2.510
0.40
15
20
25
30
V
%
V
TSM6025A
TSM6025B
TSM6025A
TSM6025B
Output Voltage
VOUT
TA = +25°C
%
TA = 0°C to +70°C
TA = -40°C to +85°C
TA = 0°C to +70°C
TA = -40°C to +85°C
6
6
6
6
Output Voltage Temperature
Coefficient (See Note 2)
VOUT
ppm/°C
∆VOUT
∆VIN
∆VOUT
∆IOUT
/
/
Line Regulation
(VOUT + 0.2V) ≤ VIN ≤ 12.6V
140
μV/V
Sourcing: 0 ≤ IOUT ≤ 500μA
Sinking: -500μA ≤ IOUT ≤ 0
0.14
0.18
0.60
0.80
Load Regulation
μV/μA
mV
Dropout Voltage (See Note 5)
OUT Short-Circuit Current
VIN -VOUT IOUT = 500μA
100
200
VOUT Short to GND
VOUT Short to IN
4
4
ISC
mA
Temperature Hysteresis
(See Note 3)
130
50
ppm
∆VOUT
time
/
/
ppm/
1000hr
Long-Term Stability
DYNAMIC
1000hr at TA = +25°C
f = 0.1Hz to 10Hz
f = 10Hz to 10kHz
50
125
μVP-P
μVRMS
Noise Voltage
eOUT
∆VOUT
∆VIN
COUT
Ripple Rejection
V
IN = 5V ±100mV, f = 120Hz
82
dB
nF
Capacitive-Load Stability Range
INPUT
See Note 4
0
2.2
Supply Voltage Range
Quiescent Supply Current
Change in Supply Current
VIN
IIN
IIN/VIN
Guaranteed by line-regulation test
VOUT + 0.2
12.6
35
2.0
V
μA
μA/V
27
(VOUT + 0.2V) ≤ VIN ≤ 12.6V
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.
Note 2: Temperature Coefficient is measured by the “box” method; i.e., the maximum ∆VOUT is divided by the maximum ∆T.
Note 3: Temperature hysteresis is defined as the change in the +25°C output voltage before and after cycling the device from TMIN to TMAX
Note 4: Not production tested; guaranteed by design.
.
Note 5: Dropout voltage is the minimum input voltage at which VOUT changes ≤0.2% from VOUT at VIN = 5.0V.
TSM6025 Rev. 1.0
Page 3
TSM6025
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted.
Output Voltage Temperature Drift
Long-Term Output Voltage Drift
2.5035
2.502
2.501
2.500
2.499
2.498
THREE TYPICAL DEVICES
DEVICE A
THREE TYPICAL DEVICES
2.5025
2.5015
2.5005
2.4995
2.4985
DEVICE #1
DEVICE #2
DEVICE B
DEVICE C
DEVICE #3
250
500
750
1000
-40
-15
10
35
60
85
0
TIME - Hours
TEMPERATURE DRIFT- °C
Line Regulation – ΔVOUT/ΔVIN
Dropout Voltage vs Source Current
300
200
100
0
0.4
0.3
0.2
0.1
0
TA = -40°C
TA = +25°C
TA = +85°C
TA = +25°C
TA = +85°C
TA = -40°C
-100
2
0
1000
4
6
8
10
12
14
200
400
600
800
SUPPLY VOLTAGE - Volt
SOURCE CURRENT- µA
Load Regulation – ΔVOUT/ΔILOAD
Power Supply Rejection vs Frequency
0.4
0.2
0
100
10
1
VCC =+5.5V±0.25V
TA = -40°C
TA = +85°C
TA = +25°C
-0.2
0.1
-0.4
0.01
-500
-250
0
250
500
100
1k
10k
100k
1M
LOAD CURRENT- µA
FREQUENCY - Hz
Page 4
TSM6025 Rev. 1.0
TSM6025
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted.
Supply Current vs Input Voltage
Supply Current vs Temperature
40
36
32
28
24
20
40
35
30
25
20
VCC =+12.5V
VCC =+7.5V
VCC = +2.5V, +5.5V
4
6
8
10
12
10
TEMPERATURE - °C
2
14
-40
-15
35
60
85
INPUT VOLTAGE - Volt
Output Impedance vs Frequency
0.1Hz to 10Hz Output Noise
10k
1k
100
10
46µVpp
1
0.1
100
10k
1M
0.1
1
FREQUENCY - Hz
1s/DIV
Power-On Transient Response
Small-signal Load Transient Response
IOUT = 0µA → 50µA → 0µA
200µs/DIV
10µs/DIV
TSM6025 Rev. 1.0
Page 5
TSM6025
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = +5V; IOUT = 0mA; TA = +25°C, unless otherwise noted.
Large-signal Load Transient Response
Line Transient Response
IOUT = 0mA → 1mA → 0mA
VIN =5V±0.25V, AC-Coupled
10µs/DIV
2µs/DIV
Page 6
TSM6025 Rev. 1.0
TSM6025
PIN FUNCTIONS
PIN
1
NAME FUNCTION
IN
Supply Voltage Input
2
3
OUT
GND
+2.5V Output
Ground
DESCRIPTION/THEORY OF OPERATION
The TSM6025 incorporates a precision 1.25-V
bandgap reference that is followed by a output
amplifier configured to amplify the base bandgap
output voltage to a 2.5-V output. The design of the
bandgap reference incorporates proprietary circuit
design techniques to achieve its low temperature
coefficient of 15ppm/°C and initial output voltage
accuracy less than 0.2%. The design of the output
amplifier’s frequency compensation does not require
a separate compensation capacitor and is stable
with capacitive loads up to 2200pF. The design of
the output amplifier also incorporates low headroom
design as it can source and sink load currents to
500μA with a dropout voltage less than 200mV.
APPLICATIONS INFORMATION
Power Supply Input Capacitive Bypass
than 1μA/V. Since the TSM6025 is a series-mode
reference, load current is drawn from the supply
voltage only when required. In this case, circuit
efficiency is maintained at all applied supply
voltages. Reducing power dissipation and extending
battery life are the net benefits of improved circuit
efficiency.
As shown in the Typical Application Circuit, the VIN
pin of the TSM6025 should be bypassed to GND
with a 0.1uF ceramic capacitor for optimal line-
transient performance. Consistent with good analog
circuit engineering practice, the capacitor should be
placed in as close proximity to the TSM6025 as
practical with very short pcb track lengths.
On the other hand, an external resistor in series with
the supply voltage is required by two-terminal,
shunt-mode references. In this case, as the supply
voltage changes, so does the quiescent supply
current of the shunt reference. In addition, the
external resistor’s tolerance and temperature
coefficient contribute two additional factors that can
affect the circuit’s supply current. Therefore,
maximizing circuit efficiency with shunt-mode
references becomes an exercise involving three
variables. Additionally, shunt-mode references must
be biased at the maximum expected load current
even if the load current is not present at all times.
Output/Load Capacitance Considerations
As mentioned previously, the TSM6025 does not
require a separate, external capacitor at VOUT for
transient response stability as it is stable for
capacitive loads up to 2200pF. On the other hand
and for improved large-signal line and load
regulation, the use of a capacitor at VOUT will provide
a reservoir of charge in reserve to absorb large-
signal load or line transients. This in turn improves
the TSM6025’s VOUT settling time. If large load and
line transients are not expected in the application,
then the TSM6025 can be used without an external
capacitor at VOUT thereby reducing the overall circuit
footprint.
When the applied supply voltage is less than the
minimum specified input voltage of the TSM6025 (for
example, during the power-up transition), the
TSM6025 can draw up to 200μA above its nominal,
steady-state supply current. To ensure reliable
power-up behavior, the input power source must
have sufficient reserve power to provide the extra
supply current drawn during the power-up transition.
Supply Current
The TSM6025 exhibits excellent dc line regulation
as its supply current changes slightly as the applied
supply voltage is increased. While its supply current
is 35μA maximum, the change in its supply current
as a function of supply voltage (its ∆IIN/∆VIN) is less
TSM6025 Rev. 1.0
Page 7
TSM6025
Output Voltage Hysteresis
combined turn-on and settling time to within 0.1% of
its 2.5V final value is approximately 340μs.
Reference output voltage thermal hysteresis is the
change in the reference’s +25°C output voltage after
temperature cycling from +85°C to +25°C and from -
40°C to +25°C. Thermal hysteresis is caused by
differential package stress impressed upon the
TSM6025’s internal bandgap core transistors and
depends on whether the reference IC was previously
at a higher or lower temperature. At 130ppm, the
TSM6025’s typical temperature hysteresis is equal
to 0.33mV with respect to a 2.5V output voltage.
A Positive and Negative Low-Power Voltage
Reference
The circuit in Figure 1 uses a CD4049 hex inverter
and a few external capacitors as the power supply to
a dual-supply precision op amp to form a ±2.5V
precision, bipolar output voltage reference around
the TSM6025. The CD4049-based circuit is a
discrete charge pump voltage doubler/inverter that
generates ±6V supplies for any industry-standard
OP-07 or equivalent precision op amp.
Voltage Reference Turn-On Time
With a (VIN – VOUT) voltage differential larger than
200mV and ILOAD = 0mA, the TSM6025’s typical
Figure 1: Positive and Negative 2.5V References from a Single +3V or +5V Supply
Page 8
TSM6025 Rev. 1.0
TSM6025
PACKAGE OUTLINE DRAWING
3-Pin SOT23 Package Outline Drawing
(N.B., Drawings are not to scale)
Patent Notice
Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size,
analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class
engineering team.
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Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the
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parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty,
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