SP320 [SIPEX]

Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines; 完整的+ 5V ,只有V.35接口与RS - 232 ( V.28 )控制线
SP320
型号: SP320
厂家: SIPEX CORPORATION    SIPEX CORPORATION
描述:

Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines
完整的+ 5V ,只有V.35接口与RS - 232 ( V.28 )控制线

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®
SP320  
Complete +5V-Only V.35 Interface  
with RS-232 (V.28) Control Lines  
10Mbps Data Throughput  
+5V-Only, Single Supply Operation  
3 Drivers, 3 Receivers – V.35  
4 Drivers, 4 Receivers – RS-232  
80-pin MQFP Surface Mount Packaging  
Pin Compatible with SP319  
DESCRIPTION  
TheSP320isacompleteV.35interfacetransceiveroffering3driversand3receiversofV.35,and  
4 drivers and 4 receivers of RS-232 (V.28). A Sipex patented charge pump allows +5V only low  
power operation. RS-232 drivers and receivers are specified to operate at 120kbps, all V.35  
drivers and receivers operate up to 5Mbps.  
+5V  
25, 33, 41, 62, 73  
26  
C1+  
0.1µF  
VCC  
+
+
+
27  
32  
VDD  
VSS  
0.1µF  
30  
28  
C1-  
SP320  
0.1µF  
C2+  
+
0.1µF  
31  
C2-  
3
9
TS000  
+5V  
ENV35  
Vcc  
14 DRIN1  
61 DRA1  
400k  
RCA1 70  
RCOUT 1  
100Ω  
Vcc  
59 DRB1  
13 T1IN  
RCB1 71  
RCA2 37  
400kΩ  
58 T1OUT  
16 T2IN  
Vcc  
100Ω  
RCOUT2 20  
400kΩ  
RCB2 38  
R1IN 66  
54 T2OUT  
17 T3IN  
Vcc  
5kΩ  
R1OUT 80  
R2IN 68  
400kΩ  
47 T3OUT  
Vcc  
5kΩ  
R2OUT 78  
R3IN 35  
24 T4IN  
400kΩ  
51 T4OUT  
Vcc  
5kΩ  
5kΩ  
R3OUT 19  
R4IN 39  
22 DRIN2  
42 DRA2  
400kΩ  
44 DRB2  
23 STEN  
R4OUT 21  
RCA3 76  
Vcc  
15 DRIN3  
63 DRA3  
400kΩ  
100Ω  
RCOUT3 79  
65 DRB3  
6 TTEN  
RTEN 7  
RCB3 77  
29, 34, 43, 60, 64, 72  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
1
ABSOLUTE MAXIMUM RATINGS  
These are stress ratings only and functional operation of the device at  
these ratings or any other above those indicated in the operation  
sections of the specifications below is not implied. Exposure to absolute  
maximum rating conditions for extended periods of time may affect  
reliability.  
VCC.....................................................................................................+7V  
Input Voltages  
Logic........................................................-0.3Vto(VCC+0.5V)  
Drivers..................................................-0.3Vto(VCC+0.5V)  
Receivers..................................................±30Vat 100mA  
Output Voltages  
Logic........................................................-0.3Vto(VCC+0.5V)  
Drivers.......................................................................±14V  
Receivers..............................................-0.3Vto(VCC+0.5V)  
StorageTemperature.......................................................-65˚Cto+150˚C  
PowerDissipation..........................................................................1500mW  
Package Derating  
Ø
Ø
JC.......................................................................16 •C/W  
JA.......................................................................46 •C/W  
SPECIFICATIONS  
TMIN to TMAX and VCC = 5V±5% unless otherwise noted.  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNITS CONDITIONS  
V.35 DRIVER  
TTL Input Levels  
VIL  
VIH  
0.8  
Volts  
Volts  
2.0  
Voltage Outputs  
Differential Outputs  
Source Impedance  
Short Circuit Impedance  
±0.44  
50  
135  
±0.55  
100  
150  
±0.66  
150  
165  
Volts  
Ohms  
Ohms  
RL=100from A to B  
Measured from A=B to Gnd,  
VOUT=-2V to +2V  
Voltage Output Offset  
-0.6  
+0.6  
Volts  
VOffset={[|VA|+|VB|]/2}  
AC Characteristics  
Transition Time  
Maximum Transmission Rate  
Propagation Delay  
tPHL  
40  
ns  
Mbps  
Rise/fall time, 10% to 90%  
RL=100, VDIFF OUT= 0.55V±20%  
5
150  
150  
250  
250  
ns  
ns  
Measured from 1.5V of VIN  
to 50% of VOUT  
Measured from 1.5V of VIN  
to 50% of VOUT  
tPLH  
V.35 RECEIVER  
TTL Output Levels  
VOL  
0.4  
Volts  
Volts  
IOUT=-3.2mA  
IOUT=1.0mA  
VOH  
2.4  
Receiver Inputs  
Differential Input  
Threshold  
Input Impedance  
Short Circuit Impedance  
-0.3  
90  
135  
+0.3  
110  
165  
Volts  
Ohms  
Ohms  
100  
150  
Measured from A=B to Gnd  
VIN=-2V to +2V  
AC Characteristics  
Maximum Transmission Rate  
Propagation Delay  
tPHL  
5
Mbps  
ns  
VIN = ±0.55V ±20%  
150  
150  
250  
250  
Measured from 50% of VIN to  
1.5V of ROUT  
Measured from 50% of VIN to  
1.5V of ROUT  
tPLH  
ns  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
2
SPECIFICATIONS (CONTINUED)  
TMIN to TMAX and VCC = 5V±5% unless otherwise noted.  
PARAMETER  
RS-232 DRIVER  
TTL Input Levels  
VIL  
MIN.  
TYP.  
MAX.  
UNITS  
CONDITIONS  
0.8  
Volts  
Volts  
VIH  
2.0  
Voltage Outputs  
High Level Output  
Low Level Output  
Open Circuit Output  
Short Circuit Current  
Power Off Impedance  
+5.0  
-15.0  
-15  
-100  
300  
+15.0  
-5.0  
+15  
Volts  
Volts  
Volts  
mA  
R = 3kto Gnd  
RL= 3kto Gnd  
RL= ∞  
+100  
RLL= Gnd  
Ohms  
VCC= 0V; VOUT= ±2V  
AC Characteristics  
Slew Rate  
30  
V/µs  
kbps  
µs  
RL= 3k, CL= 50pF; From +3V to -3V  
or -3V to +3V, T = 25˚C, VCC = +5V  
RL= 3k, CL= 2A500pF  
Maximum Transmission Rate 120  
Transition Time  
1.56  
Rise/fall time, between ±3V  
RL= 3k, CL= 2500pF  
Propagation Delay  
tPHL  
2
2
8
8
µs  
µs  
RL= 3k, CL= 2500pF; From 1.5V  
of T to 50% of VOUT  
tPLH  
RL=IN3k, CL= 2500pF; From 1.5V  
of TIN to 50% of VOUT  
RS-232 RECEIVER  
TTL Output Levels  
VOL  
0.4  
Volts  
Volts  
VOH  
2.4  
-15  
Receiver Input  
Input Voltage Range  
High Threshold  
Low Threshold  
Hysteresis  
Receiver Input Circuit Bias  
Input Impedance  
AC Characteristics  
+15  
3.0  
Volts  
Volts  
Volts  
Volts  
Volts  
kOhms  
1.7  
1.2  
0.5  
0.8  
0.2  
1
+2.0  
7
VCC= 5V; TA= +25˚C  
3
5
VIN= ±15V  
Maximum Transmission Rate 120  
kbps  
Propagation Delay  
tPHL  
tPLH  
0.1  
0.1  
1
1
µs  
µs  
From 50% of RIN to 1.5V of ROUT  
From 50% of RIN to 1.5V of ROUT  
POWER REQUIREMENTS  
No Load VCC Supply Current  
Full Load VCC Supply Current  
35  
60  
70  
mA  
mA  
No load; V = 5.0V; TA= 25˚C  
RS-232 driCvCers RL= 3kto Gnd;  
DC Input  
V.35 drivers RL= 100from A to B;  
DC Input  
TS000 = ENV35 = 0V  
Shutdown Current  
1.5  
mA  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
3
All of the V.35 receivers can operate at data  
rates as high as 5Mbps. The sensitivity of the  
V.35 receiver inputs is ±300mV.  
THEORY OF OPERATION  
The SP320 is a single chip +5V-only serial  
transceiver that supports all the signals neces-  
sary to implement a full V.35 interface. Three  
V.35 drivers and three V.35 receivers make up  
the clock and data signals. Four RS-232 (V.28)  
drivers and four RS-232 (V.28) receivers are  
used for control line signals for the interface.  
RS-232 (V.28) Drivers  
The RS-232 drivers are inverting transmitters,  
which accept either TTL or CMOS inputs and  
outputtheRS-232signalswithaninvertedsense  
relative to the input logic levels. Typically, the  
RS-232 output voltage swing is ±9V with no  
load, and ±5V minimum with full load. The  
transmitteroutputsareprotectedagainstinfinite  
short-circuits to ground without degradation in  
reliability.  
V.35 Drivers  
The V.35 drivers are +5V-only, low power  
voltage output transmitters. The drivers do not  
require any external resistor networks, and will  
meet the following requirements:  
In the power off state, the output impedance of  
the RS-232 drivers will be greater than 300  
over a ±2V range. Should the input of a driver be  
left open, an internal 400kpullup resistor to  
1. Source impedance in the range of 50to  
150.  
2. Resistance between short-circuited terminals  
and ground is 150±15.  
V
CC forces the input high, thus committing the  
output to a low state. The slew rate of the  
transmitter output is internally limited to a  
maximum of 30V/µs in order to meet the EIA  
standards. The RS-232 drivers are rated for  
120kbps data rates.  
3. When terminated with a 100resistive load  
the terminal to terminal voltage will be 0.55  
Volts ±20% so that the A terminal is positive to  
the B terminal when binary 0 is transmitted, and  
the conditions are reversed to transmit binary 1.  
RS-232 (V.28) Receivers  
The RS-232 receivers convert RS-232 input  
signals to inverted TTL signals. Each of the four  
receivers features 500mV of hysteresis margin  
to minimize the effects of noisy transmission  
lines. The inputs also have a 5kresistor to  
ground; in an open circuit situation the input of  
the receiver will be forced low, committing the  
output to a logic high state. The input resistance  
will maintain 3k-7kover a ±15V range.  
The maximum operating voltage range for the  
receiver is ±30V, under these conditions the  
input current to the receiver must be limited to  
less than 100mA. The RS-232 receivers can  
operate to beyond 120kbps.  
4. The arithmetic mean of the voltage of the A  
terminal with respect to ground, and the B  
terminal with respect to ground will not exceed  
0.6 Volts when terminated as in 3 above.  
The V.35 drivers can operate at data rates as  
high as 5Mbps. The driver outputs are protected  
against short-circuits between the A and B  
outputs and short circuits to ground.  
Two of the V.35 drivers, DRIN2 and DRIN3 are  
equipped with enable control lines. When the  
enable pins are high the driver outputs are  
disabled, the output impedance of a disabled  
driverwillnominallybe300. Whentheenable  
pins are low, the drivers are active.  
CHARGE PUMP  
The charge pump is a Sipex patented design  
(U.S. 5,306,954) and uses a unique approach  
compared to older less-efficient designs. The  
charge pump still requires four external  
capacitors, but uses a four-phase voltage  
shifting technique to attain symmetrical ±10V  
power supplies. The capacitors can be as low  
as 0.1µF with a 16 Volt rating. Polarized or  
non-polarized capacitors can be used.  
V.35 Receivers  
The V.35 receivers are +5V only, low power  
differential receivers which meet the following  
requirements:  
1. Input impedance in the range of 100±10.  
2. Resistance to ground of 150±15,  
measured from short-circuited terminals.  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
4
Phase 4  
-Vdd transfer- The fourth phase of the clock  
connects the negative terminal of C2 to ground  
and transfers the generated +10V across C2 to  
C4, the Vdd storage capacitor. Again, simulta-  
neously with this, the positive side of capacitor  
C1 is switched to +5V and the negative side is  
connectedtoground, andthecyclebeginsagain.  
+10V  
+
a) C2  
GND  
GND  
b) C2  
Since both V+ and V- are separately generated  
from Vcc in a no load condition, V+and V- will  
be symmetrical. Older charge pump approaches  
that generate V- from V+ will show a decrease  
in the magnitude of V- compared to V+ due to  
the inherent inefficiencies in the design.  
–10V  
Figure 1. Charge Pump Waveforms  
The clock rate for the charge pump typically  
operates at 15kHz. The external capacitors must  
be 0.1µF with a 16V breakdown rating.  
Figure 1a shows the waveform found on the  
positive side of capacitor C2, and Figure 1b  
shows the negative side of capacitor C2. There  
is a free-running oscillator that controls the four  
phases of the voltage shifting. A description of  
each phase follows.  
Shutdown Mode  
The SP320 can be put into a low power  
shutdown mode by bringing both TS000 (pin 3)  
and ENV35 (pin 9) low. In shutdown mode, the  
SP320 will draw less than 2mA of supply  
current. For normal operation, both pins should  
be connected to +5V.  
Phase 1  
-Vss charge storage- During this phase of the  
clock cycle, the positive side of capactors C1  
and C2 are initially charged to +5V. C1+ is then  
switched to ground and the charge in C1- is  
transferred to C2-. Since C2+ is connected to  
+5V, thevoltagepotentialacrosscapacitorC2is  
now 10V.  
External Power Supplies  
For applications that do not require +5V only,  
external supplies can be applied at the V+ and  
V- pins. The value of the external supply  
voltages must be no greater than ±10V. The  
current drain from the ±10V supplies is used for  
the RS-232 drivers. For the RS-232 driver the  
current requirement will be 3.5mA per driver.  
It is critical the external power supplies provide  
a power supply sequence of : +10V, +5V, and  
then -10V.  
Phase 2  
-Vss transfer- Phase two of the clock connects  
the negative terminal of C2 to the Vss storage  
capacitor and the positive terminal of C2 to  
ground, and transfers the generated -10V to C3.  
Simultaneously, the positive side of capacitor  
C1 is switched to +5V and the negative side is  
connected to ground.  
Applications Information  
The SP320 is a single chip device that can  
implement a complete V.35 interface. Three (3)  
V.35 drivers and three (3) V.35 receivers are  
used for clock and data signals and four (4)  
RS-232 (V.28) drivers and four (4) RS-232  
(V.28) receivers can be used for the control  
signalsoftheinterface. Thefollowingexamples  
show the SP320 configured in either a DTE or  
DCE application.  
Phase 3  
-Vdd charge storage- The third phase of the  
clock is identical to the first phase- the trans-  
ferredchargeinC1produces-5Vinthenegative  
terminal of C1, which is applied to the negative  
side of capacitor C2. Since C2+ is at +5V, the  
voltage potential across C2 is +10V.  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
5
V
= +5V  
V
= +5V  
CC  
CC  
C
+
+10V  
C
4
+
4
+5V  
+
V
V
Storage Capacitor  
Storage Capacitor  
+
V
V
Storage Capacitor  
Storage Capacitor  
DD  
DD  
+
+
+
+
C
C
2
C
C
2
1
1
SS  
SS  
C
C
3
–5V  
–5V  
3
Figure 2. Charge Pump Phase 1  
Figure 3. Charge Pump Phase 2  
V
= +5V  
CC  
V
= +5V  
CC  
C
+
4
C
+
+5V  
4
+
V
V
Storage Capacitor  
Storage Capacitor  
DD  
+
V
V
Storage Capacitor  
Storage Capacitor  
+
+
DD  
+
+
C
C
2
1
C
C
2
1
SS  
SS  
C
–10V  
3
C
–5V  
–5V  
3
Figure 4. Charge Pump Phase 3  
Figure 5. Charge Pump Phase 4  
50Ω  
50Ω  
1µF  
1µF  
1µF  
1µF  
125Ω  
=
VCC1  
5V  
VCC2  
5V  
T
V.35  
V.35  
1µF  
1µF  
TXD (103)  
P
P
DX  
RX  
RX  
T
T
T
T
T
T
S
S
U
SCTE (113)  
TXC (114)  
RXC (115)  
TXD (104)  
U
DX  
RX  
RX  
RX  
T
W
W
AA  
AA  
DX  
T
T
T
Y
X
Y
X
DX  
DX  
V
T
V
T
R
R
GND (102)  
B
A
B
A
CABLE SHIELD  
VCC1  
VCC2  
1µF  
1µF  
1µF  
1µF  
1µF  
1µF  
1µF  
1µF  
RS-232  
RS-232  
DTR (108)  
RTS (105)  
DSR (107)  
CTS (106)  
DCD (109)  
TM (142)  
H
C
H
C
DX  
DX  
RX  
RX  
RX  
RX  
DX  
RX  
RX  
DX  
DX  
DX  
DX  
RX  
E
E
D
D
F
F
NN  
N
NN  
N
RDL (140)  
LLB (141)  
L
L
DX  
RX  
ISO 2593  
34-PIN DTE/DCE  
INTERFACE  
ISO 2593  
34-PIN DTE/DCE  
INTERFACE  
CONNECTOR  
CONNECTOR  
Figure 6. A Competitor’s Typical V.35 Solution Using Six Components.  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
6
+5V  
+5V  
1N5819  
0.1µF  
1N5819  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
26  
VDD  
25  
VCC  
27  
30  
C1-  
VSS  
28  
C2+  
31  
C2-  
31  
C2-  
25  
VCC  
27  
VDD  
28  
C2+  
26 30  
C1+ C1-  
VSS  
0.1µF  
0.1µF  
C1+  
32  
32  
SP320CF  
SP320CF  
TxD (103)  
TxC (113)  
P
S
P
S
RCOUT  
1
DRIN  
1
14  
14  
U
U
RCOUT  
2
DRIN  
3
W
W
20  
15  
A
A
RCOUT  
3
DRIN  
2
79  
22  
TxCC (114)  
RxC (115)  
RxD (104)  
Y
Y
RCOUT  
3
DRIN  
2
AA  
AA  
22  
79  
X
V
X
V
RCOUT  
2
DRIN  
3
20  
15  
T
T
RCOUT  
1
DRIN  
1
R
R
1
14  
DTR (108)  
RTS (105)  
H
C
H
C
T2IN  
R2OUT  
16  
78  
R1OUT  
80  
T1IN  
13  
RL (140)  
LL (141)  
T3IN  
17  
N
N
L
R4OUT  
21  
T4IN  
24  
L
R3OUT  
19  
DSR (107)  
CTS (106)  
E
E
T2IN  
16  
R2OUT  
78  
D
D
T1IN  
13  
R1OUT  
80  
DCD (109)  
TM (142)  
F
T3IN  
17  
F
R3OUT  
19  
NN  
NN  
T4IN  
24  
R4OUT  
21  
B
B
ISO2593  
ISO2593  
29, 34, 43, 60, 64, 72  
29, 34, 43, 60, 64, 72  
34-PIN DTE/DCE  
34-PIN DTE/DCE  
INTERFACE CONNECTOR  
INTERFACE CONNECTOR  
Figure 7. Typical DTE-DCE V.35 Connection with the SP320  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
7
ISO-2593 connector pin out  
A
C
E
H
K
M
P
S
U
W
Y
AA  
CC  
EE  
HH  
KK  
MM  
Chasis Ground  
Request to Send  
DCE Ready (DSR)  
DTE Ready (DTR)  
Unassigned---  
Signal Ground  
Clear to Send  
Data Carrier Detect  
Ring Indicator  
B
D
F
J
L
N
R
T
V
Local Loopback  
Remote Loopback  
Receive Data (A)  
Receive Data (B)  
Receive Timing (A)  
Receive Timing (B)  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Test Mode  
Unassigned---  
Transmitted Data (A)  
Transmitted Data (B)  
Terminal Timing (A) } 113(A)  
Terminal Timing (B) } 113(B)  
Transmit Timing (A) } 114(A)  
Transmit Timing (B) } 114(B)  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
X
Z
BB  
DD  
FF  
JJ  
LL  
NN  
Typical DCE V.35 interface  
+5V  
25, 33, 41, 62, 73  
26  
C1+  
0.1µF  
VCC  
+
+
+
27  
32  
0.1µF  
VDD  
VSS  
30  
28  
C1-  
C2+  
0.1µF  
SP320  
+
0.1µF  
31  
C2-  
3
9
TS000  
ENV35  
+5V  
Vcc  
14 DRIN1  
RXD  
400K  
RCA1 70  
RCOUT 1  
103(A)  
61 DRA1  
59 DRB1  
13 T1IN  
104(A)  
100Ω  
Vcc  
TXD  
104(B)  
CTS  
RCB1 71  
RCA2 37  
400kΩ  
103(B)  
113(A)  
58 T1OUT  
16 T2IN  
106  
Vcc  
100Ω  
RCOUT2 20  
TXC  
DSR  
DCD  
400kΩ  
RCB2 38  
R1IN 66  
113(B)  
105  
54 T2OUT  
17 T3IN  
107  
Vcc  
5kΩ  
RTS  
DTR  
R1OUT 80  
R2IN 68  
400kΩ  
108  
47 T3OUT  
109  
125  
Vcc  
5kΩ  
R2OUT 78  
R3IN 35  
24 T4IN  
RI  
400kΩ  
140  
141  
51 T4OUT  
Vcc  
5kΩ  
RLPBK  
LLPBK  
R3OUT 19  
R4IN 39  
TXCC  
22 DRIN2  
42 DRA2  
400kΩ  
114(A)  
114(B)  
44 DRB2  
23 STEN  
5kΩ  
R4OUT 21  
RCA3 76  
Vcc  
SPARE  
SPARE  
15 DRIN3  
RXC  
400kΩ  
100Ω  
RCOUT3 79  
SPARE  
63 DRA3  
65 DRB3  
6 TTEN  
115(A)  
115(B)  
RTEN 7  
RCB3 77  
29, 34, 43, 60, 64, 72  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
8
ISO-2593 connector pin out  
A
C
E
H
K
M
P
S
U
W
Y
AA  
CC  
EE  
HH  
KK  
MM  
Chasis Ground  
Request to Send  
DCE Ready (DSR)  
DTE Ready (DTR)  
Unassigned---  
Signal Ground  
Clear to Send  
Data Carrier Detect  
Ring Indicator  
B
D
F
J
L
N
R
T
V
Local Loopback  
Remote Loopback  
Receive Data (A)  
Receive Data (B)  
Receive Timing (A)  
Receive Timing (B)  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Test Mode  
Unassigned---  
Transmitted Data (A)  
Transmitted Data (B)  
Terminal Timing (A) } 113(A)  
Terminal Timing (B) } 113(B)  
Transmit Timing (A) } 114(A)  
Transmit Timing (B) } 114(B)  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
Unassigned---  
X
Z
BB  
DD  
FF  
JJ  
LL  
NN  
Typical DTE V.35 interface  
+5V  
25, 33, 41, 62, 73  
26  
C1+  
0.1µF  
VCC  
+
+
27  
32  
+
0.1µF  
VDD  
VSS  
30  
28  
C1-  
C2+  
0.1µF  
SP320  
+
0.1µF  
31  
C2-  
3
9
TS000  
ENV35  
+5V  
Vcc  
14 DRIN1  
TXD  
400k  
104(A)  
RCA1 70  
RCOUT 1  
61 DRA1  
59 DRB1  
13 T1IN  
103(A)  
103(B)  
100Ω  
RXD  
Vcc  
104(B)  
114(A)  
RCB1 71  
RCA2 37  
400kΩ  
RTS  
58 T1OUT  
16 T2IN  
Vcc  
105  
108  
140  
100Ω  
TXCC  
RCOUT2 20  
DTR  
400kΩ  
114(B)  
106  
RCB2 38  
R1IN 66  
54 T2OUT  
17 T3IN  
Vcc  
5kΩ  
RLPBK  
CTS  
DSR  
R1OUT 80  
R2IN 68  
400kΩ  
107  
109  
47 T3OUT  
Vcc  
5kΩ  
R2OUT 78  
R3IN 35  
24 T4IN  
LLPBK  
TXCT  
400kΩ  
51 T4OUT  
141  
Vcc  
5kΩ  
DCD  
R3OUT 19  
R4IN 39  
22 DRIN2  
42 DRA2  
400kΩ  
125  
113(A)  
113(B)  
44 DRB2  
23 STEN  
5kΩ  
RI  
R4OUT 21  
RCA3 76  
Vcc  
115(A)  
15 DRIN3  
SPARE  
400kΩ  
100Ω  
RXC  
RCOUT3 79  
63 DRA3  
65 DRB3  
6 TTEN  
SPARE  
SPARE  
RTEN 7  
RCB3 77  
115(B)  
29, 34, 43, 60, 64, 72  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
9
Pin configuration  
RCOUT1 1  
NC 2  
TS000 3  
NC 4  
60 GND  
59 DRB1  
58 T1OUT  
57 NC  
NC 5  
56 NC  
TTEN 6  
RTEN 7  
NC 8  
ENV35 9  
NC 10  
55 NC  
54 T2OUT  
53 NC  
52 NC  
51 T4OUT  
50 NC  
49 NC  
48 NC  
47 T3OUT  
46 NC  
45 NC  
SP320  
NC 11  
NC 12  
T1IN 13  
DRIN1 14  
DRIN3 15  
T2IN 16  
T3IN 17  
NC 18  
44 DRB2  
43 GND  
42 DRA2  
41 VCC  
R3OUT 19  
RCOUT2 20  
Typical application circuit  
+5V  
25, 33, 41, 62, 73  
26  
C1+  
0.1µF  
VCC  
+
+
+
27  
VDD  
0.1µF  
30  
28  
C1-  
32  
0.1µF  
SP320  
C2+  
VSS  
+
0.1µF  
31  
C2-  
3
9
TS000  
+5V  
ENV35  
Vcc  
14 DRIN1  
61 DRA1  
400k  
400kΩ  
400kΩ  
RCA1 70  
100Ω  
100Ω  
RCOUT 1  
Vcc  
Vcc  
Vcc  
59 DRB1  
13 T1IN  
RCB1 71  
RCA2 37  
58 T1OUT  
16 T2IN  
RCOUT2 20  
RCB2 38  
R1IN 66  
54 T2OUT  
17 T3IN  
5kΩ  
R1OUT 80  
R2IN 68  
400kΩ  
400kΩ  
47 T3OUT  
Vcc  
5kΩ  
5kΩ  
R2OUT 78  
R3IN 35  
24 T4IN  
51 T4OUT  
Vcc  
Vcc  
R3OUT 19  
R4IN 39  
22 DRIN2  
42 DRA2  
400kΩ  
5kΩ  
44 DRB2  
23 STEN  
R4OUT 21  
RCA3 76  
15 DRIN3  
63 DRA3  
400kΩ  
100Ω  
RCOUT3 79  
65 DRB3  
6 TTEN  
RTEN 7  
RCB3 77  
29, 34, 43, 60, 64, 72  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
10  
PACKAGE: 80 Pin MQFP  
D
D1  
D2  
0.30" RAD. TYP.  
PIN 1  
c
0.20" RAD. TYP.  
E1  
C
L
5°-16°  
E
E2  
0° MIN.  
0°–7°  
5°-16°  
C
L
L
L1  
A2  
A
Seating  
Plane  
A1  
b
e
80–PIN MQFP  
JEDEC MS-22  
(BEC) Variation  
DIMENSIONS  
Minimum/Maximum  
(mm)  
COMMON DIMENTIONS  
SYMBOL  
MIN  
NOM MAX  
2.45  
SYMBL MIN NOM MAX  
A
A1  
A2  
b
c
L
0.11  
23.00  
0.00  
1.80  
0.22  
0.25  
0.73 0.88 1.03  
1.60 BASIC  
2.00  
2.20  
0.40  
L1  
D
17.20 BSC  
14.00 BSC  
12.35 REF  
17.20 BSC  
14.00 BSC  
12.35 REF  
0.65 BSC  
80  
D1  
D2  
E
E1  
E2  
e
N
80 PIN MQFP (MS-022 BC)  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
11  
ORDERING INFORMATION  
Model  
Temperature Range  
Package Types  
SP320ACF ................................................... 0˚C to +70˚C ...................... 80-pin JEDEC (BE-2 Outline) MQFP  
Please consult the factory for pricing and availability on a Tape-On-Reel option.  
REVISION HISTORY  
DATE  
REVISION  
DESCRIPTION  
1/27/04  
A
Implemented tracking revision.  
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the  
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.  
Rev:A Date: 1/27/04  
SP320 Complete +5V-Only V.35 Interface with RS-232 (V.28) Control Lines  
© Copyright 2004 Sipex Corporation  
12  

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