SP3220E [SIPEX]
+3.0V to +5.5V RS-232 Driver/Receiver Pair; + 3.0V至+ 5.5V的RS - 232驱动器/接收器对
| 型号： | SP3220E |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | +3.0V to +5.5V RS-232 Driver/Receiver Pair |
| 文件： | 总18页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP3220E
+3.0V to +5.5V RS-232 Driver/Receiver Pair
■ Meets True RS-232 Protocol Operation
From A +3.0V to +5.5V Power Supply
■ Minimum 120 Kbps Data Rate Under
Full Load
■ 1µA Low-Power Shutdown With
Receivers Active
■ Interoperable With RS-232 Down To
+2.7V Power Source
■ Pin-Compatible With The
MAX3221E Device Without
®
The AUTO ON-LINE Feature
■ Enhanced ESD Specifications:
+15kV Human Body Model
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
DESCRIPTION
The SP3220E device is an RS-232 driver/receiver solution intended for portable or hand-held
applications such as notebook or palmtop computers. The SP3220E device has a high-
efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation.
This charge pump allows the SP3220E device to deliver true RS-232 performance from a
single power supply ranging from +3.3V to +5.0V. The ESD tolerance of the SP3220E device
is over +15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods.
The SP3220E device has a low-power shutdown mode where the driver outputs and charge
pumps are disabled. During shutdown, the supply current falls to less than 1µA.
VCC
+
+
15
CC
0.1µF
0.1µF
C5
C1
V
3
7
2
C1+
V+
V-
+
+
0.1µF
0.1µF
*C3
C4
4
5
C1-
C2+
SP3220E
+
C2
0.1µF
6
C2-
T1OUT
R1IN
LOGIC
13
8
11
T1IN
RS-232
INPUTS
OUTPUTS
R1OUT
EN
9
1
LOGIC
OUTPUTS
RS-232
INPUTS
5kΩ
SHDN 16
GND
14
*can be returned to
either VCC or GND
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
1
Input Voltages
TxIN, EN .............................................. -0.3V to +6.0V
RxIN ................................................................... +15V
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
Output Voltages
TxOUT ............................................................. +15.0V
RxOUT ................................................ -0.3V to +6.0V
Short-Circuit Duration
TxOUT ...................................................... Continuous
V
CC.............................................................-0.3Vto+6.0V
Storage Temperature ....................... -65°C to +150°C
V+(NOTE1)..............................................-0.3Vto+7.0V
V-(NOTE1).............................................+0.3Vto-7.0V
V++|V-| (NOTE1)...................................................+13V
Power Dissipation Per Package
16-pin SSOP (derate 9.69mW/oCabove+70oC) ........ 775mW
16-pin TSSOP (derate 10.5mW/oC above +70oC) ..... 840mW
16-pin Wide SOIC (derate 11.2mW/oC above+70oC) 900mW
ICC (DC VCC or GND current)..........................+100mA
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
SPECIFICATIONS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX
.
Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current
0.3
1.0
1.0
10
mA
no load, TAMB = +25oC, VCC = 3.3V
Shutdown Supply Current
µA
SHDN = GND, TAMB = +25oC, VCC = +3.3V
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW
0.8
V
V
TxIN, EN, SHDN, Note 2
Input Logic Threshold HIGH
2.0
2.4
VCC = 3.3V, Note 2
VCC = 5.0V, Note 2
TxIN, EN, SHDN, TAMB = +25oC
receivers disabled
IOUT = 1.6mA
Input Leakage Current
Output Leakage Current
Output Voltage LOW
Output Voltage HIGH
DRIVER OUTPUTS
Output Voltage Swing
±0.01
±0.05
±1.0
±10
0.4
µA
µA
V
VCC-0.6 VCC-0.1
V
IOUT = -1.0mA
±5.0
300
±5.4
V
3kΩ load to ground at all driver outputs,
T
AMB = +25oC
Output Resistance
Ω
V
V
CC = V+ = V- = 0V, TOUT = +2V
OUT = 0V
Output Short-Circuit Current
±35
±70
±60
±100
mA
mA
VOUT = +15V
Output Leakage Current
±25
µA
VOUT = +12V,VCC= 0V to 5.5V,drivers disabled
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
2
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX
.
Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
RECEIVER INPUTS
Input Voltage Range
Input Threshold LOW
-15
+15
V
V
0.6
0.8
1.2
1.5
VCC=3.3V
VCC=5.0V
Input Threshold HIGH
1.5
1.8
2.4
2.4
V
VCC=3.3V
VCC=5.0V
Input Hysteresis
0.3
5
V
Input Resistance
3
7
kΩ
TIMING CHARACTERISTICS
Maximum Data Rate
Driver Propagation Delay
120
235
kbps
RL=3kΩ, CL=1000pF, one driver switching
1.0
1.0
µs
µs
tPHL, RL = 3KΩ, CL = 1000pF
tPLH, RL = 3KΩ, CL = 1000pF
Receiver Propagation Delay
0.3
0.3
µs
tPHL, RxIN to RxOUT, CL=150pF
tPLH, RxIN to RxOUT, CL=150pF
Receiver Output Enable Time
Receiver Output Disable Time
Driver Skew
200
200
100
200
ns
ns
500
1000
30
ns
| tPHL - tPLH |, TAMB = 25oC
Receiver Skew
ns
| tPHL - tPLH |
Transition-Region Slew Rate
V/µs
VCC = 3.3V, RL = 3KΩ, TAMB = 25oC,
measurements taken from -3.0V to +3.0V
or +3.0V to -3.0V
NOTE 2: Driver input hysteresis is typically 250mV.
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
14
6
12
4
10
Vout+
Vout-
2
0
8
6
4
2
0
0
500
1000
1500
2000
-2
-4
-6
+Slew
-Slew
0
500
1000
1500
2000
2330
Load Capacitance [pF]
Load Capacitance [pF]
Figure 1. Transmitter Output Voltage VS. Load
Capacitance for the SP3220E
Figure 2. Slew Rate VS. Load Capacitance for the
SP3220E
50
118KHz
60KHz
45
10KHz
40
35
30
25
20
15
10
5
0
0
500
1000
1500
2000
2330
Load Capacitance [pF]
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3220E
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
4
NAME
FUNCTION
PIN NUMBER
Receiver Enable Control. Drive LOW for normal operation. Drive HIGH to Tri-
State the receiver outputs (high-Z state).
EN
1
C1+
V+
Positive terminal of the voltage doubler charge-pump capacitor.
+5.5V generated by the charge pump.
2
3
C1-
C2+
C2-
V-
Negative terminal of the voltage doubler charge-pump capacitor.
Positive terminal of the inverting charge-pump capacitor.
Negative terminal of the inverting charge-pump capacitor.
-5.5V generated by the charge pump.
4
5
6
7
R1IN
RS-232 receiver input.
8
R1OUT TTL/CMOS reciever output.
9
N.C.
T1IN
No Connect.
10, 12
11
13
14
15
TTL/CMOS driver input.
T1OUT RS-232 driver output.
GND
VCC
Ground.
+3.0V to +5.5V supply voltage
Shutdown Control Input. Drive HIGH for normal device operation. Drive LOW to
shutdown the drivers (high-Z output) and the on-board charge pump power
supply.
SHDN
16
Table 1. Device Pin Description
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
5
EN
16
15
14
13
12
11
1
2
3
4
5
6
7
SHDN
C1+
V+
V
CC
GND
SP3220E
C1-
T1OUT
C2+
C2-
V-
No Connect
T1IN
10
9
No Connect
R1OUT
R1IN
8
Figure 4. Pinout Configurations for the SP3220E
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
6
V
CC
+
+
15
CC
0.1µF
0.1µF
C5
C1
V
3
7
2
C1+
V+
V-
+
+
0.1µF
0.1µF
*C3
C4
4
5
C1-
C2+
SP3220E
+
C2
0.1µF
6
C2-
T1OUT
R1IN
13
8
LOGIC
11
T1IN
RS-232
INPUTS
OUTPUTS
R1OUT
EN
9
1
LOGIC
OUTPUTS
RS-232
INPUTS
5kΩ
16
SHDN
GND
14
*can be returned to
either VCC or GND
Figure 5. SP3220E Typical Operating Circuits
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
7
DESCRIPTION
The slew rate of the driver output is internally
limitedtoamaximumof30V/µsinordertomeet
the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded output
from HIGH to LOW also meets the monotonicity
requirements of the standard.
The SP3220E device meets the EIA/TIA-232
and V.28/V.24 communication protocols and
can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3220E
device features Sipex's proprietary on-board
charge pump circuitry that generates 2 x VCC for
RS-232 voltage levels from a single +3.0V to
+5.5V power supply. This series is ideal for
+3.3V-only systems, mixed +3.0V to +5.5V
systems, or +5.0V-onlysystemsthat require true
RS-232 performance. The SP3220E device has
a driver that operates at a typical data rate of
235Kbps fully loaded.
The SP3220E driver can maintain high data
ratesupto235Kbpsfullyloaded.Figure6shows
a loopback test circuit used to test the
RS-232 driver. Figure 7 shows the test results of
the loopback circuit with the driver active at
120Kbps with an RS-232 load in parallel with a
1000pFcapacitor.Figure8showsthetestresults
where the driver was active at 235Kbps and
loaded with an RS-232 receiver in parallel with
a 1000pF capacitor. A solid RS-232 data
transmission rate of 120Kbps provides
compatibility with many designs in personal
computer peripherals and LAN applications.
The SP3220E is a 1-driver/1-receiver device
ideal for portable or hand-held applications.
The SP3220E features a 1µA shutdown mode
that reduces power consumption and extends
battery life in portable systems. Its receivers
remain active in shutdown mode, allowing
external devices such as modems to be
monitored using only 1µA supply current.
The SP3220E driver's output stage is turned off
(high-Z) when the device is in shutdown mode.
When the power is off, the SP3220E device
permits the outputs to be driven up to+12V. The
driver's input does not have pull-up resistors.
Designers should connect an unused input
to VCC or GND.
THEORY OF OPERATION
The SP3220E device is made up of three basic
circuit blocks: 1. Drivers, 2. Receivers, and 3.
the Sipex proprietary charge pump.
In the shutdown mode, the supply current falls to
less than 1µA, where SHDN = LOW. When the
SP3220E device is shut down, the device's
driver output is disabled (high-Z) and the charge
pump is turned off with V+ pulled down to VCC
and V- pulled to GND. The time required to exit
shutdown is typically 100µs. Connect SHDN to
VCC iftheshutdownmodeisnotused. SHDNhas
no effect on RxOUT. Note that the driver is
enabled only when the magnitude of V- exceeds
approximately 3V.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to +5.0V
EIA/TIA-232 levels inverted relative to the
input logic levels. Typically, the RS-232 output
voltage swing is +5.5V with no load and at least
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
groundwithoutdegradationinreliability. Driver
outputs will meet EIA/TIA-562 levels of +3.7V
with supply voltages as low as 2.7V.
The drivers typically can operate at a data rate
of 235Kbps. The drivers can guarantee a data
rate of 120Kbps fully loaded with 3KΩ in
parallel with 1000pF, ensuring compatibility
with PC-to-PC communication software.
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
8
VCC
+
+
0.1µF
0.1µF
C5
C1
V
CC
C1+
V+
V-
+
+
C3
C4
0.1µF
0.1µF
C1-
SP3220E
C2+
+
C2
0.1µF
C2-
TxOUT
RxIN
TxIN
LOGIC
INPUTS
RxOUT
EN
LOGIC
OUTPUTS
5kΩ
VCC
*SHDN
GND
1000pF
Figure 6. SP3220E Driver Loopback Test Circuit
[
T
T
]
[
T
T
]
T1 IN
T1 IN
1
1
T1 OUT 2
T1 OUT 2
T
T
T
T
R1 OUT
3
R1 OUT
3
Ch2
5.00V
5.00V M 5.00µs Ch1
0V
Ch2
5.00V M 2.50µs Ch1
Ch1
5.00V
Ch1
0V
Ch3 5.00V
Ch3 5.00V
Figure 7. Driver Loopback Test Results at 120kbps
Figure 8. Driver Loopback Test Results at 235kbps
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
9
Receivers
In most circumstances, decoupling the power
supplycanbeachievedadequatelyusinga0.1µF
bypass capacitor at C5 (refer to Figures 5).
In applications that are sensitive to power-
supply noise, decouple VCC to ground with a
capacitor of the same value as charge-pump
capacitor C1. Physically connect bypass
capacitors as close to the IC as possible.
The receiver converts EIA/TIA-232 levels to
TTL or CMOS logic output levels. The receiver
has an inverting high-impedance output. This
receiver output (RxOUT) is at high-impedance
when the enable control EN = HIGH. In the
shutdown mode, the receiver can be active or
inactive. EN has no effect on TxOUT. The truth
table logic of the SP3220E driver and receiver
outputs can be found in Table 2.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Sincereceiverinputisusuallyfromatransmission
line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV.
This ensures that the receiver is virtually
immune to noisy transmission lines. Should an
input be left unconnected, a 5kΩ pulldown
resistor to ground will commit the output of the
receiver to a HIGH state.
Phase 1
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. Cl+ is then
switched to GND and the charge in C1– is
transferredtoC2 . SinceC2 isconnectedtoVCC,
the voltage potential across capacitor C2 is now
2 times VCC.
Charge Pump
The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage shifting
technique to attain symmetrical 5.5V power
supplies. The internal power supply consists of
a regulated dual charge pump that provides
output voltages 5.5V regardless of the input
voltage (VCC) over the +3.0V to +5.5V range.
–
+
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storagecapacitorandthepositiveterminalofC2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to GND.
SHDN
EN
0
TxOUT
Tri-state
Tri-state
Active
RxOUT
Active
0
0
1
1
Phase 3
1
Tri-state
Active
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
0
1
Active
Tri-state
+
side of capacitor C2. Since C2 is at VCC, the
Table 2. Truth Table Logic for Shutdown and
Enable Control
voltage potential across C2 is 2 times VCC.
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
10
Phase 4
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 14. This method will test the
IC’s capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled
frequently.
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
withthetransferofthevoltagetoC4, thepositive
side of capacitor C1 is switched to VCC and the
negative side is connected to GND, allowing the
charge pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal oscillator
are present.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers, they
must guarantee a certain amount of ESD
protection since the system itself is exposed to
the outside environment and human presence.
The premise with IEC1000-4-2 is that the
system is required to withstand an amount of
static electricity when ESD is applied to points
and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on Figure 15. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
Since both V+ and V– are separately generated
from VCC; in a no–load condition V+ and V– will
besymmetrical. Olderchargepumpapproaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operatesat250kHz. Theexternalcapacitorscan
be as low as 0.1µF with a 16V breakdown
voltage rating.
ESD Tolerance
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect a
cable onto the rear of the system only to find
an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system. This
energy, whether discharged directly or through
air, is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with
the approach speed.
The SP3220E device incorporates ruggedized
ESD cells on all driver output and receiver
input pins. The ESD structure is improved over
our previous family for more rugged applications
and environments sensitive to electro-static
discharges and associated transients. The
improved ESD tolerance is at least +15kV
without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
acceptedESDtestingmethodforsemiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
11
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure 9. Charge Pump — Phase 1
V
= +5V
CC
C
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
1
2
–
C
–10V
3
Figure 10. Charge Pump — Phase 2
[
T
]
+6V
a) C2+
T
T
GND
1
2
GND
b) C2-
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V
Figure 11. Charge Pump Waveforms
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
+
–
C
C
2
1
–
–
C
–5V
–5V
3
Figure 12. Charge Pump — Phase 3
V
= +5V
CC
C
+
+10V
+
4
–
+
V
Storage Capacitor
Storage Capacitor
DD
SS
+
1
–
C
C
2
–
–
V
C
3
Figure 13. Charge Pump — Phase 4
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
12
R
R
S
S
R
R
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
Figure 14. ESD Test Circuit for Human Body Model
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be
directly discharged to the equipment from a
person already holding the equipment. The
current is transferred on to the keypad or the
serial port of the equipment directly and then
travels through the PCB and finally to the IC.
The circuit models in Figures 14 and 15
represent the typical ESD testing circuits used
forallthreemethods. TheCS isinitiallycharged
with the DC power supply when the first
switch (SW1) is on. Now that the capacitor is
charged, the second switch (SW2) is on while
SW1 switches off. The voltage stored in the
capacitor is then applied through RS, the current
limiting resistor, onto the device under test
(DUT). In ESD tests, the SW2 switch is pulsed
so that the device under test receives a duration
of voltage.
Contact-Discharge Module
Contact-Discharge Module
R
R
R
R
S
S
R
R
V
V
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
R
R
and R add up to 330Ω for IEC1000-4-2.
and R add up to 330Ω for IEC1000-4-2.
S
S
V
V
Figure 15. ESD Test Circuit for IEC1000-4-2
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
13
For the Human Body Model, the current
limiting resistor (RS) and the source capacitor
(CS) are 1.5kΩ an 100pF, respectively. For
IEC-1000-4-2, the current limiting resistor (RS)
andthesourcecapacitor(CS)are330Ωan150pF,
respectively.
30A
15A
0A
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage
capacitor injects a higher voltage to the test
point when SW2 is switched on. The lower
current limiting resistor increases the current
t=0ns
t=30ns
t ■
charge onto the test point.
Figure 16. ESD Test Waveform for IEC1000-4-2
Device Pin
Tested
Human Body
Model
IEC1000-4-2
Air Discharge Direct Contact
Level
Driver Outputs
Receiver Inputs
+15kV
+15kV
+15kV
+15kV
+8kV
+8kV
4
4
Table 3. Transceiver ESD Tolerance Levels
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
14
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
24–PIN
20–PIN
28–PIN
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
A
A1
B
D
E
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.317/0.328
(8.07/8.33)
0.278/0.289
(7.07/7.33)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
e
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
H
L
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
0°/8°
(0°/8°)
Ø
0°/8°
(0°/8°)
0°/8°
(0°/8°)
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
15
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
18–PIN
A
A1
B
D
E
0.090/0.104
(2.29/2.649)
0.090/0.104
(2.29/2.649))
0.004/0.012
(0.102/0.300) (0.102/0.300)
0.004/0.012
0.013/0.020
(0.330/0.508) (0.330/0.508)
0.013/0.020
0.398/0.413
(10.10/10.49) (11.35/11.74)
0.447/0.463
0.291/0.299 0.291/0.299
(7.402/7.600) (7.402/7.600)
e
0.050 BSC
(1.270 BSC)
0.050 BSC
(1.270 BSC)
H
L
0.394/0.419
0.394/0.419
(10.00/10.64) (10.00/10.64)
0.016/0.050
(0.406/1.270) (0.406/1.270)
0.016/0.050
Ø
0°/8°
(0°/8°)
0°/8°
(0°/8°)
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
16
PACKAGE: PLASTIC THIN SMALL
OUTLINE
(TSSOP)
E2
E
D
A
Ø
A1
L
e
B
DIMENSIONS
in inches (mm)
16–PIN
20–PIN
Minimum/Maximum
- /0.043
(- /1.10)
- /0.043
(- /1.10)
A
0.002/0.006
(0.05/0.15)
0.002/0.006
(0.05/0.15)
A1
B
0.007/0.012
(0.19/0.30)
0.007/0.012
(0.19/0.30)
0.193/0.201
(4.90/5.10)
0.252/0.260
(6.40/6.60)
D
0.169/0.177
(4.30/4.50)
0.169/0.177
(4.30/4.50)
E
0.026 BSC
(0.65 BSC)
0.026 BSC
(0.65 BSC)
e
0.126 BSC
(3.20 BSC)
0.126 BSC
(3.20 BSC)
E2
L
0.020/0.030
(0.50/0.75)
0.020/0.030
(0.50/0.75)
0°/8°
0°/8°
Ø
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2000 Sipex Corporation
17
ORDERING INFORMATION
Temperature Range
Model
Package Type
SP3220ECA ............................................. 0˚C to +70˚C .......................................... 16-Pin SSOP
SP3220ECT ............................................. 0˚C to +70˚C .................................. 16-Pin Wide SOIC
SP3220ECY ............................................. 0˚C to +70˚C ........................................ 16-Pin TSSOP
SP3220EEA ............................................ -40˚C to +85˚C ........................................ 16-Pin SSOP
SP3220EET ............................................ -40˚C to +85˚C ................................ 16-Pin Wide SOIC
SP3220EEY ............................................ -40˚C to +85˚C ...................................... 16-Pin TSSOP
Co rp o ra tio n
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
11/07/02
SP3220E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2002 Sipex Corporation
18
相关型号：
©2020 ICPDF网 联系我们和版权申明