SP3223EBCA-L_技术文档

®

SP3223E/EB/EU

Intelligent +3.0V to +5.5V RS-232 Transceivers

FEATURES

■ Meets true EIA/TIA-232-F Standards

from a +3.0V to +5.5V power supply

■ Interoperable with EIA/TIA-232 and

adheres to EIA/TIA-562 down to a +2.7V

power source

EN

20

19

18

17

16

15

1

2

3

4

5

6

7

SHUTDOWN

VCC

C1+

V+

GND

C1-

T₁OUT

R₁IN

■ AUTO ON-LINE^®circuitry automatically

wakes up from a 1µA shutdown

■ Minimum 250Kbps data rate under load

(EB)

SP3223

C2+

C2-

V-

R₁OUT

14

13

ONLINE

T₁IN

■ 1 Mbps data rate for high speed RS-232

T₂OUT

R₂IN

8

9

(EU)

12 T₂IN

STATUS

■ Regulated Charge Pump Yields Stable

RS-232 Outputs Regardless of V_CC

Variations

10

R₂OUT

11

■ ESD Specifications:

+15KV Human Body Model

Now Available in Lead Free Packaging

+15KV IEC1000-4-2 Air Discharge

+8KV IEC1000-4-2 Contact Discharge

DESCRIPTION

The SP3223 products are RS-232 transceiver solutions intended for portable applications

such as notebook and hand held computers. The SP3223 use an internal high-efficiency,

charge-pumppowersupplythatrequiresonly0.1µFcapacitorsin3.3Voperation. Thischarge

pump and Sipex's driver architecture allow the SP3223 series to deliver compliant RS-232

performance from a single power supply ranging from +3.3V to +5.0V. The SP3223 is a 2-

driver/2-receiver device ideal for laptop/notebook computer and PDA applications.

The AUTO ON-LINE^®feature allows the device to automatically "wake-up" during a shutdown

statewhenanRS-232cableisconnectedandaconnectedperipheralisturnedon. Otherwise,

the device automatically shuts itself down drawing less than 1µA.

SELECTION TABLE

Device

Power

Supplies

RS-232

External

TTL 3-

State

# of

Pins

Gauranteed

Data Rate

ESD

Rating

AUTO ON-LINE^®

Drivers Receivers Components

Circuitry

SP3223

SP3223E

SP3223B

+3.0V to +5.5V

2

4 capacitors

YES

20

120

2kV

15kV

2kV

250

SP3223EB +3.0V to +5.5V

SP3223U +3.0V to +5.5V

SP3223EU +3.0V to +5.5V

250

15kV

2kV

1000

15kV

Applicable U.S. Patents - 5,306,954; and other patents pending.

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

1

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation

of the device at these ratings or any other above those

indicated in the operation sections of the specifications

below is not implied. Exposure to absolute maximum

rating conditions for extended periods of time may

affect reliability and cause permanent damage to the

device.

Output Voltages

TxOUT.............................................................+13.2V

RxOUT, STATUS.......................-0.3V to (V_CC+ 0.3V)

Short-Circuit Duration

TxOUT.....................................................Continuous

Storage Temperature......................-65°C to +150°C

V_CC.......................................................-0.3V to +6.0V

V+ (NOTE 1).......................................-0.3V to +7.0V

V- (NOTE 1)........................................+0.3V to -7.0V

V+ + |V-| (NOTE 1)...........................................+13V

I_CC(DC V_CCor GND current).........................+100mA

Input Voltages

Power Dissipation per package

20-pin SSOP (derate 9.25mW/^oC above +70^oC)....750mW

20-pin TSSOP (derate 11.1mW/^oC above +70^oC)..900mW

TxIN, ONLINE,

SHUTDOWN, EN (SP3223).................-0.3V to +6.0V

RxIN...................................................................+15V

NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

ELECTRICAL CHARACTERISTICS

Unless otherwise noted, the following specifications apply for V_CC= +3.0V to +5.5V with T_AMB= T_MINto T_MAX

.

Typical values apply at V_CC= +3.3V or +5.0V and T_AMB= 25°C (Note 2).

PARAMETER

MIN.

TYP.

MAX.

UNITS CONDITIONS

DC CHARACTERISTICS

µA

Supply Current,

AUTO ON-LINE^®

1.0

10

All RxIN open, ONLINE = GND,

SHUTDOWN = V_CC, TxIN=V_CCor

GND,V_CC= +3.3V, T_AMB= +25° C

µA

Supply Current, Shutdown

1.0

0.3

10

SHUTDOWN = GND, TxIN=V_CCor

GND, V_CC= +3.3V, T_AMB= +25° C

Supply Current,

1.0

mA

ONLINE = SHUTDOWN = V_CC,

no load, V_CC= +3.3V, T_AMB= +25° C

AUTO ON-LINE^®Disabled

LOGIC INPUTS AND RECEIVER OUTPUTS

Input Logic Threshold

V_CC= +3.3V or +5.0V, TxIN,

EN (SP3223), ONLINE,

SHUTDOWN

LOW

HIGH

GND

2.0

0.8

V_CC

V

µA

Input Leakage Current

Output Leakage Current

±0.01

±0.05

±1.0

±10

0.4

TxIN, EN, ONLINE, SHUTDOWN,

T

_AMB= +25° C, V_IN= OV to V_CC

Receivers disabled,

_OUT= OV to V_CC

V

Output Voltage LOW

Output Voltage HIGH

V

I_OUT= 1.6mA

I_OUT= -1.0mA

V

_CC- 0.6 V_CC- 0.1

NOTE 2: C1 - C4 0.1µF, tested at 3.3V ±10%.

C1 = 0.047µF, C2-C4 = 0.33µF, tested at 5V±10%.

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

2

ELECTRICAL CHARACTERISTICS

Unless otherwise noted, the following specifications apply for V_CC= +3.0V to +5.5V with T_AMB= T_MINto T_MAX

.

Typical values apply at V_CC= +3.3V or +5.0V and T_AMB= 25°C (Note 2).

PARAMETER

MIN.

TYP.

MAX. UNITS CONDITIONS

DRIVER OUTPUTS

Output Voltage Swing

±5.0

300

±5.4

V

All driver outputs loaded with 3KΩ

to GND, T_AMB= +25° C

Ω

Output Resistance

V_CC= V+ = V- = 0V, V_OUT= ±2V

Output Short-Circuit Current

±35

±70

±60

±100

V_OUT= 0V

V_OUT= ±15V

mA

µA

Output Leakage Current

±25

V_CC= 0V or 3.0V to 5.5V,

V_OUT= ±12V, Drivers disabled

RECEIVER INPUTS

Input Voltage Range

Input Threshold LOW

Input Threshold HIGH

Input Hysteresis

-15

0.6

0.8

15

V

1.2

1.5

1.8

0.3

5

V_CC= 3.3V

V

V_CC= 5.0V

V_CC= 3.3V

V_CC= 5.0V

2.4

V

Input Resistance

3

7

kΩ

AUTO ON-LINE^®CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = V_CC

)

STATUS Output Voltage LOW

STATUS Output Voltage HIGH

Receiver Threshold to Drivers

0.4

V

I_OUT= 1.6mA

I_OUT= -1.0mA

Figure 14

V

_CC- 0.6

µS

200

0.5

Enabled (t_ONLINE

)

µS

Receiver Positive or Negative

Threshold to STATUS HIGH

Figure 14

(t_STSH

)

Receiver Positive or Negative

Threshold to STATUS LOW

20

(t_STSL

)

NOTE 2: C1 - C4 0.1µF, tested at 3.3V ±10%.

C1 = 0.047µF, C2-C4 = 0.33µF, tested at 5V±10%.

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

3

TIMING CHARACTERISTICS

Unless otherwise noted, the following specifications apply for V_CC= +3.0V to +5.5V with T_AMB= T_MINto T_MAX

.

Typical values apply at V_CC= +3.3V or +5.0V and T_AMB= 25°C.

PARAMETER

Maximum Data Rate

SP3223E

MIN. TYP. MAX. UNITS CONDITIONS

120

250

235

SP3223EB

R_L= 3KΩ, C_L= 1000pF, one driver active

R_L= 3KΩ, C_L= 250pF, one driver active

kbps

SP3223EH

460

SP3223EU

1000

Receiver Propagation Delay

t_PHL

0.15

Receiver input to Receiver output, C_L=

150pF

µs

t_PLH

Receiver Output Enable Time

200

ns

Normal operation

Receiver Output Disable Time

Driver Skew

E,EB

100

50

500

100

ns

| t_PHL- t_PLH|, T_AMB= 25ºC

EH, EU

Receiver Skew

200

1000

| t_PHL- t_PLH

|

Transition-Region Slew Rate

E,EB

EH

30

V

_CC= 3.3V, R_L= 3KΩ, T_AMB= 25ºC,

60

90

V/µs

measurements taken from -3.0V to +3.0V

or +3.0V to -3.0V

EU

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

4

TYPICAL OPERATING CIRCUIT

+3V to +5V

+

19

CC

0.1µF

C5

C1

V

2

3

C1+

V+

V-

+

C3

C4

0.1µF

4

5

C1-

SP3223

7

C2+

+

C2

0.1µF

+

6

13

12

C2-

T₁OUT

T₂OUT

T₁IN

17

8

TTL/CMOS

INPUTS

RS-232

OUTPUTS

T₂IN

R₁OUT

R₁IN

15

10

16

9

5KΩ

RS-232

INPUTS

TTL/CMOS

OUTPUTS

R₂OUT

EN

R₂IN

5KΩ

1

V

CC

20

SHUTDOWN

14

11

ONLINE

STATUS

To µP Supervisor

Circuit

GND

18

Figure 4. SP3223 Typical Operating Circuit

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

5

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for V_CC= +3.3V, 250Kbps data rate, all drivers

loaded with 3kΩ, 0.1µF charge pump capacitors, and T_AMB= +25°C.

30

25

20

15

10

5

6

4

- Slew

+ Slew

TxOUT +

2

0

-2

-4

-6

1 Transmitter at 250Kbps

1 Transmitter at 15.6Kbps

All drivers loaded 3K + Load Cap

TxOUT -

0

500 1000

2000 3000 4000 5000

0

1000

2000

3000

4000

5000

Load Capacitance (pF)

Figure 1. Transmitter Output Voltage VS. Load

Capacitance for the SP3223EB

Figure 2. Slew Rate VS. Load Capacitance for the

SP3223EB

35

30

20

15

250Kbps

25

125Kbps

20

10

15

20Kbps

1 Transmitter at 250Kbps

10

2 Transmitters at 15.6Kbps

5

1 Transmitter at 250Kbps

All drivers loaded with 3K // 1000pF

1 Transmitter at 15.6Kbps

5

All drivers loaded 3K + Load Cap

0

1000

2000

3000

4000

5000

2.7

3

3.5

4

4.5

5

Load Capacitance (pF)

Supply Voltage (V

)

DC

Figure 4. Supply Current VS. Supply Voltage for

the SP3243EB

Figure 3. Supply Current VS. Load Capacitance when

Transmitting Data for the SP3223EB

6

TxOUT +

4

2

0

-2

-4

TxOUT -

-6

2.7

3

3.5

4

4.5

5

Supply Voltage (V

)

DC

Figure 5. Transmitter Output Voltage VS. Supply

Voltage for the SP3243EB

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

6

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for V_CC= +3.3V, 1000Kbps data rate, all drivers

loaded with 3kΩ, 0.1µF charge pump capacitors, and T_AMB= +25°C.

6

4

200

150

100

50

2

1Driver at 1Mbps

Other Drivers at 62.5Kbps

All Drivers Loaded with 3K // 250pF

0

-2

-4

-6

T1 at 500Kbps

T2 at 31.2Kbps

All TX loaded 3K // CLoad

0

250

500

1000

1500

2000

2.7

3

3.5

4

4.5

5

Load Capacitance (pF)

Supply Voltage (V)

Figure 6. Transmitter Skew VS. Load Capacitance for

the 3223EU

Figure 7 Transmitter Output Voltage VS. Supply

Voltage for the SP3223EU

35

30

25

20

6

4

T1 at 1Mbps

T2 at 62.5Kbps

2

0

-2

-4

-6

15

T1 at 1Mbps

T2 at 62.5Kbps

10

5

0

250

500

1000

1500

0

250

500

1000

1500

Load Capacitance (pF)

Figure 8. Transmitter Output Voltage VS. Load

Capacitance for the SP3223EU

Figure 9. Supply Current VS. Load Capacitance for the

SP3223EU

6

4

20

15

2

T1 at 1Mbps

0

-2

-4

-6

10

T2 at 62.5Kbps

All Drivers loaded

with 3K//250pF

T1 at 1Mbps

T2 at 62.5Kbps

All Drivers loaded

5

with 3K//250pF

0

2.7

3

3.5

4

4.5

5

2.7

3

3.5

4

4.5

5

Supply Voltage (V)

Figure 10. Supply Current VS. Supply Voltage for the

SP3223EU

Figure 11. Transmitter Output Voltage VS. Supply

Voltage for the SP3223EU

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

7

PIN DESCRIPTION

NAME

FUNCTION

PIN #

Receiver Enable. Apply logic LOW for normal operation. Apply logic HIGH to

disable the receiver outputs (high-Z state).

EN

1

C1+

V+

Positive terminal of the voltage doubler charge-pump capacitor.

Regulated +5.5V output generated by the charge pump.

Negative terminal of the voltage doubler charge-pump capacitor.

Positive terminal of the inverting charge-pump capacitor.

Negative terminal of the inverting charge-pump capacitor.

Regulated -5.5V output generated by the charge pump.

RS-232 driver output.

2

3

C1-

4

C2+

5

C2-

6

V-

7

T₂OUT

R₂IN

R₂OUT

STATUS

T₂IN

8

RS-232 receiver input.

9

TTL/CMOS receiver output.

10

11

12

13

TTL/CMOS Output indicating online and shutdown status.

TTL/CMOS driver input.

T₁IN

TTL/CMOS driver input.

Apply logic HIGH to override AUTO ON-LINE^®circuitry keeping drivers active

(SHUTDOWN must also be logic HIGH, refer to Table 2).

ONLINE

R₁OUT

R₁IN

14

15

16

TTL/CMOS receiver output.

RS-232 receiver input.

T₁OUT

GND

V_CC

RS-232 driver output.

Ground.

17

18

19

+3.0V to +5.5V supply voltage.

Apply logic LOW to shut down drivers and charge pump. This overrides all

AUTO ON-LINE^®circuitry and ONLINE (refer to Table 2).

SHUTDOWN

20

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

8

DESCRIPTION

Otherwise, the system automatically comes

online. This feature allows design engineers to

address power saving concerns without major

design changes.

The SP3223 is a 2-driver/2-receiver device

ideal for portable or handheld applications.

The SP3223 transceivers meet theEIA/TIA-232

and ITU-T V.28/V.24 communication protocols

and can be implemented in battery-powered,

portable, or handheld applications such as note-

book or handheld computers. The SP3223 de-

vices feature Sipex's proprietary and patented

(U.S.-- 5,306,954) on-board charge pump cir-

cuitry that generates ±5.5V RS-232 voltage lev-

els from a single +3.0V to +5.5V power supply.

The SP3223 devices operate at this typical data

rate when fully loaded.

THEORY OF OPERATION

The SP3223 series is made up of four basic

circuit blocks:

1.Drivers, 2.Receivers, 3.theSipexproprietary

charge pump, and 4. AUTO ON-LINE^®cir-

cuitry.

Drivers

The drivers are inverting level transmitters that

convert TTL or CMOS logic levels to 5.0V EIA/

TIA-232 levels with an inverted sense relative to

the input logic levels. Typically, the RS-232

output voltage swing is +5.4V with no load and

+5V minimum fully loaded. The driver outputs

are protected against infinite short-circuits to

ground without degradation in reliability. These

drivers comply with the EIA-TIA-232F and all

previous RS-232 versions. Unused driver inputs

should be connected to GND or V_CC.

The SP3223 series is an ideal choice for power

sensitive designs. Featuring AUTO ON-LINE^®

circuitry, the SP3223 reduces the power supply

drain to a 1µA supply current. In many portable

or handheld applications, an RS-232 cable can

bedisconnectedoraconnectedperipheralcanbe

turned off. Under these conditions, the internal

charge pump and the drivers will be shut down.

The drivers can guarantee output data rates fully

loaded with 3KΩ in parallel with 1000pF,

(SP3223EU, C_L=250pF)ensuringcompatibility

with PC-to-PC communication software.

+3V to +5V

+

19

0.1µF

C5

V

CC

2

3

7

C1+

V+

V-

+

C1

C2

0.1µF

C3

C4

0.1µF

4

5

C1-

C2+

SP3223

TheslewrateofthedriveroutputontheEandEB

versions is internally limited to a maximum of

30V/µs in order to meet the EIA standards (EIA

RS-232D 2.1.7, Paragraph 5). The Slew Rate of

H and U versions is not limited to enable higher

speed data tranfers. The transition of the loaded

outputfromHIGHtoLOWalsomeetsthemono-

tonicity requirements of the standard.

6

13

12

C2-

T

₁OUT

T₁IN

17

8

TTL/CMOS

INPUTS

RS-232

OUTPUTS

T₂IN

T₂OUT

R₁OUT

R₁IN

15

16

9

UART

or

Serial µC

5KΩ

TTL/CMOS

OUTPUTS

RS-232

INPUTS

R₂OUT

R₂IN

10

5KΩ

1

EN

V

CC

20

SHUTDOWN

14

11

ONLINE

STATUS

Figure 12 shows a loopback test circuit used to

test the RS-232 Drivers. Figure13 shows the test

results where one driver was active at 235Kbps

and all drivers are loaded with an RS-232 re-

ceiver in parallel with a 1000pF capacitor. RS-

232datatransmissionrateof120Kbpsto1Mbps.

provide compatibility with designs in personal

computer peripherals and LAN applications.

GND

18

µP

Supervisor

IC

V

RESET

IN

Figure 11. Interface Circuitry Controlled by Micropro-

cessor Supervisory Circuit

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

9

+3V to +5V

19

+

0.1µF

C5

C1

V

CC

2

3

7

C1+

DEVICE: SP3223

V+

V-

+

C3

C4

0.1µF

4

5

C1-

C2+

SP3223

SHUTDOWN

EN

0

T_XOUT

R_XOUT

Active

High Z

Active

High Z

+

C2

0.1µF

6

C2-

0

1

High Z

Active

T

₁OUT

T

₁IN

TTL/CMOS

INPUTS

T_XIN

T

_XOUT

1

R

₁OUT

R₁IN

0

TTL/CMOS

OUTPUTS

5KΩ

R

_XOUT

R_XIN

1

5KΩ

1

1000pF

EN

V

CC

20

SHUTDOWN

Table 2. SHUTDOWN and EN Truth Tables

14

11

Note: In AUTO ON-LINE^®Mode where ONLINE =

GND and SHUTDOWN = V_CC, the device will shut down

if there is no activity present at the Receiver inputs.

ONLINE

STATUS

To µP Supervisor

Circuit

GND

18

Receivers

Figure 12. Loopback Test Circuit for RS-232 Driver

Data Transmission Rates

The receivers convert ±5.0V EIA/TIA-232

levels to TTL or CMOS logic output levels.

Receivers have an inverting output that can be

disabled by using the EN pin.

Charge Pump

Receivers are active when the AUTO ON-LINE^®

circuitry is enabled or when in shutdown.

Duringtheshutdown, thereceiverswillcontinue

to be active. If there is no activity present at the

receivers for a period longer than 100µs or when

SHUTDOWN is enabled, the device goes into a

standby mode where the circuit draws 1µA.

DrivingENtoalogicHIGHforcestheoutputsof

the receivers into high-impedance. The truth

table logic of the SP3223 driver and receiver

outputs can be found in Table 2.

The charge pump is a Sipex–patented design

(U.S. 5,306,954) and uses a unique approach

compared to older less–efficient designs. The

charge pump still requires four external

capacitors, but uses a four–phase voltage

shifting technique to attain symmetrical 5.5V

power supplies. The internal power supply

Since receiver input is usually from a transmis-

sion line where long cable lengths and system

interference can degrade the signal, the inputs

haveatypicalhysteresismarginof300mV. This

ensures that the receiver is virtually immune to

noisy transmission lines. Should an input be left

unconnected, aninternal 5KΩpulldownresistor

to ground will commit the output of the receiver

to a HIGH state.

T1 IN

T1 OUT

R1 OUT

Figure 13. Loopback Test Circuit result at 235Kbps

(All Drivers Fully Loaded)

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

10

voltage is regulated to +5.5V. At this voltage,

the internal oscillator is disabled. Simultaneous

with the transfer of the voltage to C₄, the

positive side of capacitor C₁is switched to V_CC

and the negative side is connected to GND,

allowing the charge pump cycle to begin again.

The charge pump cycle will continue as long as

the operational conditions for the internal

oscillator are present.

consists of a regulated dual charge pump that

provides output voltages 5.5V regardless of the

input voltage (V_CC) over the +3.0V to +5.5V

range. This is important to maintain compliant

RS-232 levels regardless of power supply

fluctuations.

The charge pump operates in a discontinuous

mode using an internal oscillator. If the output

voltages are less than a magnitude of 5.5V, the

charge pump is enabled. If the output voltages

exceed a magnitude of 5.5V, the charge pump is

disabled. Thisoscillatorcontrolsthefourphases

of the voltage shifting. A description of each

phase follows.

Since both V⁺and V^–are separately generated

from V_CC, in a no–load condition V⁺and V^–will

besymmetrical. Olderchargepumpapproaches

that generate V^–from V⁺will show a decrease in

the magnitude of V^–compared to V⁺due to the

inherent inefficiencies in the design.

Phase 1

— V_SScharge storage — During this phase of

the clock cycle, the positive side of capacitors

C₁and C₂are initially charged to V_CC. C_l⁺is

then switched to GND and the charge in C₁^–is

transferred to C₂. Since C₂is connected to

V_CC, the voltage potential across capacitor C₂is

AUTO ON-LINE^®Circuitry

The SP3223 devices have a patent pending

AUTO ON-LINE^®circuitry on board that saves

power in applications such as laptop computers,

PDA's, and other portable systems.

–

+

now 2 times V_CC

.

Phase 2

The SP3223 devices incorporate an AUTO

ON-LINE^®circuit that automatically enables

itself when the external transmitters are enabled

and the cable is connected. Conversely, the

AUTO ON-LINE^®circuit also disables most of

theinternalcircuitrywhenthedeviceisnotbeing

used and goes into a standby mode where the

device typically draws 1µA. This function can

also be externally controlled by the ONLINE

pin. When this pin is tied to a logic LOW, the

AUTO ON-LINE^®function is active. Once

active, the device is enabled until there is no

activity on the receiver inputs. The receiver

input typically sees at least ±3V, which are

generated from the transmitters at the other end

of the cable with a ±5V minimum. When the

external transmitters are disabled or the cable is

disconnected, the receiver inputs will be pulled

down by their internal 5kΩ resistors to ground.

When this occurs over a period of time, the

internal transmitters will be disabled and the

device goes into a shutdown or standby mode.

When ONLINE is HIGH, the AUTO ON-LINE^®

mode is disabled.

— V_SStransfer — Phase two of the clock

connects the negative terminal of C₂to the V_SS

storage capacitor and the positive terminal of C₂

to GND. This transfers a negative generated

voltage to C₃. This generated voltage is

regulated to a minimum voltage of -5.5V.

Simultaneous with the transfer of the voltage to

C₃, the positive side of capacitor C₁is switched

to V_CCand the negative side is connected to

GND.

Phase 3

— V_DDcharge storage — The third phase of the

clock is identical to the first phase — the charge

transferred in C₁produces –V_CCin the negative

terminal of C₁, which is applied to the negative

side of capacitor C₂. Since C₂is at V_CC, the

voltage potential across C₂is 2 times V_CC

+

.

Phase 4

— V_DDtransfer — The fourth phase of the clock

connects the negative terminal of C₂to GND,

and transfers this positive generated voltage

across C₂to C₄, the V_DDstorage capacitor. This

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

11

or portable applications where the RS-232 cable

is disconnected or the RS-232 drivers of the

connected peripheral are turned off.

The AUTO ON-LINE^®circuit has two stages:

1) Inactive Detection

2) Accumulated Delay

The AUTO ON-LINE^®mode can be disabled

by the SHUTDOWN pin. If this pin is a logic

LOW, the AUTO ON-LINE^®function will not

operate regardless of the logic state of the

ONLINE pin. Table 3 summarizes the logic of the

AUTO ON-LINE^®operating modes. The truth

table logic of the SP3223 driver and receiver

outputs can be found in Table 2.

The first stage, shown in Figure 20, detects an

inactive input. A logic HIGH is asserted on

R_XINACT if the cable is disconnected or the

external transmitters are disabled. Otherwise,

R_XINACT will be at a logic LOW. This circuit

is duplicated for each of the other receivers.

The STATUS pin outputs a logic LOW signal if

the device is shutdown. This pin goes to a logic

HIGH when the external transmitters are en-

abled and the cable is connected.

The clock rate for the charge pump typically

operates at above 250kHz. The external capaci-

tors can be as low as 0.1µF with a 16V break-

down voltage rating.

The second stage of the AUTO ON-LINE^®

circuitry, shown in Figure 21, processes all the

receiver's R_XINACT signals with an accumu-

lated delay that disables the device to a 1µA

supply current.

The STATUS pin goes to a logic LOW when the

cable is disconnected, the external transmitters

are disabled, or the SHUTDOWN pin is

invoked. Thetypicalaccumulateddelayisaround

20µs.

When the SP3223 devices are shut down, the

charge pumps are turned off. V+ charge pump

output decays to V_CC,the V- output decays to

GND. The decay time will depend on the size of

capacitors used for the charge pump. Once in

shutdown, the time required to exit the shut

down state and have valid V+ and V- levels is

typically 200µs.

For easy programming, the STATUS can be

used to indicate DTR or a Ring Indicator signal.

Tying ONLINE and SHUTDOWN

together will bypass the AUTO ON-LINE^®

circuitry so this connection acts like a shutdown

input pin

When the SP3223 drivers or internal charge

pump are disabled, the supply current is reduced

to 1µA. This can commonly occur in handheld

S

H

U

T

+2.7V

0V

-2.7V

RECEIVER

RS-232 INPUT

VOLTAGES

D

O

W

N

V

CC

0V

STATUS

t

STSL

t

STSH

tONLINE

+5V

DRIVER

RS-232 OUTPUT

VOLTAGES

0V

-5V

Figure 14. AUTO ON-LINE^®Timing Waveforms

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

12

V

= +5V

CC

C

+5V

4

+

–

+

V

Storage Capacitor

DD

SS

+

–

+

–

C

2

1

–

C

–5V

3

Figure 15. Charge Pump — Phase 1

V

= +5V

CC

C

4

+

–

+

V

Storage Capacitor

DD

+

–

+

C

2

1

–

SS

C

–10V

3

Figure 16. Charge Pump — Phase 2

[

T

]

+6V

a) C²⁺

T

0V

1

2

b) C2-

-6V

Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V

Figure 17. Charge Pump Waveforms

V

= +5V

CC

C

+5V

4

+

–

+

V

Storage Capacitor

DD

SS

+

–

+

–

C

2

1

–

C

–5V

3

Figure 18. Charge Pump — Phase 3

V

= +5V

CC

C

+10V

4

+

–

+

V

Storage Capacitor

DD

+

–

+

–

C

2

1

–

SS

C

3

Figure 19. Charge Pump — Phase 4

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

13

RS-232 SIGNAL

AT RECEIVER

INPUT

SHUTDOWN

INPUT

TRANSCEIVER

STATUS

ONLINE INPUT

STATUS OUTPUT

Normal Operation

(AUTO ON-LINE^®)

YES

NO

HIGH

LOW

HIGH

LOW

HIGH

LOW

Normal Operation

Shutdown

(AUTO ON-LINE^®)

NO

LOW

Shutdown

YES

NO

HIGH/LOW

Table 3. AUTO ON-LINE^®Logic

R INACT

X

Inactive Detection Block

RS-232

Receiver Block

R OUT

X

R IN

X

Figure 20. Stage I of AUTO ON-LINE^®Circuitry

Delay

Buffer

Delay

Buffer

STATUS

R₁ON

R₂ON

SHUTDOWN

Figure 21. Stage II of AUTO ON-LINE^®Circuitry

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

14

The Sipex-patented charge pumps are designed

to operate reliably with a range of low cost

capacitors.Either polarized or non polarized

capacitors may be used. If polarized capacitors

are used they should be oriented as shown in the

Typical Operating Circuit. The V+ capacitor

may be connected to either ground or Vcc

(polarity reversed.)

rippleonthetransmitteroutputsandmayslightly

reduce power consumption. C2, C3, and C4 can

be increased without changing C1’s value

Forbestchargepumpefficiencylocatethecharge

pump and bypass capacitors as close as possible

to the IC. Surface mount capacitors are best for

this purpose. Using capacitors with lower

equivalent series resistance (ESR) and self-

inductance,alongwithminimizingparasiticPCB

trace inductance will optimize charge pump

operation. Designersarealsoadvisedtoconsider

that capacitor values may shift over time and

operating temperature.

Thechargepumpoperateswith0.1µFcapacitors

for 3.3V operation. For other supply voltages,

see the table for required capacitor values. Do

not use values smaller than those listed.

Increasing the capacitor

values (e.g., by doubling in value) reduces

Minimum recommended charge pump capacitor value

Input Voltage V_CC

Charge pump capacitor value for SP32XX

C1 – C4 = 0.1uF

3.0V to 3.6V

4.5V to 5.5V

3.0V to 5.5V

C1 = 0.047uF, C2-C4 = 0.33uF

C1 – C4 = 0.22uF

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

15

normal usage. The transceiver IC receives most

of the ESD current when the ESD source is

applied to the connector pins. The test circuit for

IEC1000-4-2 is shown on Figure 23. There are

two methods within IEC1000-4-2, the Air

Discharge method and the Contact Discharge

method.

ESD TOLERANCE

The SP3223E

series

incorporates

ruggedized ESD cells on all driver output and

receiver input pins. The ESD structure is

improved over our previous family for more

rugged applications and environments sensitive

to electro-static discharges and associated

transients. The improved ESD tolerance is at

least +15kV without damage nor latch-up.

With the Air Discharge Method, an ESD voltage

is applied to the equipment under test (EUT)

throughair. Thissimulatesanelectricallycharged

person ready to connect a cable onto the rear of

the system only to find an unpleasant zap just

before the person touches the back panel. The

high energy potential on the person discharges

through an arcing path to the rear panel of the

system before he or she even touches the system.

This energy, whether discharged directly or

through air, is predominantly a function of the

discharge current rather than the discharge

voltage. Variables with an air discharge such as

approach speed of the object carrying the ESD

potential to the system and humidity will tend to

change the discharge current. For example, the

rise time of the discharge current varies with the

approach speed.

There are different methods of ESD testing

applied:

a) MIL-STD-883, Method 3015.7

b) IEC1000-4-2 Air-Discharge

c) IEC1000-4-2 Direct Contact

The Human Body Model has been the generally

acceptedESDtestingmethodforsemiconductors.

This method is also specified in MIL-STD-883,

Method 3015.7 for ESD testing. The premise of

this ESD test is to simulate the human body’s

potential to store electro-static energy and

discharge it to an integrated circuit. The

simulation is performed by using a test model as

shown in Figure 22. This method will test the

IC’s capability to withstand an ESD transient

duringnormalhandlingsuchasinmanufacturing

areaswheretheICstendtobehandledfrequently.

The Contact Discharge Method applies the ESD

current directly to the EUT. This method was

devised to reduce the unpredictability of the

ESD arc. The discharge current rise time is

constant since the energy is directly transferred

without the air-gap arc. In situations such as

handheldsystems,theESDchargecanbedirectly

dischargedtotheequipmentfromapersonalready

holdingtheequipment. Thecurrentistransferred

ontothekeypadortheserialportoftheequipment

directly andthentravelsthroughthePCBandfinally

to the IC.

The IEC-1000-4-2, formerly IEC801-2, is

generallyusedfortestingESDonequipmentand

systems. For system manufacturers, they must

guarantee a certain amount of ESD protection

since the system itself is exposed to the outside

environment and human presence. The premise

with IEC1000-4-2 is that the system is required

to withstand an amount of static electricity when

ESD is applied to points and surfaces of the

equipmentthatareaccessibletopersonnelduring

R

S

R

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

Figure 22. ESD Test Circuit for Human Body Model

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

16

CCoonnttaacctt--DDiisscchhaarrggee MMoodduullee

R

S

R

V

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

R

and R add up to 330Ω for IEC1000-4-2.

S

V

Figure 23. ESD Test Circuit for IEC1000-4-2

The circuit model in Figures 22and 23 represent

the typical ESD testing circuit used for all three

methods. TheC_SisinitiallychargedwiththeDC

power supply when the first switch (SW1) is on.

Now that the capacitor is charged, the second

switch(SW2)isonwhileSW1switchesoff. The

voltage stored in the capacitor is then applied

throughR_S, thecurrentlimitingresistor, ontothe

device under test (DUT). In ESD tests, the SW2

switch is pulsed so that the device under test

receives a duration of voltage.

30A

15A

0A

FortheHumanBodyModel, thecurrentlimiting

resistor (R ) and the source capacitor (C ) are

1.5kΩ an 1^S00pF, respectively. For IEC-10^S00-4-

2,thecurrentlimitingresistor(R_S)andthesource

capacitor (C_S) are 330Ω an 150pF, respectively.

t=0ns

t=30ns

t ■

Figure 24. ESD Test Waveform for IEC1000-4-2

The higher C value and lower R_Svalue in the

IEC1000-4-2^Smodel are more stringent than the

HumanBodyModel. Thelargerstoragecapacitor

injects a higher voltage to the test point when

SW2 is switched on. The lower current limiting

resistor increases the current charge onto the test

point.

DEVICE PIN

TESTED

HUMAN BODY

MODEL

IEC1000-4-2

Air Discharge Direct Contact

Level

Driver Outputs

Receiver Inputs

±15kV

±8kV

4

Table 4. Transceiver ESD Tolerance Levels

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

17

PACKAGE: 20 Pin PDIP

A1

D

A

N

A2

INDEX

AREA

D1

E

L

E1

b2

e

b3

b

1

2

3

N/2

E

c

eA

eB

20 PIN PDIP JEDEC MS-001 (AD) Variation

SYMBOL

MIN

-

NOM

-

MAX

0.21

-

0.195

0.022

0.07

0.045

0.014

1.06

-

A

A1

A2

b

b2

b3

c

D

D1

E

E1

e

eA

eB

L

0.15

0.115

0.014

0.045

0.3

0.008

0.98

0.005

0.3

0.13

0.018

0.06

0.039

0.01

1.03

-

0.31

0.25

.100 BSC

.300 BSC

-

b

0.325

0.28

0.24

C

-

0.43

0.15

0.115

0.13

Note: Dimensions in (mm)

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

18

PACKAGE: 20 Pin TSSOP

D

e

Ø

E

E1

Seaing Plane

Ø

L

Ø

L1

DETAIL A

1

2

INDEX AREA

D

2

E1

2

x

SEE DETAIL “A”

A2

A

Seating Plane

A1

b

B

20 Pin TSSOP JEDEC MO-153 (AC)

Variation

MIN

NOM

MAX

SYMBOL

A

A1

A2

b

c

D

-

1

-

1.2

0.05

0.8

0.19

0.09

6.4

0.15

1.05

0.3

0.2

6.6

b

6.5

E

E1

e

Ø1

ø2

ø3

L

6.40 BSC

4.4

0.65 BSC

-

12º REF

0.6

C

4.3

0º

4.5

8º

Section B-B

0.45

0.75

L1

1.00 REF

Note: Dimensions in (mm)

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

19

PACKAGE: 20 Pin SSOP

D

N

SEE DETAIL “A”

E

E1

1

INDEX AREA

2

D

2

E1

x

2

2 NX R R1

A

Gauge Plane

Seaing Plane

A

L

Ø

L1

DETAIL A

A2

A

20 Pin SSOP JEDEC MO-153 (AE) Variation

Seating Plane

MIN

NOM

MAX

SYMBOL

A

A1

A2

b

c

D

E

E1

L

L1

ø

-

2

-

A1

b

0.05

1.65

0.22

0.09

6.9

7.4

5

-

1.75

-

7.2

7.8

5.3

0.75

1.25 REF

4º

1.85

0.38

0.25

7.5

8.2

5.6

0.95

WITH LEAD FINISH

0.55

0º

8º

c

Note: Dimensions in (mm)

BASE METAL

b

Section A-A

20 PIN SSOP

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

20

PRODUCT NOMENCLATURE

SP 3223 E U EY L /TR

Tape and Reel options

Sipex

“L” suffix indicates Lead Free packaging

Package Type A= SSOP

P=PDIP

Y=TSSOP

Part Number

Temperature Range C= Commercial Range 0ºc to 70ºC

E= Extended Range -40ºc to 85ºC

Speed Indicator Blank= 120Kbps

B= 250Kbps

H= 450Kbps

U= 1Mbps

ESD Rating E= 15kV HBM and IEC 1000-4

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

21

ORDERING INFORMATION

Part Number

Temperature Range

Package Types

SP3223EBCP .................................................... 0°C to +70°C -------------------------------------------- 20-pin PDIP

SP3223EBCA .................................................... 0°C to +70°C -------------------------------------------20-pin SSOP

SP3223EBCA/TR .............................................. 0°C to +70°C -------------------------------------------20-pin SSOP

SP3223EBCY .................................................... 0°C to +70°C ----------------------------------------- 20-pin TSSOP

SP3223EBCY/TR .............................................. 0°C to +70°C ----------------------------------------- 20-pin TSSOP

SP3223EBEP .................................................. -40°C to +85°C ------------------------------------------- 20-pin PDIP

SP3223EBEA .................................................. -40°C to +85°C ------------------------------------------20-pin SSOP

SP3223EBEA/TR ............................................ -40°C to +85°C ------------------------------------------20-pin SSOP

SP3223EBEY .................................................. -40°C to +85°C ---------------------------------------- 20-pin TSSOP

SP3223EBEY/TR ............................................ -40°C to +85°C ---------------------------------------- 20-pin TSSOP

SP3223ECA ...................................................... 0°C to +70°C.................................................... 20-pin SSOP

SP3223ECA/TR ................................................ 0°C to +70°C.................................................... 20-pin SSOP

SP3223ECP ...................................................... 0°C to +70°C...................................................... 20-pin PDIP

SP3223ECY ...................................................... 0°C to +70°C.................................................. 20-pin TSSOP

SP3223ECY/TR ................................................ 0°C to +70°C.................................................. 20-pin TSSOP

SP3223EEA..................................................... -40°C to +85°C .................................................. 20-pin SSOP

SP3223EEA/TR............................................... -40°C to +85°C .................................................. 20-pin SSOP

SP3223EEP..................................................... -40°C to +85°C .................................................... 20-pin PDIP

SP3223EEY..................................................... -40°C to +85°C ................................................ 20-pin TSSOP

SP3223EEY/TR............................................... -40°C to +85°C ................................................ 20-pin TSSOP

SP3223EUCP .................................................... 0°C to +70°C...................................................... 20-pin PDIP

SP3223EUCA .................................................... 0°C to +70°C.................................................... 20-pin SSOP

SP3223EUCA/TR .............................................. 0°C to +70°C.................................................... 20-pin SSOP

SP3223EUCY .................................................... 0°C to +70°C.................................................. 20-pin TSSOP

SP3223EUCY/TR .............................................. 0°C to +70°C.................................................. 20-pin TSSOP

SP3223EUEP .................................................. -40°C to +85°C .................................................... 20-pin PDIP

SP3223EUEA .................................................. -40°C to +85°C .................................................. 20-pin SSOP

SP3223EUEA/TR ............................................ -40°C to +85°C .................................................. 20-pin SSOP

SP3223EUEY .................................................. -40°C to +85°C ................................................ 20-pin TSSOP

SP3223EUEY/TR ............................................ -40°C to +85°C ................................................ 20-pin TSSOP

Available in lead free packaging. To order add "-L" suffix to part number.

Example: SP3223EUEY/TR = standard; SP3223EUEY-L/TR = lead free

/TR = Tape and Reel

Pack quantity is 1,500 for SSOP, TSSOP and WSOIC.

CLICK HERE TO ORDER SAMPLES

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

22

ORDERING INFORMATION

Contact factory for availability of the following legacy part numbers. For long term availability

Sipexrecommendsupgradesaslistedbelow. Allupgradepartnumbersshownarefullypinout

and function compatible with legacy part numbers. Upgrade part numbers may contain

feature and/or performance enhancements or other changes to datasheet parameters.

Legacy Part Number

SP3223BCA

Recommended Upgrade

SP3223EBCA

Legacy Part Number Recommended Upgrade

SP3223EHCY

SP3223EUCY

SP3223BCA/TR

SP3223BCA-L

SP3223BCA-L/TR

SP3223BCP

SP3223EBCA/TR

SP3223EBCA-L

SP3223EBCA-L/TR

SP3223EBCP

SP3223EHCY/TR

SP3223EHCY-L

SP3223EHCY-L/TR SP3223EUCY-L/TR

SP3223EUCY/TR

SP3223EUCY-L

SP3223EP

SP3223EEP

SP3223BCY

SP3223EBCY

SP3223EY

SP3223EEY

SP3223BCY/TR

SP3223BCY-L

SP3223BCY-L/TR

SP3223BEA

SP3223EBCY/TR

SP3223EBCY-L

SP3223EBCY-L/TR

SP3223EBEA

SP3223EY/TR

SP3223EY-L

SP3223EY-L/TR

SP3223HCA

SP3223EEY/TR

SP3223EEY-L

SP3223EEY-L/TR

SP3223EUCA

SP3223BEA/TR

SP3223BEA-L

SP3223BEA-L/TR

SP3223BEP

SP3223EBEA/TR

SP3223EBEA-L

SP3223EBEA-L/TR

SP3223EBEP

SP3223HCA/TR

SP3223HCA-L

SP3223HCA-L/TR

SP3223HCP

SP3223EUCA/TR

SP3223EUCA-L

SP3223EUCA-L/TR

SP3223EUCP

SP3223BEY

SP3223EBEY

SP3223HCY

SP3223EUCY

SP3223BEY/TR

SP3223BEY-L

SP3223BEY-L/TR

SP3223CA

SP3223EBEY/TR

SP3223EBEY-L

SP3223EBEY-L/TR

SP3223ECA

SP3223HCY/TR

SP3223HCY-L

SP3223HCY-L/TR

SP3223UCA

SP3223EUCY/TR

SP3223EUCY-L

SP3223EUCY-L/TR

SP3223EUCA

SP3223CA/TR

SP3223CA-L

SP3223CA-L/TR

SP3223CP

SP3223ECA/TR

SP3223ECA-L

SP3223ECA-L/TR

SP3223ECP

SP3223UCA/TR

SP3223UCA-L

SP3223UCA-L/TR

SP3223UCP

SP3223EUCA/TR

SP3223EUCA-L

SP3223EUCA-L/TR

SP3223EUCP

SP3223CY

SP3223ECY

SP3223UCY

SP3223EUCY

SP3223CY/TR

SP3223CY-L

SP3223CY-L/TR

SP3223EA

SP3223ECY/TR

SP3223ECY-L

SP3223ECY-L/TR

SP3223EEA

SP3223UCY/TR

SP3223UCY-L

SP3223UCY-L/TR

SP3223UEA

SP3223EUCY/TR

SP3223EUCY-L

SP3223EUCY-L/TR

SP3223EUEA

SP3223EA/TR

SP3223EA-L

SP3223EEA/TR

SP3223EEA-L

SP3223EEA-L/TR

SP3223EUCA

SP3223EUCA/TR

SP3223EUCA-L

SP3223EUCA-L/TR

SP3223EUCP

SP3223UEA/TR

SP3223UEA-L

SP3223UEA-L/TR

SP3223UEP

SP3223EUEA/TR

SP3223EUEA-L

SP3223EUEA-L/TR

SP3223EUEP

SP3223EA-L/TR

SP3223EHCA

SP3223EHCA/TR

SP3223EHCA-L

SP3223EHCA-L/TR

SP3223EHCP

SP3223UEY

SP3223EUEY

SP3223UEY/TR

SP3223UEY-L

SP3223UEY-L/TR

SP3223EUEY/TR

SP3223EUEY-L

SP3223EUEY-L/TR

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the

application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.

Date: 12/16/04

SP3223 +3.0V to +5.5V RS-232 Transceivers

23


型号：	SP3223EBCA-L
厂家：	SIPEX CORPORATION
描述：	Intelligent 3.0V to 5.5V RS-232 Transceivers 驱动光电二极管接口集成电路驱动器
文件：	总23页 (文件大小：156K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SP3223EBCA-L [SIPEX]

相关型号：

UL1042

ZXFV201

ZXFV201N14

ZXFV201N14TA

ZXFV201N14TC

ZXFV202E5

ZXFV202N8

ZXFV203N14

ZXFV301N16(1)

ZXFV302N16

ZXFV4089

ZXFV4089N8