SP3232ECT/TR [SIPEX]
True +3.0V to +5.5V RS-232 Transceivers; 真正的+ 3.0V至+ 5.5V的RS - 232收发器型号: | SP3232ECT/TR |
厂家: | SIPEX CORPORATION |
描述: | True +3.0V to +5.5V RS-232 Transceivers |
文件: | 总20页 (文件大小:202K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
SP3222E/3232E
True +3.0V to +5.5V RS-232Transceivers
FEATURES
EN
18
17
16
15
14
13
1
2
3
4
5
6
7
SHDN
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Minimum 120Kbps Data Rate Under Full
Load
V
CC
C1+
V+
GND
C1-
T1OUT
R1IN
SP3222E
C2+
C2-
V-
■ 1µA Low-Power Shutdown with Receivers
Active (SP3222E)
R1OUT
12
11
10
T1IN
■ Interoperable with RS-232 down to +2.7V
power source
T2OUT
R2IN
8
9
T2IN
R2OUT
■ Enhanced ESD Specifications:
±15kV Human Body Model
DIP/SO
±15kV IEC1000-4-2 Air Discharge
±8kV IEC1000-4-2 Contact Discharge
Now Available in Lead Free Packaging
Note: See page 6 for other pinouts
DESCRIPTION
The SP3222E/3232E series is an RS-232 transceiver solution intended for portable or hand-
held applications such as notebook or palmtop computers. The SP3222E/3232E series has
a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V
operation. This charge pump allows the SP3222E/3232E series to deliver true RS-232
performance from a single power supply ranging from +3.3V to +5.0V. The SP3222E/3232E
are2-driver/2-receiverdevices. Thisseriesisidealforportableorhand-heldapplicationssuch
as notebook or palmtop computers. The ESD tolerance of the SP3222E/3232E devices are
over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods. The
SP3222E device has a low-power shutdown mode where the devices' driver outputs and
charge pumps are disabled. During shutdown, the supply current falls to less than 1µA.
SELECTION TABLE
RS-232
Drivers
RS-232
External
TTL
No. of
Pins
MODEL Power Supplies
Shutdown
Receivers Components
3-State
+3.0V to +5.5V
+3.0V to +5.5V
2
2
2
2
4
4
Yes
No
Yes
No
18, 20
16
SP3222
SP3232
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
1
Input Voltages
TxIN, EN ................................................... -0.3V to +6.0V
RxIN ..........................................................................±15V
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the
device at these ratings or any other above those indicated in
the operation sections of the specifications below is not
implied. Exposure to absolute maximum rating conditions
for extended periods of time may affect reliability and cause
permanent damage to the device.
Output Voltages
TxOUT ......................................................................±15V
RxOUT ........................................... -0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT ............................................................ Continuous
VCC................................................................-0.3V to +6.0V
V+ (NOTE 1)................................................-0.3V to +7.0V
V- (NOTE 1)................................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)....................................................+13V
Storage Temperature .............................. -65°C to +150°C
Power Dissipation Per Package
20-pin SSOP (derate 9.25mW/oC above +70oC) ..... 750mW
18-pin PDIP (derate 15.2mW/oC above +70oC) ....1220mW
18-pin SOIC (derate 15.7mW/oC above +70oC) ... 1260mW
20-pin TSSOP (derate 11.1mW/oC above +70oC) .. 890mW
16-pin SSOP (derate 9.69mW/oC above +70oC) ..... 775mW
16-pin PDIP (derate 14.3mW/oC above +70oC) .... 1150mW
16-pin Wide SOIC (derate 11.2mW/oC above +70oC) 900mW
16-pin TSSOP (derate 10.5mW/oC above +70oC) .. 850mW
16-pin nSOIC (derate 13.57mW/°C above +70°C) .. 1086mW
ICC (DC VCC or GND current).................................±100mA
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current
0.3
1.0
1.0
10
mA
no load, TAMB = +25oC, VCC = 3.3V
SHDN = GND, TAMB = +25oC, VCC = +3.3V
Shutdown Supply Current
µA
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW
0.8
V
V
TxIN, EN, SHDN, Note 2
Input Logic Threshold HIGH
2.0
2.4
V
= 3.3V, Note 2
VCCCC = 5.0V, Note 2
TxIN, EN, SHDN, TAMB = +25oC
receivers disabled
IOUT = 1.6mA
Input Leakage Current
Output Leakage Current
Output Voltage LOW
Output Voltage HIGH
DRIVER OUTPUTS
Output Voltage Swing
±0.01
±0.05
±1.0
±10
0.4
µA
µA
V
V
CC-0.6 VCC-0.1
V
IOUT = -1.0mA
±5.0
±5.4
V
3kΩ load to ground at all driver outputs,
T
AMB = +25oC
Output Resistance
300
Ω
V
V
CC = V+ = V- = 0V, TOUT = +2V
OUT = 0V
Output Short-Circuit Current
±35
±70
±60
mA
mA
±100
VOUT = +15V
Output Leakage Current
±25
µA
V
OUT = +12V,VCC= 0V to 5.5V,drivers disabled
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.0V with TAMB = TMIN to TMAX
Typical Values apply at VCC = +3.3V or +5.0V and TAMB = 25oC.
.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
RECEIVER INPUTS
Input Voltage Range
Input Threshold LOW
-15
+15
V
V
0.6
0.8
1.2
1.5
V =3.3V
VCCCC=5.0V
Input Threshold HIGH
1.5
1.8
2.4
2.4
V
V
CC=3.3V
VCC=5.0V
Input Hysteresis
0.3
5
V
Input Resistance
3
7
kΩ
TIMING CHARACTERISTICS
Maximum Data Rate
Driver Propagation Delay
120
235
kbps
RL=3kΩ, CL=1000pF, one driver switching
1.0
1.0
µs
µs
t
, R = 3KΩ, C = 1000pF
tPPLHHL, RLL = 3KΩ, CLL = 1000pF
Receiver Propagation Delay
0.3
0.3
µs
t
, RxIN to RxOUT, C =150pF
tPPLHHL, RxIN to RxOUT, CLL=150pF
Receiver Output Enable Time
Receiver Output Disable Time
Driver Skew
200
200
100
200
ns
ns
500
1000
30
ns
| tPHL - tPLH |, TAMB = 25oC
| tPHL - tPLH
Receiver Skew
ns
|
Transition-Region Slew Rate
V/µs
V
CC = 3.3V, R = 3KΩ, T
= 25oC,
measurementLs taken froAmMB-3.0V to +3.0V
or +3.0V to -3.0V
NOTE 2: Driver input hysteresis is typically 250mV.
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rates, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
14
12
6
4
10
Vout+
Vout-
2
0
8
6
4
2
0
0
500
1000
1500
2000
-2
-4
-6
+Slew
-Slew
Load Capacitance [pF]
0
500
1000
1500
2000
2330
Load Capacitance [pF]
Figure 1. Transmitter Output Voltage VS. Load
Capacitance for the SP3222 and the SP3232
Figure 2. Slew Rate VS. Load Capacitance for the
SP3222 and the SP3232
50
118KHz
45
60KHz
10KHz
40
35
30
25
20
15
10
5
0
0
500
1000
1500
2000
2330
Load Capacitance [pF]
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3222 and the SP3232
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
4
PIN NUMBER
SP3222E
NAME
FUNCTION
SP3232E
SSOP/-
TSSOP
DIP/SO
Receiver Enable. Apply logic LOW for normal operation.
EN
1
1
-
Apply logic HIGH to disable the receiver outputs (high-Z state).
C1+
V+
Positive terminal of the voltage doubler charge-pump capacitor.
+5.5V generated by the charge pump.
2
3
2
3
1
2
C1-
C2+
C2-
V-
Negative terminal of the voltage doubler charge-pump capacitor.
Positive terminal of the inverting charge-pump capacitor.
Negative terminal of the inverting charge-pump capacitor.
-5.5V generated by the charge pump.
4
4
3
5
5
4
6
6
5
7
7
6
T1OUT RS-232 driver output.
T2OUT RS-232 driver output.
15
8
17
8
14
7
R1IN
R2IN
RS-232 receiver input.
RS-232 receiver input.
14
9
16
9
13
8
R1OUT TTL/CMOS reciever output.
R2OUT TTL/CMOS reciever output.
13
10
12
11
16
17
15
10
13
12
18
19
12
9
T1IN
T2IN
GND
VCC
TTL/CMOS driver input.
11
10
15
16
TTL/CMOS driver input.
Ground.
+3.0V to +5.5V supply voltage
Shutdown Control Input. Drive HIGH for normal device operation.
SHDN Drive LOW to shutdown the drivers (high-Z output) and the on-
board power supply.
18
-
20
-
-
N.C.
No Connect.
11, 14
Table 1. Device Pin Description
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
5
EN
1
2
3
4
5
6
7
20
19
18
17
16
15
EN
1
2
3
4
5
6
7
18
17
16
15
14
13
SHDN
SHDN
V
CC
C1+
V+
VCC
C1+
V+
GND
GND
C1-
T1OUT
R1IN
C1-
T1OUT
R1IN
SP3222E
SP3222E
DIP/SO
C2+
C2-
V-
C2+
C2-
V-
R1OUT
R1OUT
14
13
N.C.
12
11
10
T1IN
T2OUT
R2IN
8
9
T1IN
T2OUT
R2IN
8
9
T2IN
12 T2IN
N.C.
R2OUT
10
R2OUT
11
SSOP/TSSOP
Figure 4. Pinout Configurations for the SP3222E
V
CC
1
2
3
4
5
6
7
16
15
14
C1+
V+
GND
C1-
T1OUT
R1IN
SP3232E
C2+
C2-
13
12
11
R1OUT
T1IN
V-
10
9
T2OUT
R2IN
T2IN
8
R2OUT
Figure 5. Pinout Configuration for the SP3232E
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
6
V
CC
VCC
+
+
+
+
19
17
0.1µF
0.1µF
C5
C1
0.1µF
0.1µF
C5
C1
V
CC
VCC
2
3
2
3
C1+
C1+
V+
V-
V+
V-
+
+
+
+
0.1µF
0.1µF
0.1µF
0.1µF
*C3
C4
*C3
C4
4
5
4
5
C1-
C1-
7
C2+
7
C2+
SP3222E
DIP/SO
SP3222E
+
+
SSOP
C2
0.1µF
C2
0.1µF
6
6
TSSOP
C2-
C2-
T1OUT
T2OUT
15
8
T1OUT
T2OUT
12 T1IN
11 T2IN
17
8
13 T1IN
12 T2IN
LOGIC
RS-232
LOGIC
RS-232
INPUTS
OUTPUTS
INPUTS
OUTPUTS
14
13
10
R1IN
R1OUT
R2OUT
16
15
10
R1IN
R1OUT
R2OUT
5kΩ
5kΩ
RS-232
INPUTS
LOGIC
RS-232
INPUTS
LOGIC
OUTPUTS
OUTPUTS
R2IN
9
R2IN
9
5kΩ
5kΩ
1 EN
18
1 EN
20
SHDN
SHDN
GND
16
GND
18
*can be returned to
either VCC or GND
*can be returned to
either VCC or GND
Figure 6. SP3222E Typical Operating Circuits
V
CC
+
16
0.1µF
0.1µF
C5
C1
VCC
2
1
C1+
V+
V-
+
+
+
+
0.1µF
0.1µF
*C3
C4
3
4
C1-
6
C2+
SP3232E
C2
0.1µF
5
C2-
T1OUT
T2OUT
14
11 T1IN
LOGIC
RS-232
7
10
12
9
INPUTS
T2IN
OUTPUTS
R1IN 13
R1OUT
R2OUT
5kΩ
RS-232
INPUTS
LOGIC
OUTPUTS
R2IN
8
5kΩ
GND
15
*can be returned to
either VCC or GND
Figure 7. SP3232E Typical Operating Circuit
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
7
DESCRIPTION
The slew rate of the driver output is internally
limitedtoamaximumof30V/µsinordertomeet
the EIA standards (EIA RS-232D 2.1.7, Para-
graph 5). The transition of the loaded output
from HIGH to LOW also meets the monotonic-
ity requirements of the standard.
TheSP3222E/3232EtransceiversmeettheEIA/
TIA-232 and V.28/V.24 communication proto-
cols and can be implemented in battery-pow-
ered, portable, orhand-heldapplicationssuchas
notebook or palmtop computers. The SP3222E/
3232E devices all feature Sipex's proprietary
on-board charge pump circuitry that generates 2
x VCC for RS-232 voltage levels from a single
+3.0V to +5.5V power supply. This series is
ideal for +3.3V-only systems, mixed +3.3V to
+5.5V systems, or +5.0V-only systems that re-
quire true RS-232 performance. The SP3222E/
3232E series have drivers that operate at a typi-
cal data rate of 235Kbps fully loaded.
The SP3222E/3232E drivers can maintain high
data rates up to 235Kbps fully loaded. Figure 8
shows a loopback test circuit used to test the
RS-232 drivers. Figure 9 shows the test results
of the loopback circuit with all drivers active at
120Kbps with RS-232 loads in parallel with
1000pF capacitors. Figure 10 shows the test
results where one driver was active at 235Kbps
and all drivers loaded with an RS-232 receiver
in parallel with a 1000pF capacitor. A solid
RS-232 data transmission rate of 120Kbps
provides compatibility with many designs
in personal computer peripherals and LAN
applications.
The SP3222E and SP3232E are 2-driver/2-re-
ceiver devices ideal for portable or hand-held
applications. The SP3222E features a 1µA
shutdown mode that reduces power consump-
tion and extends battery life in portable systems.
Its receivers remain active in shutdown mode,
allowing external devices such as modems to be
monitored using only 1µA supply current.
The SP3222E driver's output stages are turned
off (tri-state) when the device is in shutdown
mode. When the power is off, the SP3222E
device permits the outputs to be driven up to
±12V. The driver's inputs do not have pull-up
resistors. Designers should connect unused
inputs to VCC or GND.
THEORY OF OPERATION
TheSP3222E/3232Eseriesaremadeupofthree
basic circuit blocks: 1. Drivers, 2. Receivers,
and 3. the Sipex proprietary charge pump.
In the shutdown mode, the supply current falls to
less than 1µA, where SHDN = LOW. When the
SP3222E device is shut down, the device's
driver outputs are disabled (tri-stated) and the
charge pumps are turned off with V+ pulled
down to VCC and V- pulled to GND. The time
required to exit shutdown is typically 100µs.
Connect SHDN to VCC if the shutdown mode is
not used. SHDN has no effect on RxOUT or
RxOUTB. Astheybecomeactive, thetwodriver
outputs go to opposite RS-232 levels where one
driver input is HIGH and the other LOW. Note
that the drivers are enabled only when the
magnitude of V- exceeds approximately 3V.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to ±5.0V
EIA/TIA-232 levels inverted relative to the in-
put logic levels. Typically, the RS-232 output
voltage swing is ±5.5V with no load and at least
±5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
groundwithoutdegradationinreliability. Driver
outputs will meet EIA/TIA-562 levels of ±3.7V
with supply voltages as low as 2.7V.
The drivers typically can operate at a data rate
of 235Kbps. The drivers can guarantee a data
rate of 120Kbps fully loaded with 3KΩ in
parallel with 1000pF, ensuring compatibility
with PC-to-PC communication software.
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
8
V
CC
+
+
0.1µF
0.1µF
C5
C1
V
CC
C1+
V+
V-
+
+
C3
C4
0.1µF
0.1µF
C1-
SP3222E
SP3232E
C2+
+
C2
0.1µF
C2-
TxOUT
RxIN
TxIN
LOGIC
INPUTS
RxOUT
EN
LOGIC
OUTPUTS
5kΩ
V
CC
*SHDN
GND
1000pF
* SP3222 only
Figure 8. SP3222E/3232E Driver Loopback Test Circuit
[
T
T
]
[
T
T
]
T1 IN
T1 IN
1
1
T1 OUT 2
T1 OUT 2
T
T
T
T
R1 OUT
3
R1 OUT
3
Ch2
Ch2
5.00V M 2.50µs Ch1
5.00V
Ch3 5.00V
5.00V M 5.00µs Ch1
0V
5.00V
5.00V
0V
Ch1
Ch1
Ch3
Figure 9. Driver Loopback Test Results at 120kbps
Figure 10. Driver Loopback Test Results at 235kbps
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
9
Receivers
In most circumstances, decoupling the power
supplycanbeachievedadequatelyusinga0.1µF
bypasscapacitoratC5(refertoFigures6and7).
In applications that are sensitive to power-sup-
ply noise, decouple VCC to ground with a capaci-
tor of the same value as charge-pump capacitor
C1. Physically connect bypass capacitors as
close to the IC as possible.
The receivers convert EIA/TIA-232 levels to
TTL or CMOS logic output levels. All receivers
haveaninvertingtri-stateoutput. Thesereceiver
outputs (RxOUT) are tri-stated when the enable
control EN = HIGH. In the shutdown mode, the
receivers can be active or inactive. EN has no
effect on TxOUT. The truth table logic of the
SP3222E/3232Edriverandreceiveroutputscan
be found in Table 2.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
haveatypicalhysteresismarginof300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, a 5kΩ pulldown resistor to ground
will commit the output of the receiver to a HIGH
state.
Phase 1
— VSS charge storage — During this phase of
theclockcycle,thepositivesideofcapacitorsC1
and C2 are initially charged to VCC. Cl+ is then
switched to GND and the charge in C1– is trans-
ferred to C2–. Since C2+ is connected to VCC, the
voltage potential across capacitor C2 is now 2
times VCC.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
paredtoolderless–efficientdesigns. Thecharge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical 5.5V power supplies. The
internal power supply consists of a regulated
dual charge pump that provides output voltages
5.5V regardless of the input voltage (VCC) over
the +3.0V to +5.5V range.
Phase 2
— VSS transfer — Phase two of the clock con-
nects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is regu-
lated to a minimum voltage of -5.5V. Simulta-
neous with the transfer of the voltage to C3, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
SHDN
EN
0
TxOUT
Tri-state
Tri-state
Active
RxOUT
Active
Phase 3
0
0
1
1
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2+ is at VCC, the
voltage potential across C2 is 2 times VCC.
1
Tri-state
Active
0
1
Active
Tri-state
Table 2. Truth Table Logic for Shutdown and Enable
Control
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
10
Phase 4
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 17. This method will test the
IC’s capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled
frequently.
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
withthetransferofthevoltagetoC4, thepositive
side of capacitor C1 is switched to VCC and the
negative side is connected to GND, allowing the
charge pump cycle to begin again. The charge
pump cycle will continue as long as the opera-
tional conditions for the internal oscillator are
present.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers, they
must guarantee a certain amount of ESD
protection since the system itself is exposed to
the outside environment and human presence.
The premise with IEC1000-4-2 is that the
system is required to withstand an amount of
static electricity when ESD is applied to points
and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on Figure 18. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
Since both V+ and V– are separately generated
from VCC; in a no–load condition V+ and V– will
besymmetrical. Olderchargepumpapproaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operatesat250kHz. Theexternalcapacitorscan
be as low as 0.1µF with a 16V breakdown
voltage rating.
ESD Tolerance
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect a
cable onto the rear of the system only to find
an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system. This
energy, whether discharged directly or through
air, is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with
the approach speed.
The SP3222E/3232E series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients. The improved ESD tolerance is at
least ±15kV without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconduc-
tors. ThismethodisalsospecifiedinMIL-STD-
883,Method3015.7forESDtesting.Thepremise
of this ESD test is to simulate the human body’s
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
11
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
SS
C
–5V
–5V
3
Figure 12. Charge Pump — Phase 1
V
= +5V
CC
C
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
+
–
C
C
2
1
–
–
SS
C
–10V
3
Figure 13. Charge Pump — Phase 2
[
T
]
+6V
a) C2+
T
T
GND
1
2
GND
b) C -
2
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V
Figure 14. Charge Pump Waveforms
V
= +5V
CC
C
+
+5V
4
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
+
+
–
C
C
2
1
–
–
SS
C
–5V
–5V
3
Figure 15. Charge Pump — Phase 3
V
= +5V
CC
C
+
+10V
+
4
–
+
V
Storage Capacitor
Storage Capacitor
DD
+
C
C
2
1
–
–
–
V
SS
C
3
Figure 16. Charge Pump — Phase 4
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
12
R
R
S
S
R
R
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
Figure 17. ESD Test Circuit for Human Body Model
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be
directly discharged to the equipment from a
person already holding the equipment. The
current is transferred on to the keypad or the
serial port of the equipment directly and then
travels through the PCB and finally to the IC.
The circuit models in Figures 17 and 18
represent the typical ESD testing circuits used
forallthreemethods. TheCS isinitiallycharged
with the DC power supply when the first
switch (SW1) is on. Now that the capacitor is
charged, the second switch (SW2) is on while
SW1 switches off. The voltage stored in the
capacitor is then applied through RS, the current
limiting resistor, onto the device under test
(DUT). In ESD tests, the SW2 switch is pulsed
so that the device under test receives a duration
of voltage.
Contact-Discharge Module
Contact-Discharge Module
R
R
R
R
S
S
R
R
V
V
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
R
R
and R add up to 330Ω for IEC1000-4-2.
and R add up to 330Ω for IEC1000-4-2.
S
S
V
V
Figure 18. ESD Test Circuit for IEC1000-4-2
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
13
For the Human Body Model, the current
limiting resistor (RS) and the source capacitor
(CS) are 1.5kΩ an 100pF, respectively. For
IEC-1000-4-2, the current limiting resistor (RS)
andthesourcecapacitor(CS)are330Ωan150pF,
respectively.
30A
15A
0A
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage
capacitor injects a higher voltage to the test
point when SW2 is switched on. The lower
current limiting resistor increases the current
t=0ns
t=30ns
t ➙
charge onto the test point.
Figure 19. ESD Test Waveform for IEC1000-4-2
Device Pin
Tested
Human Body
Model
IEC1000-4-2
Air Discharge Direct Contact
Level
Driver Outputs
Receiver Inputs
±15kV
±15kV
±15kV
±15kV
±8kV
±8kV
4
4
Table 3. Transceiver ESD Tolerance Levels
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
14
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
20–PIN
0.068/0.078
(1.73/1.99)
A
A1
B
D
E
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.278/0.289
(7.07/7.33)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
e
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
H
L
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0°/8°
Ø
0°/8°
(0°/8°)
(0°/8°)
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
15
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1
E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
(0.381min.)
D
A = 0.210" max.
(5.334 max).
C
A2
Ø
L
B1
B
e
= 0.300 BSC
(7.620 BSC)
e = 0.100 BSC
(2.540 BSC)
A
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
18–PIN
0.115/0.195
0.115/0.195
A2
(2.921/4.953)
(2.921/4.953)
0.014/0.022
0.014/0.022
B
(0.356/0.559)
(0.356/0.559)
0.045/0.070
0.045/0.070
B1
C
(1.143/1.778)
(1.143/1.778)
0.008/0.014
0.008/0.014
(0.203/0.356)
(0.203/0.356)
0.780/0.800
0.880/0.920
D
(19.812/20.320) (22.352/23.368)
0.300/0.325
0.300/0.325
E
(7.620/8.255)
(7.620/8.255)
0.240/0.280
0.240/0.280
E1
L
(6.096/7.112)
(6.096/7.112)
0.115/0.150
0.115/0.150
(2.921/3.810)
(2.921/3.810)
0°/ 15°
0°/ 15°
Ø
(0°/15°)
(0°/15°)
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
16
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
18–PIN
A
A1
B
D
E
0.090/0.104
(2.29/2.649)
0.090/0.104
(2.29/2.649))
0.004/0.012
0.004/0.012
(0.102/0.300) (0.102/0.300)
0.013/0.020
0.013/0.020
(0.330/0.508) (0.330/0.508)
0.398/0.413
0.447/0.463
(10.10/10.49) (11.35/11.74)
0.291/0.299 0.291/0.299
(7.402/7.600) (7.402/7.600)
e
0.050 BSC
0.050 BSC
(1.270 BSC)
(1.270 BSC)
H
L
0.394/0.419
0.394/0.419
(10.00/10.64) (10.00/10.64)
0.016/0.050
0.016/0.050
(0.406/1.270) (0.406/1.270)
Ø
0°/8°
0°/8°
(0°/8°)
(0°/8°)
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
17
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
E
H
h x 45°
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
A
A1
B
D
E
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249)
0.013/0.020
(0.330/0.508)
0.386/0.394
(9.802/10.000)
0.150/0.157
(3.802/3.988)
e
0.050 BSC
(1.270 BSC)
H
h
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
L
0.016/0.050
(0.406/1.270)
Ø
0°/8°
(0°/8°)
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
18
PACKAGE: PLASTIC THIN
SMALL OUTLINE
(TSSOP)
DIMENSIONS
in inches (mm) Minimum/Maximum
Symbol
16 Lead
0.193/0.201 0.252/0.260
(4.90/5.10) (6.40/6.60)
20 Lead
D
e
0.026 BSC 0.026 BSC
(0.65 BSC) (0.65 BSC)
e
0.126 BSC (3.2 BSC)
0.252 BSC (6.4 BSC)
1.0 OIA
0.169 (4.30)
0.177 (4.50)
0.039 (1.0)
0’-8’ 12’REF
e/2
0.039 (1.0)
0.043 (1.10) Max
D
0.033 (0.85)
0.037 (0.95)
0.007 (0.19)
0.012 (0.30)
0.002 (0.05)
0.006 (0.15)
(θ2)
0.008 (0.20)
0.004 (0.09) Min
0.004 (0.09) Min
Gage
Plane
(θ3)
0.020 (0.50)
0.026 (0.75)
(θ1)
0.010 (0.25)
1.0 REF
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
19
ORDERING INFORMATION
Temperature Range
Model
Package Type
SP3222ECA ............................................. 0˚C to +70˚C .......................................... 20-Pin SSOP
SP3222ECA/TR ....................................... 0˚C to +70˚C .......................................... 20-Pin SSOP
SP3222ECP ............................................. 0˚C to +70˚C ............................................ 18-Pin PDIP
SP3222ECT ............................................. 0˚C to +70˚C ........................................ 18-Pin WSOIC
SP3222ECT/TR ....................................... 0˚C to +70˚C ........................................ 18-Pin WSOIC
SP3222ECY ............................................. 0˚C to +70˚C ........................................ 20-Pin TSSOP
SP3222ECY/TR ....................................... 0˚C to +70˚C ........................................ 20-Pin TSSOP
SP3222EEA ............................................ -40˚C to +85˚C ........................................ 20-Pin SSOP
SP3222EEA/TR ...................................... -40˚C to +85˚C ........................................ 20-Pin SSOP
SP3222EEP ............................................ -40˚C to +85˚C .......................................... 18-Pin PDIP
SP3222EET ............................................ -40˚C to +85˚C ...................................... 18-Pin WSOIC
SP3222EET/TR ...................................... -40˚C to +85˚C ...................................... 18-Pin WSOIC
SP3222EEY ............................................ -40˚C to +85˚C ...................................... 20-Pin TSSOP
SP3222EEY/TR ...................................... -40˚C to +85˚C ...................................... 20-Pin TSSOP
SP3232ECA ............................................. 0˚C to +70˚C .......................................... 16-Pin SSOP
SP3232ECA/TR ....................................... 0˚C to +70˚C .......................................... 16-Pin SSOP
SP3232ECP ............................................. 0˚C to +70˚C ............................................ 16-Pin PDIP
SP3232ECT ............................................. 0˚C to +70˚C ........................................ 16-Pin WSOIC
SP3232ECT/TR ....................................... 0˚C to +70˚C ........................................ 16-Pin WSOIC
SP3232ECN............................................. 0˚C to +70˚C ......................................... 16-Pin nSOIC
SP3232ECN/TR ....................................... 0˚C to +70˚C ......................................... 16-Pin nSOIC
SP3232ECY ............................................. 0˚C to +70˚C ........................................ 16-Pin TSSOP
SP3232ECY/TR ....................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP
SP3232EEA ............................................ -40˚C to +85˚C ........................................ 16-Pin SSOP
SP3232EEA/TR ...................................... -40˚C to +85˚C ........................................ 16-Pin SSOP
SP3232EEP ............................................ -40˚C to +85˚C .......................................... 16-Pin PDIP
SP3232EET ............................................ -40˚C to +85˚C ...................................... 16-Pin WSOIC
SP3232EET/TR ...................................... -40˚C to +85˚C ...................................... 16-Pin WSOIC
SP3232EEN ............................................ -40˚C to +85˚C ....................................... 16-Pin nSOIC
SP3232EEN/TR ...................................... -40˚C to +85˚C ....................................... 16-Pin nSOIC
SP3232EEY ............................................ -40˚C to +85˚C ...................................... 16-Pin TSSOP
SP3232EEY/TR ...................................... -40˚C to +85˚C ...................................... 16-Pin TSSOP
Available in lead free packaging. To order add “-L” suffix to part number.
Example: SP3232EEN/TR = standard; SP3232EEN-L/TR = lead free
/TR = Tape and Reel
Pack quantity is 1,500 for SSOP, TSSOP or WSOIC and 2,500 for NSOIC.
CLICK HERE TO ORDER SAMPLES
Corporation
ANALOG EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Date: 02/24/05
SP3222E, SP3232E True +3.0 to +5.0V RS-232 Transceivers
© Copyright 2005 Sipex Corporation
20
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