SP3243BCY [SIPEX]
Intelligent +3.0V to +5.5V RS-232 Transceivers; 智能+ 3.0V至+ 5.5V的RS - 232收发器
| 型号： | SP3243BCY |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | Intelligent +3.0V to +5.5V RS-232 Transceivers |
| 文件： | 总24页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP3223B/3243B
Intelligent +3.0V to +5.5V RS-232 Transceivers
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ AUTO ON-LINE® circuitry automatically
wakes up from a 1µA shutdown
■ Minimum 250kbps data rate under load
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ ESD Specifications:
+2kV Human Body Model
DESCRIPTION
The SP3223B and SP3243B products are RS-232 transceiver solutions intended for portable
or hand-held applications such as notebook and palmtop computers. The SP3223B and
SP3243B useaninternalhigh-efficiency, charge-pumppowersupplythatrequiresonly0.1µF
capacitors in 3.3V operation. This charge pump and Sipex's driver architecture allow the
SP3223B/3243B series to deliver compliant RS-232 performance from a single power supply
ranging from +3.0V to +5.5V. The SP3223B is a 2-driver/2-receiver device, and the SP3243B
is a 3-driver/5-receiver device ideal for laptop/notebook computer and PDA applications. The
SP3243B includes one complementary receiver that remains alert to monitor an external
device's Ring Indicate signal while the device is shutdown.
TheAUTOON-LINE®featureallowsthedevicetoautomatically"wake-up"duringashutdown
statewhenanRS-232cableisconnectedandaconnectedperipheralisturnedon. Otherwise,
the device automatically shuts itself down drawing less than 1µA.
SELECTION TABLE
Device
Power Supplies RS-232
RS-232
External
AUTO ON-LINE® TTL 3-State
Circuitry
No. of
Pins
Drivers Receivers Components
SP3223B
SP3243B
+3.0V to +5.5V
+3.0V to +5.5V
2
3
2
5
4 capacitors
4 capacitors
YES
YES
YES
YES
20
28
Applicable U.S. Patents - 5,306,954; and other patents pending.
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
Short-Circuit Duration
TxOUT .................................................... Continuous
Storage Temperature ...................... -65°C to +150°C
Power Dissipation per package
28-pin PDIP
(derate 16.0mW/°C above+70°C) ...................... 1300mW
20-pin SSOP
VCC ...................................................... -0.3V to +6.0V
V+ (NOTE 1) ...................................... -0.3V to +7.0V
V- (NOTE 1) ....................................... +0.3V to -7.0V
V+ + |V-| (NOTE 1)........................................... +13V
ICC (DC VCC or GND current)......................... +100mA
Input Voltages
(derate 9.25mW/°C above +70°C) ...................... 750mW
20-pin TSSOP
(derate 11.1mW/°C above +70°C) ....................... 900mW
28-pin SOIC
(derate 12.7mW/°C above +70°C) .................... 1000mW
28-pin SSOP
TxIN, ONLINE,
(derate 11.2mW/°C above +70°C) ...................... 900mW
28-pin TSSOP
(derate 11.1mW/°C above +70°C) ....................... 900mW
32-pin MLPQ
SHUTDOWN, EN (SP3223BE) .......... -0.3V to +6.0V
RxIN .................................................................. +25V
Output Voltages
TxOUT ........................................................... +13.2V
RxOUT, STATUS ..................... -0.3V to (VCC + 0.3V)
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
SPSCIFICATIONS
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
,
C1 - 4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current,
AUTO ON-LINE
1.0
10
10
µA
µA
All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, TxIN = VCC or
GND,VCC = +3.3V, TAMB = +25°C
®
Supply Current, Shutdown
1.0
0.3
SHUTDOWN = GND,
VCC = +3.3V, TAMB = +25°C,
TxIN = VCC or GND
Supply Current,
AUTO ON-LINE Disabled
1.0
mA ONLINE = SHUTDOWN = VCC
TxIN = VCC or GND,
,
®
no load, VCC = +3.3V, TAMB = +25°C
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
VCC = +3.3V or +5.0V, TxIN,
EN (SP3223B), ONLINE,
SHUTDOWN
0.8
V
V
HIGH
2.4
Input Leakage Current
SHUTDOWN,
±0.01
±0.05
±1.0
µA
TxIN, EN (SP3223B), ONLINE,
TAMB = +25°C, VIN = 0V to VCC
Output Leakage Current
±10
µA
Receivers disabled, VOUT = 0V to
VCC
Output Voltage LOW
Output Voltage HIGH
DRIVER OUTPUTS
Output Voltage Swing
0.4
V
V
IOUT = 1.6mA
IOUT = -1.0mA
VCC - 0.6 VCC - 0.1
±5.0
±5.4
±35
V
All driver outputs loaded with 3KΩ
to GND, TAMB = +25°C
Output Resistance
300
Ω
VCC = V+ = V- = 0V, VOUT = ±2V
Output Short-Circuit Current
Output Leakage Current
±60
±25
mA VOUT = 0V
µA VCC = 0V or 3.0V to 5.5V,
VOUT = ±12V, Drivers disabled
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
2
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX
,
C1 - 4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
PARAMETER
MIN.
TYP.
MAX. UNITS CONDITIONS
RECEIVER INPUTS
Input Voltage Range
Input Threshold LOW
Input Threshold LOW
Input Threshold HIGH
Input Threshold HIGH
Input Hysteresis
-25
0.6
0.8
25
V
V
1.2
1.5
1.5
1.8
0.3
5
VCC = 3.3V
VCC = 5.0V
VCC = 3.3V
VCC = 5.0V
V
2.4
2.4
V
V
V
Input Resistance
3
7
kΩ
®
AUTO ON-LINE CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC
)
STATUS Output Voltage LOW
0.4
V
V
IOUT = 1.6mA
IOUT = -1.0mA
STATUS Output Voltage HIGH VCC - 0.6
Receiver Threshold to Drivers
Enabled (tONLINE
)
200
0.5
µs
µs
Figure 20
Figure 20
Receiver Positive or Negative
Threshold to STATUS HIGH
(tSTSH
)
Receiver Positive or Negative
Threshold to STATUS LOW
20
µs
Figure 20
(tSTSL
)
TIMING CHARACTERISTICS
Maximum Data Rate
250
kbps
RL = 3KΩ, CL = 1000pF,
one driver active
Receiver Propagation Delay
tPHL
tPLH
0.15
0.15
µs
Receiver input to Receiver output,
CL = 150pF
Receiver Output Enable Time
Receiver Output Disable Time
Driver Skew
200
200
100
50
ns
ns
Normal operation
Normal operation
ns
| tPHL - tPLH |, TAMB = 25°C
Receiver Skew
ns
| tPHL - tPLH |
Transition-Region Slew Rate
30
V/µs
VCC= 3.3V, RL = 3KΩ, TAMB = 25°C,
measurements taken from -3.0V to
+3.0V or +3.0V to -3.0V
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
3
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rate, all drivers
loaded with 3KΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
30
25
20
15
10
5
6
4
- Slew
+ Slew
TxOUT +
2
0
-2
-4
-6
1 Transmitter at 250Kbps
1 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
TxOUT -
0
0
500 1000
2000 3000 4000 5000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 1. Transmitter Output Voltage VS. Load
Capacitance for the SP3223B
Figure 2. Slew Rate VS. Load Capacitance for the
SP3223B
35
30
20
15
250Kbps
25
125Kbps
20
10
15
20Kbps
1 Transmitter at 250Kbps
10
2 Transmitters at 15.6Kbps
5
1 Transmitter at 250Kbps
All drivers loaded with 3K // 1000pF
1 Transmitter at 15.6Kbps
5
All drivers loaded 3K + Load Cap
0
0
0
1000
2000
3000
4000
5000
2.7
3
3.5
4
4.5
5
Load Capacitance (pF)
Supply Voltage (V
)
DC
Figure 4. Supply Current VS. Supply Voltage for
the SP3243B
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3223B
6
6
TxOUT +
4
4
TxOUT +
2
0
2
0
-2
-2
TxOUT -
-4
-4
TxOUT -
-6
-6
2.7
3
3.5
4
4.5
5
0
1000
2000
3000
4000
5000
Supply Voltage (V
)
DC
Load Capacitance (pF)
Figure 6. Transmitter Output Voltage VS. Load
Capacitance for the SP3243B
Figure 5. Transmitter Output Voltage VS. Supply
Voltage for the SP3243B
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
4
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rate, all drivers
loaded with 3KΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
25
20
15
10
5
40
35
30
25
20
15
10
5
- Slew
+ Slew
120Kbps
250Kbps
20Kbps
1 Transmitter at 250Kbps
1 Transmitter at full Data Rate
2 Transmitters at 15.5 Kbps
2 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
All Transmitters loades 3K + Load Cap
0
0
0
500 1000
2000 3000 4000 5000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 7. Slew Rate VS. Load Capacitance for the
SP3243B
Figure 8. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3243B
25
20
15
6
TxOUT +
4
2
0
10
1 Transmitter at 250Kbps
-2
2 Transmitters at 15.6Kbps
5
All drivers loaded with 3K // 1000pF
-4
TxOUT -
0
-6
2.7
3
3.5
4
4.5
5
2.7
3
3.5
4
4.5
5
Supply Voltage (V
)
DC
Supply Voltage (V
)
DC
Figure 9. Supply Current VS. Supply Voltage for the
SP3243B
Figure 10. Transmitter Output Voltage VS. Supply
Voltage for the SP3243B
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
5
PIN NUMBER
SP3243B
SOIC, SSOP,
SP3243BCR
MLPQ
NAME
FUNCTION
SP3223B
TSSOP
EN
Receiver Enable. Apply logic LOW for normal operation.
1
-
-
Apply logic HIGH to disable the receiver outputs (high-Z state).
C1+
V+
Positive terminal of the voltage doubler charge-pump capacitor.
Regulated +5.5V output generated by the charge pump.
Negative terminal of the voltage doubler charge-pump capacitor.
Positive terminal of the inverting charge-pump capacitor.
Negative terminal of the inverting charge-pump capacitor.
Regulated -5.5V output generated by the charge pump.
RS-232 receiver input.
2
3
28
27
24
1
28
26
22
29
31
32
2
C1-
4
C2+
5
C2-
6
2
V-
7
3
R1IN
16
9
4
R2IN
RS-232 receiver input.
5
3
R3IN
RS-232 receiver input.
-
6
4
R4IN
RS-232 receiver input.
-
7
5
R5IN
RS-232 receiver input.
-
8
6
R1OUT
R2OUT
R2OUT
R3OUT
R4OUT
R5OUT
STATUS
T1IN
TTL/CMOS receiver output.
15
10
-
19
18
20
17
16
15
21
14
13
12
23
17
16
18
15
14
13
19
12
11
10
21
TTL/CMOS receiver output.
Non-inverting receiver-2 output, active in shutdown.
TTL/CMOS receiver output.
-
TTL/CMOS receiver output.
-
TTL/CMOS receiver output.
-
TTL/CMOS Output indicating online and shutdown status.
TTL/CMOS driver input.
11
13
12
-
T2IN
TTL/CMOS driver input.
T3IN
TTL/CMOS driver input.
ONLINE
Apply logic HIGH to override Auto-Online circuitry keeping
drivers active (SHUTDOWN must also be logic HIGH,
refer to Table 2).
14
T1OUT
T2OUT
T3OUT
GND
RS-232 driver output.
RS-232 driver output.
RS-232 driver output.
Ground.
17
8
9
7
8
10
11
25
26
22
-
9
18
19
20
23
25
20
VCC
+3.0V to +5.5V supply voltage.
SHUTDOWN Apply logic LOW to shut down drivers and charge pump.
This overrides all AUTO ON-LINE® circuitry and ONLINE
(refer to Table 2).
NC
No Connection
-
-
1,24,27,30
Table 1. Device Pin Description
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
6
1
2
3
4
5
6
7
28
27
26
C2+
C2-
C1+
V+
EN
1
2
3
4
5
6
7
20
SHUTDOWN
V
CC
19
C1+
V+
V
CC
V-
GND
18
25 GND
R1IN
R2IN
R3IN
C1-
T1OUT
R1IN
17
SP3223B 16
15
24
C1-
C2+
C2-
V-
SP3243B
23
ONLINE
R1OUT
22
21
20
19
R4IN
SHUTDOWN
STATUS
R2OUT
14
13
ONLINE
T1IN
8
9
R5IN
T1OUT
T2OUT
T3OUT
T2OUT
R2IN
8
9
12 T2IN
10
11
R1OUT
10
R2OUT
STATUS
11
18 R2OUT
17
T3IN 12
R3OUT
13
14
16
T2IN
T1IN
R4OUT
15
R5OUT
Figure 12. SP3243B Pinout Configuration
Figure 11. SP3223B Pinout Configuration
1
2
3
4
5
6
7
8
24
NC
NC
GND
C1-
ONLINE
SHUTDOWN
STATUS
23
R IN
1
®®
22
21
20
19
18
17
R IN
2
R IN
3
R IN
4
R IN
SP3243B
5
T OUT
T OUT
R OUT
1
2
R OUT
1
2
Figure 13. SP3243B MLPQ Pinout Configuration
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
7
+3.3V to +5V
+
19
CC
0.1µF
0.1µF
C5
C1
V
2
3
7
C1+
V+
V-
+
+
+
0.1µF
0.1µF
C3
C4
4
5
C1-
C2+
SP3223B
+
C2
0.1µF
6
13
12
C2-
T1OUT
T1IN
17
8
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T2IN
T2OUT
R1OUT
R1IN
15
10
16
9
5kΩ
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R2OUT
EN
R2IN
5kΩ
1
VCC
20
SHUTDOWN
14
11
ONLINE
STATUS
To µP Supervisor
Circuit
GND
18
Figure 14. SP3223B Typical Operating Circuit
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
8
V
CC
+
26
0.1µF
0.1µF
C5
C1
V
CC
28
27
3
C1+
V+
V-
+
+
+
0.1µF
0.1µF
C3
C4
24
1
C1-
C2+
SP3243B
+
C2
0.1µF
2
14
13
C2-
T1IN
T1OUT
9
T2OUT
T3OUT
T2IN
T3IN
10
11
RS-232
TTL/CMOS
INPUTS
OUTPUTS
12
R2OUT
R1OUT
20
19
R1IN
R2IN
4
5
5kΩ
R2OUT
R3OUT
R4OUT
R5OUT
18
17
16
15
5kΩ
TTL/CMOS
OUTPUTS
R3IN
R4IN
R5IN
6
7
8
RS-232
INPUTS
5kΩ
5kΩ
5kΩ
VCC
22
23
SHUTDOWN
ONLINE
To µP Supervisor
21
STATUS
Circuit
GND
25
Figure 15. SP3243B Typical Operating Circuit
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
9
DESCRIPTION
The SP3223B and SP3243B transceivers meet
the EIA/TIA-232 and ITU-T V.28/V.24 com-
munication protocols and can be implemented
in battery-powered, portable, or hand-held ap-
plications such as notebook or palmtop comput-
ers. TheSP3223BandSP3243Bdevicesfeature
Sipex's proprietary and patented (U.S.--
5,306,954) on-board charge pump circuitry that
generates ±5.5V RS-232 voltage levels from a
single +3.0V to +5.5V power supply. The
SP3223B and SP3243B devices can operate at a
data rate of 250kbps fully loaded.
The SP3223B and SP3243B series is an ideal
choiceforpowersensitivedesigns.TheSP3223B
andSP3243BdevicesfeatureAUTOON-LINE
®
circuitry which reduces the power supply drain
to a 1µA supply current. In many portable or
hand-held applications, an RS-232 cable can be
disconnected or a connected peripheral can be
turned off. Under these conditions, the internal
charge pump and the drivers will be shut down.
Otherwise, the system automatically comes
online. This feature allows design engineers to
address power saving concerns without major
design changes.
The SP3223B is a 2-driver/2-receiver device,
and the SP3243B is a 3-driver/5-receiver device
ideal for portable or hand-held applications.
The SP3243B includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
THEORY OF OPERATION
The SP3223B and SP3243B series is made up
of four basic circuit blocks:
1. Drivers,
2. Receivers,
3. the Sipex proprietary charge pump, and
®
4. AUTO ON-LINE circuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232F and all
previous RS-232 versions. Unused driver inputs
V
CC
+
+
26
0.1µF
0.1µF
C5
C1
V
CC
28
27
3
C1+
V+
+
+
C3
C4
0.1µF
0.1µF
24
1
C1-
C2+
SP3243B
V-
+
C2
0.1µF
2
14
13
C2-
T
1OUT
T1IN
9
TxD
RTS
DTR
T2OUT
T
2IN
3IN
10
11
RS-232
OUTPUTS
T
3OUT
T
12
R2OUT
20
19
UART
or
Serial µC
R1IN
R1OUT
4
5
RxD
CTS
5KΩ
R
2IN
R2OUT
18
17
16
15
5KΩ
should be connected to GND or VCC
.
R3OUT
R3IN
DSR
DCD
RI
6
7
8
RS-232
INPUTS
5KΩ
5KΩ
5KΩ
R4OUT
R
4IN
5IN
The drivers can guarantee a data rate of 250kbps
fully loaded with 3kΩ in parallel with 1000pF,
ensuring compatibility with PC-to-PC commu-
nication software.
R5OUT
R
VCC
22
23
SHUTDOWN
ONLINE
21
STATUS
GND
25
µP
Supervisor
IC
V
RESET
IN
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
Figure 16. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
10
+3V to +5V
DEVICE: SP3223B
+
0.1µF
0.1µF
C5
C1
VCC
SHUTDOWN
EN
TXOUT RXOUT
High Z Active
High Z High Z
C1+
V+
V-
+
+
+
C3
C4
0.1µF
0.1µF
C1-
0
0
1
1
0
1
0
1
C2+
SP3223B
SP3243B
+
C2
0.1µF
C2-
T1OUT
T1IN
Active
Active
Active
High Z
TTL/CMOS
INPUTS
TXIN
TXOUT
R1OUT
R1IN
TTL/CMOS
OUTPUTS
5kΩ
DEVICE: SP3243B
R
XOUT
RXIN
SHUTDOWN
TXOUT RXOUT R2OUT
5kΩ
1000pF
1000pF
EN
VCC
0
1
High Z High Z
Active Active
Active
Active
SHUTDOWN
ONLINE
STATUS
To µP Supervisor
Circuit
GND
18
Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE® Mode where ONLINE =
GND and SHUTDOWN = VCC, the device will shut down
if there is no activity present at the Receiver inputs.
Figure 17. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
wasactiveat250kbpsandallthreedriversloaded
withanRS-232receiverinparallelwitha1000pF
capacitor. A solid RS-232 data transmission
rateof250kbpsprovidescompatibilitywithmany
designs in personal computer peripherals and
LAN applications.
The SP3223B and SP3243B drivers can main-
tain high data rates up to 250kbps fully loaded.
Figure 17. shows a loopback test circuit used to
test the SP3243B RS-232 Drivers. Figure 18
showsthetestresultsoftheloopbackcircuitwith
all three drivers active at 120kbps with typical
RS-232 loads in parallel with 1000pF capacitors.
Figure19 shows the test results where one driver
Receivers
The receivers convert ±5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. All
receivers have an inverting output that can be
disabled by using the EN pin.
Figure 18. Loopback Test Circuit All Drivers at 120kbps
Figure 19. Loopback Test Circuit One Driver at 250kbps
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
11
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. Thisoscillatorcontrolsthefourphases
of the voltage shifting. A description of each
phase follows.
®
ReceiversareactivewhentheAUTOON-LINE
circuitry is enabled or when in shutdown.
Duringtheshutdown, thereceiverswillcontinue
to be active. If there is no activity present at the
receivers for a period longer than 100µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1µA.
DrivingENtoalogicHIGHforcestheoutputsof
the receivers into high-impedance. The truth
table logic of the SP3223B and SP3243B driver
and receiver outputs can be found in Table 2.
Phase 1
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
+
C1 and C2 are initially charged to VCC. Cl is
–
then switched to GND and the charge in C1 is
TheSP3243Bincludesanadditionalnon-invert-
ing receiver with an output R2OUT. R2OUT is
an extra output that remains active and monitors
activity while the other receiver outputs are
forced into high impedance. This allows Ring
Indicator (RI) from a peripheral to be monitored
without forward biasing the TTL/CMOS inputs
of the other devices connected to the receiver
outputs.
–
+
transferred to C2 . Since C2 is connected to
VCC, the voltage potential across capacitor C2 is
now 2 times VCC
.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
haveatypicalhysteresismarginof300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, aninternal 5KΩpulldownresistor
to ground will commit the output of the receiver
to a HIGH state.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
Charge Pump
+
side of capacitor C2. Since C2 is at VCC, the
voltage potential across C2 is 2 times VCC
.
The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
12
+
–
Since both V and V are separately generated
The clock rate for the charge pump typically
operatesat250kHz. Theexternalcapacitorscan
be as low as 0.1µF with a 16V breakdown
voltage rating.
+
–
from VCC, in a no–load condition V and V will
besymmetrical. Olderchargepumpapproaches
that generate V from V will show a decrease in
the magnitude of V compared to V due to the
–
+
–
+
inherent inefficiencies in the design.
S
H
U
T
+2.7V
0V
-2.7V
RECEIVER
RS-232 INPUT
VOLTAGES
D
O
W
N
VCC
STATUS
0V
t
STSL
t
STSH
t
ONLINE
+5V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
-5V
Figure 20. AUTO ON-LINE® Timing Waveforms
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
13
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure 21. Charge Pump — Phase 1
V
= +5V
CC
C
4
+
–
3
V
Storage Capacitor
Storage Capacitor
DD
SS
+
+
C
C
2
1
–
–
+
–
V
C
–10V
Figure 22. Charge Pump — Phase 2
[
T
]
+6V
a) C2+
T
T
0V
0V
1
2
2
b) C2-
-6V
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V
Figure 23. Charge Pump Waveforms
V
= +5V
CC
C
+5V
4
+
–
+
V
V
Storage Capacitor
Storage Capacitor
DD
SS
+
–
+
–
C
C
2
1
–
C
–5V
–5V
3
Figure 24. Charge Pump — Phase 3
V
= +5V
CC
C
+10V
4
+
–
+
V
Storage Capacitor
Storage Capacitor
DD
+
–
+
–
C
C
2
1
–
V
SS
C
3
Figure 25. Charge Pump — Phase 4
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
14
6
4
Vout+
Vout-
2
0
-2
-4
-6
Load Current Per Transmitter [mA]
Figure 26. SP3243B Driver Output Voltages vs. Load
Current per Transmitter
V
CC
+
26
0.1µF
0.1µF
C5
C1
VCC
28
27
3
C1+
V+
V-
+
+
+
C3
C4
0.1µF
0.1µF
24
1
C1-
SP3243B
C2+
+
C2
0.1µF
2
14
13
C2-
T1IN
T1OUT
T2OUT
T3OUT
9
T2IN
T3IN
10
11
12
R2OUT
R1OUT
20
19
R1IN
R2IN
R3IN
R4IN
R5IN
4
5
5kΩ
R2OUT
R3OUT
R4OUT
R5OUT
18
17
16
15
5kΩ
6
7
8
5kΩ
5kΩ
5kΩ
DB-9
Connector
V
CC
22
23
SHUTDOWN
ONLINE
1
2
3
4
5
6
To µP Supervisor
21
STATUS
Circuit
GND
25
7
8
9
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
Figure 27. Circuit for the connectivity of the SP3243B with a DB-9 connector
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
15
RS - 232 SIGNAL
AT RECEIVER
INPUT
SHUTDOWN
INPUT
ONLINE INPUT
STATUS OUTPUT
TRANCEIVER
STATUS
YES
HIGH
LOW
HIGH
Normal Operation
(AUTO ON-LINE®)
NO
NO
HIGH
HIGH
HIGH
LOW
LOW
LOW
Normal Operation
Sutdown
(AUTO ON-LINE®
Shutdown
)
YES
NO
LOW
LOW
HIGH/LOW
HIGH/LOW
HIGH
LOW
Shutdown
Table 3. AUTO ON-LINE® Logic
R INACT
X
Inactive Detection Block
RS-232
Receiver Block
R OUT
X
R IN
X
Figure 28. Stage I of AUTO ON-LINE® Circuitry
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
STATUS
R1INACT
R4INACT
R5INACT
R2INACT
R3INACT
SHUTDOWN
Figure 29. Stage II of AUTO ON-LINE® Circuitry
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
16
receiver's RXINACT signals with an accumu-
lated delay that disables the device to a 1µA
supply current.
®
AUTO ON-LINE Circuitry
The SP3223B and SP3243B devices have a
patent pending AUTO ON-LINE circuitry on
board that saves power in applications such as
laptop computers, palmtop (PDA) computers,
and other portable systems.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmitters
are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is
around 20µs.
®
TheSP3223BandSP3243Bdevicesincorporate
an AUTO ON-LINE circuit that automatically
When the SP3223B and SP3243B drivers or
internal charge pump are disabled, the supply
current is reduced to 1µA. This can commonly
occurinhand-heldorportableapplicationswhere
the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.
®
enables itself when the external transmitters are
enabled and the cable is connected. Conversely,
®
the AUTO ON-LINE circuit also disables most
of the internal circuitry when the device is not
being used and goes into a standby mode where
the device typically draws 1µA. This function
canalsobeexternallycontrolledbytheONLINE
pin. When this pin is tied to a logic LOW, the
®
TheAUTOON-LINE modecanbedisabledby
theSHUTDOWNpin. IfthispinisalogicLOW,
®
the AUTO ON-LINE function will not operate
®
AUTO ON-LINE function is active. Once
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
active, the device is enabled until there is no
activity on the receiver inputs. The receiver
input typically sees at least ±3V, which are
generated from the transmitters at the other end
of the cable with a ±5V minimum. When the
external transmitters are disabled or the cable is
disconnected, the receiver inputs will be pulled
down by their internal 5kΩ resistors to ground.
When this occurs over a period of time, the
internal transmitters will be disabled and the
device goes into a shutdown or standby mode.
®
LINE operatingmodes. Thetruthtablelogicof
the SP3223B and SP3243B driver and receiver
outputs can be found in Table 2.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
When the SP3223B and SP3243B devices
are shut down, the charge pumps are turned off.
V+ charge pump output decays to VCC, the
V- output decays to GND. The decay time will
depend on the size of capacitors used for the
charge pump. Once in shutdown, the time
required to exit the shut down state and have
valid V+ and V- levels is typically 200µs.
®
WhenONLINEisHIGH,theAUTOON-LINE
mode is disabled.
®
The AUTO ON-LINE circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
The first stage, shown in Figure 28, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
For easy programming, the STATUS can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE circuitry so
this connection acts like a shutdown input pin.
®
®
The second stage of the AUTO ON-LINE cir-
cuitry, shown in Figure 29, processes all the
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
17
ESD TOLERANCE
The SP3223B/3243B series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients.
The Human Body Model has been the generally
acceptedESDtestingmethodforsemiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electrostatic energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 30. This method will test the
IC’s capability to withstand an ESD transient
duringnormalhandlingsuchasinmanufacturing
areaswheretheICstendtobehandledfrequently.
FortheHumanBodyModel, thecurrentlimiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ and 100pF, respectively.
R
R
S
S
R
R
C
C
SW2
SW2
SW1
SW1
Device
Under
Test
DC Power
Source
C
C
S
S
Figure 30. ESD Test Circuit for Human Body Model
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
18
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1
E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
(0.381min.)
D
A = 0.210" max.
(5.334 max).
C
A2
Ø
L
B1
B
e = 0.300 BSC
e = 0.100 BSC
(2.540 BSC)
A
(7.620 BSC)
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
28–PIN
16–PIN
20–PIN
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
A2
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
B
0.045/0.070
0.045/0.070
0.045/0.070
B1
C
(1.143/1.778)
(1.143/1.778)
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
1.385/1.454
(35.17/36.90)
0.780/0.800
0.980/1.060
D
(19.812/20.320) (24.892/26.924)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
E
0.240/0.280
0.240/0.280
0.240/0.280
E1
L
(6.096/7.112)
(6.096/7.112)
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
Ø
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
19
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
16–PIN
24–PIN
20–PIN
28–PIN
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
A
A1
B
D
E
0.068/0.078
(1.73/1.99)
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.317/0.328
(8.07/8.33)
0.278/0.289
(7.07/7.33)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
e
0.0256 BSC
(0.65 BSC)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
H
L
0.301/0.311
(7.65/7.90)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
0°/8°
(0°/8°)
Ø
0°/8°
(0°/8°)
0°/8°
(0°/8°)
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
20
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
E
H
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
28–PIN
A
A1
B
D
E
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.697/0.713
(17.70/18.09)
0.291/0.299
(7.402/7.600)
e
0.050 BSC
(1.270 BSC)
H
L
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
Ø
0°/8°
(0°/8°)
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
21
PACKAGE: PLASTIC THIN
SMALL OUTLINE
(TSSOP)
DIMENSIONS
in inches (mm) Minimum/Maximum
Symbol
20 Lead
28 Lead
D
0.252/0.260 0.378/0.386
(6.40/6.60) (9.60/9.80)
e
0.026 BSC 0.026 BSC
(0.65 BSC) (0.65 BSC)
e
0.126 BSC (3.2 BSC)
0.252 BSC (6.4 BSC)
1.0 OIA
0.169 (4.30)
0.177 (4.50)
0.039 (1.0)
0’-8’ 12’REF
e/2
0.039 (1.0)
0.043 (1.10) Max
D
0.033 (0.85)
0.037 (0.95)
0.007 (0.19)
0.012 (0.30)
0.002 (0.05)
0.006 (0.15)
(θ2)
0.008 (0.20)
0.004 (0.09) Min
0.004 (0.09) Min
Gage
Plane
(θ3)
0.020 (0.50)
0.026 (0.75)
(θ1)
0.010 (0.25)
1.0 REF
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
22
PACKAGE: MLPQ
D
D/2
Index Area
(D/2 x E/2)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
32–PIN
A
(0.032/0.039)
(0.80/1.00)
b
(0.007/0.012)
(0.18/0.30)
D
(0.197)
(5.00 BSC)
D2
E
(0.132/0.140)
(3.35/3.55)
TOP VIEW
SIDE VIEW
(0.197)
(5.00 BSC)
E2
e
(0.132/0.140)
(3.35/3.55)
Seating
Plane
(0.020)
(0.50 BSC)
L
(0.012/0.020)
(0.30/0.50)
D2
D2/2
N
(1.260)
(32)
ND
NE
(0.315)
(8)
(0.315)
(8)
Exposed pad
NXb
(ND - 1) x e
BOTTOM VIEW
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
23
ORDERING INFORMATION
Model
Temperature Range
Package Types
SP3223BCP ...................................................... 0°C to +70°C -------------------------------------------- 20-pin PDIP
SP3223BCA ...................................................... 0°C to +70°C -------------------------------------------20-pin SSOP
SP3223BCY ...................................................... 0°C to +70°C ----------------------------------------- 20-pin TSSOP
SP3223BEP..................................................... -40°C to +85°C ------------------------------------------- 20-pin PDIP
SP3223BEA..................................................... -40°C to +85°C ------------------------------------------20-pin SSOP
SP3223BEY..................................................... -40°C to +85°C ---------------------------------------- 20-pin TSSOP
SP3243BCT....................................................... 0°C to +70°C ------------------------------------ 28-pin Wide SOIC
SP3243BCA ...................................................... 0°C to +70°C -------------------------------------------28-pin SSOP
SP3243BCY ..................................................... -0°C to +70°C ----------------------------------------- 28-pin TSSOP
SP3243BCR ..................................................... -0°C to +70°C ------------------------------------------ 32-pin MLPQ
SP3243BET ..................................................... -40°C to +85°C ----------------------------------- 28-pin Wide SOIC
SP3243BEA..................................................... -40°C to +85°C ------------------------------------------28-pin SSOP
SP3243BEY..................................................... -40°C to +85°C ---------------------------------------- 28-pin TSSOP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
ANALOG EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev. 6/30/03
SP3223B/3243B +3.0V to +5.5V RS-232 Transceivers
© Copyright 2003 Sipex Corporation
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