LCX021 [SONY]
4.1cm (1.6-inch) LCD Panel (with microlens); 4.1厘米（ 1.6英寸）的液晶面板（带微透镜）
| 型号： | LCX021 |
| 厂家： | 
SONY CORPORATION |
| 描述： | 4.1cm (1.6-inch) LCD Panel (with microlens) |
| 文件： | 总24页 (文件大小：317K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LCX021AM
4.1cm (1.6-inch) LCD Panel (with microlens)
For the availability of this product, please contact the sales office.
Description
The LCX021AM is a 4.1cm diagonal active matrix
TFT-LCD panel addressed by polycrystalline silicon
super thin film transistors with built-in peripheral driving
circuit. This panel allows full-color representation
without color filters through the use of a microlens.
The striped arrangement suitable for data projectors
is capable of displaying fine text and vertical lines.
The adoption of an advanced on-chip black matrix
realizes high picture quality by incorporating a high
luminance screen, cross-talk free and ghost free
circuits.
This panel has a polysilicon TFT high-speed
scanner and built-in function to display images
up/down and/or right/left inverse. The built-in 5V
interface circuit leads to lower voltage of timing and
control signals.
The panel contains an active area variable circuit
1
which supports SVGA 4:3/PC98 8:5 data signals
by changing the active area according to the type of
input signal.
1 "PC98" is a trademark of NEC Corporation.
Features
• The number of active dots: 1,456,000 (1.6-inch; 4.1cm in diagonal)
• Supports SVGA (804 × 3 × 604) and PC98 1 (804 × 3 × 500)
• Effective aperture ratio: 70% (reference value)
• Built-in cross talk free and ghost free circuits
• High contrast ratio with normally white mode: 150 (typ.)
• Built-in H and V drivers (built-in input level conversion circuit, 5V driving possible)
• Up/down and/or right/left inverse display function
Element Structure
• Dots: 804 × 3 (H) × 604 (V) = 1,456,848
• Built-in peripheral driver using polycrystalline silicon super thin film transistors
Applications
• Liquid crystal data projectors
• Liquid crystal projectors
• Liquid crystal rear projection TV, etc.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E98501A94-PS
LCX021AM
M O C
6 R G I S
5 R G I S
4 R G I S
3 R G I S
2 R G I S
1 R G I S
6 G G I S
5 G G I S
4 G G I S
3 G G I S
2 G G I S
1 G G I S
6 B G I S
5 B G I S
4 B G I S
3 B G I S
2 B G I S
1 B G I S
) g n i n n a c S l a n o i t c e r i d i B (
r e t s i g e R t f i h S V
t i u c r i C l o r t n o C e m a r F k c a l B
T S E T
S S V
D D V V
D D V H
E D O M
G C P
T S V
K C V
B N E
K L B
t i u c r i C l o r t n o C
e g r a h c e r P
2 K C H
t i u c r i C l o r t n o C e m a r F k c a l B
1 K C H
T S H
) g n i n n a c S l a n o i t c e r i d i B (
r e t s i g e R t f i h S V
N W D
T G R
t i u c r i C l o r t n o C n o i s r e v n I
t f e L / t h g i R r o / d n a n w o D / p U
R G I S P
G G I S P
B G I S P
– 2 –
LCX021AM
Absolute Maximum Ratings (VSS = 0V)
• H driver supply voltage
• V driver supply voltage
• Common pad voltage
HVDD
VVDD
COM
–1.0 to +20
–1.0 to +20
–1.0 to +17
–1.0 to +17
V
V
V
V
• H shift register input pin voltage HST, HCK1, HCK2,
RGT
• V shift register input pin voltage VST, VCK, PCG,
BLK, ENB, DWN, MODE
–1.0 to +17
–1.0 to +15
V
V
• Video signal input pin voltage
SIGB1, SIGB2, SIGB3, SIGB4,
SIGB5, SIGB6, SIGG1, SIGG2,
SIGG3, SIGG4, SIGG5, SIGG6,
SIGR1, SIGR2, SIGR3, SIGR4,
SIGR5, SIGR6, PSIGB, PSIGG,
PSIGR
• Operating temperature
• Storage temperature
Topr
–10 to +70
–30 to +85
°C
°C
Tstg
Operating Conditions (VSS = 0V)
• Supply voltage
HVDD
VVDD
15.5 ± 0.5V
15.5 ± 0.5V
• Input pulse voltage (Vp-p of all input pins except video signal and uniformity improvement signal input pins)
Vin 5.0 ± 0.5V
– 3 –
LCX021AM
Pin Description
Pin
Pin
No.
Symbol
No.
Description
Leave this pin open.
Leave this pin open.
Symbol
SIGR4
Description
Video signal R4 to panel
Video signal R5 to panel
Video signal R6 to panel
1
2
NC
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
NC
SIGR5
SIGR6
HVDD
RGT
HST
Blue uniformity improvement
signal
3
PSIGB
PSIGG
PSIGR
SIGB1
SIGB2
SIGB3
SIGB4
SIGB5
SIGB6
SIGG1
SIGG2
SIGG3
SIGG4
SIGG5
SIGG6
SIGR1
SIGR2
SIGR3
Green uniformity improvement
signal
4
Power supply for H driver
Drive direction pulse for V shift
register (H: normal, L: reverse)
Red uniformity improvement
signal
5
Start pulse for H shift register
drive
6
Video signal B1 to panel
Video signal B2 to panel
Video signal B3 to panel
Video signal B4 to panel
Video signal B5 to panel
Video signal B6 to panel
Video signal G1 to panel
Video signal G2 to panel
Video signal G3 to panel
Video signal G4 to panel
Video signal G5 to panel
Video signal G6 to panel
Video signal R1 to panel
Video signal R2 to panel
Video signal R3 to panel
Clock pulse 1 for H shift register
drive
7
HCK1
HCK2
VSS
Clock pulse 2 for H shift register
drive
8
9
GND (H, V drivers)
10
11
12
13
14
15
16
17
18
19
20
BLK
Black frame display pulse
Enable pulse for gate selection
ENB
Clock pulse for V shift register
drive
VCK
Start pulse for V shift register
drive
VST
Drive direction pulse for V shift
register (H: normal, L: reverse)
DWN
PCG
MODE
VVDD
TEST
COM
NC
Improvement pulse for uniformity
Display area switching
(H: SVGA, L: PC98)
Power supply for V driver
Test; Open
Common voltage of panel
Leave this pin open.
Note) RGB video signals of Pins 6 to 23 is an example. The order of RGB can be changed.
– 4 –
LCX021AM
Input Equivalent Circuit
To prevent static charges, protective diodes are provided for each pin except the power supplies. In addition,
protective resistors are added to all pins except video signal inputs. All pins are connected to VSS with a high
resistor of 1MΩ (typ.). The equivalent circuit of each input pin is shown below: (The resistor value: typ.)
(1) SIGB1, SIGB2, SIGB3, SIGB4, SIGB5, SIGB6, SIGG1, SIGG2, SIGG3, SIGG4, SIGG5, SIGG6,
SIGR1, SIGR2, SIGR3, SIGR4, SIGR5, SIGR6, PSIGB, PSIGG, PSIGR
HVDD
Input
1MΩ
Signal line
(2) HCK1, HCK2
HVDD
250Ω
250Ω
250Ω
Level conversion circuit
(2-phase input)
250Ω
1MΩ
Input
1MΩ
HVDD
2.5kΩ
(3) RGT
2.5kΩ
Level conversion circuit
(single-phase input)
Input
Input
Input
1MΩ
(4) HST
HVDD
250Ω
250Ω
Level conversion circuit
(single-phase input)
1MΩ
(5) PCG, VCK
VVDD
250Ω
250Ω
Level conversion circuit
(single-phase input)
1MΩ
(6) VST, BLK, ENB, DWN, MODE
VVDD
2.5kΩ
2.5kΩ
Level conversion circuit
(single-phase input)
Input
1MΩ
VVDD
(7) COM
Input
LC
1MΩ
– 5 –
LCX021AM
Input Signals
1. Input signal voltage conditions (Vss = 0V)
Item
Symbol
VHIL
Min.
–0.5
4.5
Typ.
0.0
Max.
0.4
Unit
V
(Low)
(High)
H shift register input voltage
HST, HCK1, HCK2, RGT
5.0
5.5
V
VHIH
VVIL
V shift register input voltage
MODE, BLK, VST, VCK,
PCG, ENB, DWN
–0.5
4.5
0.0
5.0
0.4
5.5
V
V
(Low)
(High)
VVIH
6.8
7.0
7.0
7.2
Video signal center voltage
VVC
Vsig
V
V
V
1
VVC – 4.5
VVC + 4.5
Video signal input range
2
VVC – 0.5 VVC – 0.4 VVC – 0.3
VVC ± 4.3 VVC ± 4.5 VVC ± 4.7
Common voltage of panel
Vcom
Uniformity improvement signal input
voltage (PSIGB, PSIGG, PSIGR)
Vpsig
V
3
1
Video input signal shall be symmetrical to VVC.
2
3
The typical value of the common pad voltage may lower its suitable voltage according to the set
construction to use. In this case, use the voltage of which has maximum contrast as typical value. When the
typical value is lowered, the maximum and minimum values may lower.
Input a uniformity improvement signals PSIGB, PSIGG and PSIGR in the same polarity with video signals
SIGB1 to 6, SIGG1 to 6 and SIGR1 to 6 and which is symmetrical to VVC. Also, the rising and falling of
PSIGB, PSIGG and PSIGR are synchronized with the rising of PCG pulse, and the rise time trPSIG and fall
time tfPSIG are suppressed within 800ns (as shown in a diagram below).
PSIGB, PSIGG and PSIGR may change its suitable input voltage according to the drive conditions.
Uniformity Improvement Signals PSIGB, PSIGG and PSIGR Input Waveform
90%
VVC
PSIGB, G, R
10%
trPSIG
tfPSIG
PCG
Level Conversion Circuit
The LCX021AM has a built-in level conversion circuit in the clock input unit on the panel. The input signal level
increases to HVDD or VVDD. The VCC of external ICs are applicable to 5 ± 0.5V.
– 6 –
LCX021AM
2. Clock timing conditions (Ta = 25°C)
(SVGA mode: fHCKn = 4.0MHz, fVCK = 24.0kHz)
Item
Symbol
trHst
Min.
—
Typ.
—
Max.
30
Unit
Hst rise time
tfHst
—
—
30
Hst fall time
HST
tdHst
thHst
trHckn
tfHckn
to1Hck
to2Hck
trVst
50
50
—
60
60
—
70
Hst data set-up time
70
Hst data hold time
4
30
Hckn rise time
ns
4
—
—
30
Hckn fall time
HCK
–15
–15
—
0
15
Hck1 fall to Hck2 rise time
0
15
Hck1 rise to Hck2 fall time
Vst rise time
—
100
100
15
tfVst
—
—
Vst fall time
VST
tdVst
thVst
trVck
tfVck
5
10
10
—
Vst data set-up time
µs
Vst data hold time
5
15
Vck rise time
VCK
—
100
100
100
100
—
Vck fall time
—
—
Enb rise time
Enb fall time
trEnb
tfEnb
toEnb
—
—
—
—
Vck rise/fall to Enb rise time
400
900
630
—
500
1000
700
—
ENB
Horizontal video period completed to Enb fall time tdEnb
—
ns
Enb fall to Pcg rise time
Pcg rise time
toPcg
trPcg
tfPcg
toVck
twPcg
trBlk
—
30
Pcg fall time
—
—
30
PCG
BLK
Pcg rise to Vck rise/fall time
Pcg pulse width
Blk rise time
0
1000
1200
—
1100
1300
100
100
2
1100
—
Blk fall time
tfBlk
—
—
Blk fall to Vst rise time
Blk pulse width
toVst
twBlk
1
—
line
1
—
—
4 Hckn means Hck1 and Hck2.
– 7 –
LCX021AM
<Horizontal Shift Register Driving Waveform>
Item
Symbol
trHst
Waveform
Conditions
90%
90%
3
• Hckn
Hst rise time
duty cycle 50%
to1Hck = 0ns
to2Hck = 0ns
Hst
10%
50%
10%
tfHst
Hst fall time
tfHst
trHst
5
HST
50%
Hst data set-up time
tdHst
Hst
3
• Hckn
duty cycle 50%
to1Hck = 0ns
to2Hck = 0ns
Hck1
50%
50%
thHst
Hst data hold time
thHst
tdHst
90%
10%
90%
10%
3
3
Hckn rise time
trHckn
tfHckn
• Hckn
3
duty cycle 50%
to1Hck = 0ns
to2Hck = 0ns
Hckn
3
Hckn fall time
trHckn
tfHckn
HCK
5
50%
50%
Hck1
Hck1 fall to Hck2 rise time to1Hck
Hck1 rise to Hck2 fall time to2Hck
50%
50%
Hck2
to2Hck
to1Hck
5
Definitions: The right-pointing arrow (
) means +.
The left-pointing arrow (
) means –.
) indicates the start of measurement.
The black dot at an arrow (
– 8 –
LCX021AM
<Vertical Shift Register Driving Waveform>
Item
Symbol
trVst
Waveform
Conditions
90%
90%
Vst rise time
Vst
10%
50%
10%
50%
Vst fall time
tfVst
trVst
tfVst
5
VST
Vst data set-up time
tdVst
Vst
50%
50%
Vck
Vck
Vst data hold time
thVst
tdVst
thVst
90%
10%
90%
10%
Vck rise time
Vck fall time
Enb rise time
Enb fall time
trVck
tfVck
trEnb
tfEnb
VCK
trVckn
tfVckn
90%
90%
10% 10%
Enb
tfEn
trEn
Horizontal
video period
Horizontal blanking period
50%
ENB
Vck rise/fall to Enb rise
time
toEnb
twEnb
Vck
Enb
50%
50%
tdEnb
toEnb
toPcg
Enb pulse width
5
Pcg
Pcg rise time
Pcg fall time
trPcg
tfPcg
Vck
50%
toVck
50%
6
Pcg rise to Vck rise/fall
time
PCG
toVck
trPcg
50%
twPcg
Pcg
Pcg pulse width
5
Blk rise time
Blk fall time
twBlk
tfBlk
Vst
50%
BLK
toVst
twBlk
Blk fall to Vst rise time
Blk pulse width
Blk
50%
50%
toVst
twBlk
5
6
Input the pulse obtained by taking the OR of the above pulse (PCG) and BLK to the PCG input pin.
– 9 –
LCX021AM
Electrical Characteristics (Ta = 25°C, HVDD = 15.5V, VVDD = 15.5V)
1. Horizontal drivers
Item
Symbol Min.
Typ. Max. Unit
Conditions
Input pin capacitance
HCKn
HST
CHckn
CHst
—
—
12
12
17
17
—
pF
pF
µA
µA
µA
µA
pF
mA
Input pin current
HCK1
HCK2
HST
–500 –250
–1000 –300
–500 –150
HCK1 = GND
—
HCK2 = GND
HST = GND
RGT = GND
—
RGT
–150
—
–30
120
—
Video signal input pin capacitance
Current consumption
Csig
IH
170
—
15.0 20.0
HCKn: HCK1, HCK2 (4.0MHz)
2. Vertical drivers
Item
Symbol Min. Typ. Max. Unit
Conditions
Input pin capacitance
VCK
VST
VCK
CVck
CVst
—
—
12
12
17
17
—
pF
pF
µA
Input pin current
–1000 –150
–150 –30
VCK = GND
PCG, VST, ENB, DWN,
BLK, MODE = GND
PCG, VST, ENB, DWN, BLK, MODE
Current consumption
—
µA
IV
—
3.0
6.0
mA
VCK: (24.0kHz)
3. Total power consumption of the panel
Item
Symbol Min. Typ. Max. Unit
PWR 250 400 mW
Total power consumption of the
panel (SVGA)
—
4. Pin input resistance
Item
Symbol Min. Typ. Max. Unit
Rpin 0.4 MΩ
Pin – VSS input resistance
1
—
5. Uniformity improvement signal
Item
Symbol Min. Typ. Max. Unit
Input pin capacitance for uniformity
improvement signal
—
CPSIGo
10
15
nF
– 10 –
LCX021AM
Electro-optical Characteristics
Item
(SVGA mode)
Symbol Measurement method Min. Typ. Max. Unit
Contrast ratio
25°C
25°C
—
%
1
2
CR
100
—
150
70
—
—
Effective apeature ratio
Teff
RV90-25
GV90-25
BV90-25
RV90-60
GV90-60
BV90-60
RV50-25
GV50-25
BV50-25
RV50-60
GV50-60
BV50-60
RV10-25
GV10-25
BV10-25
RV10-60
GV10-60
BV10-60
ton0
1.3
1.4
1.5
1.3
1.3
1.4
1.7
1.8
1.9
1.7
1.7
1.8
2.3
2.4
2.5
2.3
2.3
2.3
—
1.6
1.8
1.9
1.6
1.7
1.8
2.0
2.1
2.2
1.9
2.0
2.1
2.6
2.7
2.8
2.5
2.6
2.7
30
2.0
2.2
2.3
1.9
2.0
2.2
2.3
2.4
2.5
2.2
2.3
2.4
2.9
3.0
3.1
2.8
2.9
3.0
80
25°C
60°C
25°C
60°C
25°C
60°C
V90
V-T
V50
3
V
characteristics
V10
0°C
25°C
0°C
ON time
Response time
ton25
toff0
—
12
40
4
ms
—
100
30
200
70
OFF time
25°C
60°C
25°C
25°C
toff25
F
—
Flicker
5
6
7
dB
s
—
–65
—
–40
—
Image retention time
Cross talk
YT60
—
%
CTK
—
—
5
Reflection Preventive Processing
When a phase substrate which rotates the polarization axis is used to adjust to the polarization direction of a
polarization screen or prism, use a phase substrate with reflection preventive processing on the surface. This
prevents characteristic deterioration caused by luminous reflection.
– 11 –
LCX021AM
<Electro-optical Characteristics Measurement>
Basic measurement conditions
(1) Driving voltage
(6) Optical measurement systems
HVDD = 15.5V, VVDD = 15.5V,
VVC = 7.0V, Vcom = 6.6V
• Measurement system I
(2) Measurement temperature
25°C unless otherwise specified.
(3) Measurement point
G
R
B
Relay lens system
Dichroic mirrors
One point in the center of the screen
unless otherwise specified.
(4) Measurement systems
LCD panel
Two types of measurement systems
are used as shown below.
Fresnel lens
Elliptic mirror
(5) Video input signal voltage (Vsig)
Vsig = 7.0 ± VAC [V]
(VAC: signal amplitude)
100W lamp angle distribution
Projection lenses
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Screen
0.0
1.0
2.0
3.0
3.5
4.0
Panel incident light dispersion angle [ ° ]
• Measurement system II
Optical fiber
Measurement
Equipment
Light receptor lens
Light Detector
LCD panel
Drive Circuit
Light
Source
1. Contrast ratio
Contrast Ratio (CR) is given by the following formula (1).
L (White)
L (Black)
CR =
... (1)
L (White): Surface luminance of the TFT-LCD panel at the input signal amplitude VAC = 0.5V
L (Black): Surface luminance of the panel at VAC = 4.5V
Both luminosities are measured by System I.
– 12 –
LCX021AM
2. Effective aperture ratio
Measure the luminances below on the screen in System I, and calculate the effective aperture ratio using
the following formula (2).
Luminance for panel with microlens
× (TFT aperture ratio) × 100 [%] ... (2)
Luminance for panel without microlens
3. V-T characteristics
V-T characteristics, or the relationship between signal
amplitude and the transmittance of the panels, are
measured by System II by inputting the same signal
amplitude VAC to each input pin. V90, V50, and V10
correspond to the voltages which define 90%, 50%,
and 10% of transmittance respectively.
90
50
10
The angles of incidence for R, G and B are as shown in
the diagram below.
V90 V50 V10
VAC – Signal amplitude [V]
Red: Center: Vertical
Left
Green: Left:
6.0 ± 0.5°
Center
Right
Blue: Right: 6.0 ± 0.5°
Optimum angle of incidence
6.0 ± 0.5°
Optimum angle of incidence
6.0 ± 0.5°
Pad
4. Response time
Input signal voltage (Waveform applied to the measured pixels)
Response time ton and toff are defined by
formulas (3) and (4) respectively.
ton = t1 – tON ...(3)
4.5V
7.0V
0.5V
toff = t2 – tOFF ...(4)
t1: time which gives 10% transmittance of
the panel.
0V
t2: time which gives 90% transmittance of
the panel.
The relationships between t1, t2, tON and
tOFF are shown in the right figure.
Optical transmittance output waveform
100%
90%
10%
0%
tON t1
ton
tOFF t2
toff
– 13 –
LCX021AM
5. Flicker
Flicker (F) is given by the formula (5). DC and AC (SVGA:30Hz, rms) components of the panel output signal
for gray raster mode are measured by a DC voltmeter and a spectrum analyzer in system II.
AC component
DC component
Each input signal voltage for gray raster mode
is given by Vsig = 7.0 ± V50 [V]
F [dB] = 20log
...(5)
{
}
where: V50 is the signal amplitude which gives
50% of transmittance in V-T characteristics.
6. Image retention time
Apply the monoscope signal to the LCD panel for 60 minutes and then change this signal to the gray scale
of Vsig = 7.0 ± VAC (VAC: 3 to 4V). Judging by sight at the VAC that holds the maximum image retention,
measure the time till the residual image becomes indistinct.
Black level
Monoscope signal conditions:
Vsig = 7.0 ± 4.5 or ± 2.0 [V]
4.5V
White level
(shown in the right figure)
Vcom = 6.6V
2.0V
7.0V
0V
2.0V
4.5V
Vsig waveform
7. Cross talk
Cross talk is determined by the luminance differences between adjacent areas represented by Wi' and
Wi (i = 1 to 4) around a black window (Vsig = 4.5V/1V).
Wi' – Wi
Cross talk value CTK =
× 100 [%]
Wi
W1'
W3'
W1
W3
W2
W2'
W4
W4'
– 14 –
LCX021AM
Viewing Angle Characteristics (Typical Value)
90
Phi
0
180
10
30
50
70 Theta
270
θ0°
Z
θ
φ90°
Marking
Y
φ
φ0°
φ180°
X
φ270°
Measurement method
– 15 –
LCX021AM
s t o d 6 0 6
)
m m 6 4 . 4 2 e v i t c e f f e ( s t o d 4 0 6
t o d 1
t o d 1
– 16 –
LCX021AM
2. LCD panel operations
[Description of basic operations]
• A vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse
to every 604 gate lines sequentially in a single horizontal scanning period (in SVGA mode).
• A horizontal driver, which consists of horizontal shift registers, gates and CMOS sample-and-hold circuits,
applies selected pulses to every 804 × 3 signal electrodes sequentially in a single horizontal scanning period.
These pulses are used to supply the sampled video signal to the row signal lines.
• Vertical and horizontal shift registers address one pixel, and then turn on Thin Film Transistors (TFTs; two
TFTs) to apply a video signal to the dot. The same procedures lead to the entire 604 × 804 × 3 dots to
display a picture in a single vertical scanning period.
• The data and video signals shall be input with the 1H-inverted system.
[Description of operating mode]
This LCD panel can change the active area by displaying a black frame to support various computer or video
signals. The active area is switched by MODE. However, the center of the screen is not changed. The active
area setting modes are shown below.
MODE
H
Display mode
SVGA
804 × 3 × 604
PC98
804 × 3 × 500
L
This LCD panel has the following functions to easily apply to various uses, as well as various broadcasting
systems.
• Right/left inverse mode
• Up/down inverse mode
These modes are controlled by two signals (RGT and DWN). The right/left and/or up/down setting modes are
shown below:
RGT
H
Mode
Right scan
Left scan
DWN
Mode
Down scan
Up scan
H
L
L
Right/left and/or up/down mean the direction when the Pin 1 marking is located at the right side with the pin
block upside.
To locate the active area in the center of the panel in each mode, polarity of the start pulse and clock phase for
both the H and V systems must be varied. The phase relationship between the start pulse and the clock for
each mode is shown on the following pages.
– 17 –
LCX021AM
(1) Vertical direction display cycle
(1.1) SVGA
VD
VST (DWN = H)
VST (DWN = L)
VCK
1
2
3
4
601 602 603 604
Vertical display cycle 604H
(1.2) PC98
VD
VST (DWN = H)
VST (DWN = L)
1
2
3
4
VCK
497 498 499 500
Vertical display cycle 500H
(2) Horizontal direction display cycle
(2.1) SVGA/PC98, RGT = H
HD
HST
1
2
3
4
130 131 132 133 134
HCK1
HCK2
Horizontal display cycle
(2.2) SVGA/PC98, RGT = L
HD
HST
1
2
3
4
130 131 132 133 134
HCK1
HCK2
Horizontal display cycle
– 18 –
LCX021AM
3. 18-dot simultaneous sampling
The horizontal shift register samples SIGB1 to SIGB6, SUGG1 to SIGG6 and SIGR1 to SIGR6 signals
simultaneously. This requires phase matching between signals SIGB1 to SIGB6, SIGG1 to SIGG6 and SIGR1
to SIGR6 to prevent the horizontal resolution from deteriorating. Thus phase matching between each signal is
required using an external signal delaying circuit before applying the video signal to the LCD panel.
The block diagram of the delaying procedure using simple-and-hold method is as follows. The following phase
relationship diagram indicates the phase setting for right scan (RGT = High level). For left scan (RGT = Low
level), the phase settings for signals SIGB1 to SIGB6, SIGG1 to SIGG6 and SIGR1 to SIGR6 are exactly
reversed.
SIGB1, SIGG1, SIGR1
SIGB2, SIGG2, SIGR2
SIGB1, SIGG1, SIGR1
SIGB2, SIGG2, SIGR2
S/H
S/H
S/H
CK1
S/H
CK2
SIGB3, SIGG3, SIGR3
SIGB4, SIGG4, SIGR4
SIGB3, SIGG3, SIGR3
SIGB4, SIGG4, SIGR4
S/H
S/H
S/H
CK3
S/H
CK4
SIGB5, SIGG5, SIGR5
SIGB6, SIGG6, SIGR6
SIGB5, SIGG5, SIGR5
SIGB6, SIGG6, SIGR6
S/H
S/H
CK5
S/H
CK6
<Phase relationship of delaying sample-and-hold pulses> (right scan)
HCKn
CK1
CK2
CK3
CK4
CK5
CK6
– 19 –
LCX021AM
Display System Block Diagram
An example of display system is shown below.
R
CXA2112R
CXA2112R
CXA2112R
R
G
G
B
CXA2111R
LCX021AM
B
MCK
HSYNC
PLL
FRP
CXD2464R
TIMING PULSE
VSYNC
– 20 –
LCX021AM
Optical Characteristics
1. Microlens outline
The LCX021AM has a single built-in microlens on the substrate side facing the TFT for the three TFT panel
picture elements. This microlens serves the following purposes.
(1) The microlens converges the incident light striking the LCD panel to the dot aperture in order to improve
the effective aperture ratio and increase the display brightness.
(2) The microlens provides a color representation by distributing the light flux for each of the three primary
colors R, G and B which strike the panel at different angles to the dot apertures corresponding to each
color.
This allows the light utilization efficiency to be improved by eliminating the light absorption by the color filter,
which had been unavoidable with conventional single panel projectors.
2. Recommended lighting conditions
In order to bring out the full light converging effects of the microlens and provide a color representation with
high color purity, the following lighting is recommended.
(1) The incident light angle of the three primary colors should be as shown in the figure below. The center
light should strike the panel from the panel normal direction, and the left and right light from angles
inclined to the right and left of the panel normal direction. The design optimal angle of incidence is the
range of 6.0 ± 0.5°. However, the optimal angle of incidence may be altered slightly depending on the
panel. Be sure to allow adjustment of the mutual angles of the dichroic mirrors so that the angle of
incidence can be varied within the range of 6.0 ± 0.5°.
Left
Center
Right
Optimum angle of incidence
6.0 ± 0.5°
Optimum angle of incidence
6.0 ± 0.5°
Pad
(2) Effective light: The normal direction (center light), left light and right light noted above should strike the
panel at an angle of ±3.5° or less. Light with a dispersion angle greater than this value will
strike adjoining dot apertures and cause the color purity to worsen. (See the incident angle
distribution for System Ι.)
3. Recommended projection optical system
The maximum egress light angle for light passing through the LCD is approximately ±17°. Therefore, setting
the F stop of the projection lens to about 1.7 is recommended in order to maximize the light converging effects
of the microlens and provide a representation with excellent color balance. If the projection lens F stop is larger
than this value, the right and left light are kicked accordingly by the projection lens, thereby reducing the
egress light flux to the screen and the same time shifting the white balance.
– 21 –
LCX021AM
Notes on Operation
(1) Lighting spectrum and intensity
Use only visible light with a wavelength λ = 415 to 780nm as a light source. Light with a wavelength λ >
780nm (infrared light) will produce unwanted temperature rises. Light with a wavelength λ < 415nm
(ultraviolet light) will produce irreversible changes in the display characteristics. To prevent this, be sure to
mount UV/IR cut filters between the LCX021AM and the light source as necessary depending on the light
source.
The lighting intensity should be 1 million lx or less, and the panel surface temperature should not exceed
55°C.
(2) Lighting optical system
Care should be taken for the following points concerning the optical system mounted on the LCX021AM.
1) Light reflected from the optical system to the panel should be 20,000 lx or less.
2) Particular care should be taken for the panel incident angle distribution when designing optical systems
for use with the LCX021AM.
3) The panel surface temperature distribution should not exceed 10°C.
4) Light should shine only on the effective display area within the LCD panel and not on other unnecessary
locations. Leakage light may produce unwanted temperature rises.
– 22 –
LCX021AM
Notes on Handling
(1) Static charge prevention
Be sure to take the following protective measures. TFT-LCD panels are easily damaged by static charges.
a) Use non-chargeable gloves, or simply use bare hands.
b) Use an earth-band when handling.
c) Do not touch any electrodes of a panel.
d) Wear non-chargeable clothes and conductive shoes.
e) Install conductive mats on the working floor and working table.
f) Keep panels away from any charged materials.
g) Use ionized air to discharge the panels.
(2) Protection from dust and dirt
a) Operate in a clean environment.
b) When delivered, a surface of a panel (glass panel) is covered by a protective sheet.
Peel off the protective sheet carefully not to damage the glass panel.
c) Do not touch the surface of the glass panel. The surface is easily scratched. When cleaning, use a
clean-room wiper with isopropyl alcohol. Be careful not to leave a stain on the surface.
d) Use ionized air to blow off dust at the glass panel.
(3) Other handling precautions
a) Do not twist or bend the flexible PC board especially at the connecting region because the board is
easily deformed.
b) Do not drop a panel.
c) Do not twist or bend a panel or panel frame.
d) Keep a panel away from heat source.
e) Do not dampen a panel with water or other solvents.
f) Avoid to store or to use a panel in a high temperature or in a high humidity, which may result in panel
damages.
g) Minimum radius of bending curvature for a flexible substrate must be 1mm.
h) Torque required to tighten screws on a panel must be 3kg · cm or less.
i) Use appropriate filter to protect a panel.
j) Do not pressure the portion other than mounting hole (cover).
– 23 –
LCX021AM
Package Outline
Unit: mm
(5.1)
Thickness of the connector 0.3 ± 0.05
3
2
3
1
4
6
5
6
Polarizing
Axis
Incident
light
Active Area
7
2.5H9 × 3.0
φ2.5H9
8-φ2.5 ± 0.1
(28.5)
(32.56)
5.5 ± 0.2
51.0 ± 0.2
12.22 ± 0.25
57.0 ± 0.2
62.0 ± 0.2
2.5 ± 0.2
No
1
Description
F P C
P 0.5 × 39 = 19.5 ± 0.1
0.5 ± 0.1
+ 0.04
2
Reinforcing board
Molding material
Reinforcing material
Outside frame
0.35 – 0.03
PIN1
PIN40
3
4
5
6
Glass
electrode (enlarged)
7
Polarizing film
The rotation angle of the active area relative to H and V is ± 1°.
weight 48g
– 24 –
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