SS6383AG [SSC]

2A DDR Termination Regulator; 2A DDR终端稳压器


型号：	SS6383AG
厂家：	SILICON STANDARD CORP.
描述：	2A DDR Termination Regulator 2A DDR终端稳压器稳压器双倍数据速率
文件：	总7页 (文件大小：751K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SS6383A(G)

2A DDR Termination Regulator

FEATURES

DESCRIPTION

Source and sink current capability of 2A

The SS6383A linear regulator is designed to

provide 2A source and sink current while

regulating an output voltage to within 20mV.

Low output voltage offset, ±20mV

High accuracy output voltage at full-load

V_OUTadjustable by external resistors

Low external component count

Current limit protection

The SS6383A converts voltage supplies ranging

from 1.6V to 6V into an output voltage that

is set by two external voltage-divider resistors.

It provides an excellent voltage source for

active termination schemes for high-speed

transmission lines such as those seen in high-

speed memory buses.

Thermal protection

SO-8 and TO-252-5 packages

APPLICATIONS

Mother Boards

The built-in current-limiting in source and sink

mode, together with thermal shutdown, provides

maximum protection to the SS6383A against

fault conditions.

Graphic Cards

DDR Termination Voltage Supply - supports

DDR1 (1.25V_TT), DDR2 (0.9V_TT), and meets

JEDEC SSTL-2 and SSTL-3 term. specifications

TYPICAL APPLICATION CIRCUIT

V_IN=2.5V

VIN

VOUT

VREF

V_OUT

C_IN

470µF

C_OUT

220µF

100K

GND

VCNTL

100K

100pF

V_CNTL=3.3V

SSM7002EN

SS6383ACE5

C_CNTL

47µF

This device is available with Pb-free lead finish (second-level interconnect) as SS6383AGxx

11/07/2004 Rev.2.01

www.SiliconStandard.com

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SS6383A(G)

ORDERING INFORMATION

PIN CONFIGURATION

SS6383AXXX XX

TO-252-5

TOP VIEW

1: VIN

Packing

TR: Tape and reel

2: GND

1 2 3 4 5

3. VCNTL

Package type

4. VREF

CE5: TO-252-5, commercial

GE5: TO-252-5, Pb-free, commercial

CS: SO-8, commercial

5: VOUT

SO-8

GS: SO-8, Pb-free, commercial

TOP VIEW

VCNTL

VIN

Example:

SS6383AGE5TR

VCNTL

GND

VREF

VOUT

ꢀ in TO-252-5 package, Pb-free lead finish,

shipped on tape and reel

ABSOLUTE MAXIMUM RATINGS

Supply Voltage

-0.4V to 7V

-40°C~85°C

-65°C ~150°C

260°C

Operating Temperature Range

Storage Temperature Range

Lead Temperature (Solder, 10sec)

Thermal Resistance θ_JC

TO-252

12.5°C /W

40°C /W

SO-8

100°C /W

160°C /W

Thermal Resistance θ_JA

TO-252

SO-8

(Assumes no ambient airflow, no heatsink)

Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

11/07/2004 Rev.2.01

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SS6383A(G)

TEST CIRCUIT

2.5V

3.3V

VIN

VOUT

VREF

OUT

GND

OUT

10µF

1.25V

VCNTL

SS6383ACE5

ELECTRICAL CHARACTERISTICS

(V_CNTL=3.3V, V_IN=2.5V, V_REF=0.5V_IN, C_OUT=10µF, T_A=25°C, unless otherwise specified)

PARAMETER

TEST CONDITIONS

SYMBOL

V_IN

MIN.

1.6

TYP.

2.5/1.8

3.3

MAX.

UNIT

Keep V_CNTL≥V_INduring

Input Voltage (DDR1/2)

power on and off sequences

V_CNTL

V_OUT

V_OS

3.0

Output Voltage

I_OUT= 0mA

V_REF

Output Voltage Offset

I_{OUT = 0mA}

-20

I_OUT=0.1mA ~ +2A

I_OUT=0.1mA ~ -2A

V_REF<0.2V, V_{OUT = OFF}

Load Regulation (DDR1/2)

∆V_LOR

Quiescent Current

I_Q

µA

Operating Current of V_CNTLNo load

I_CNTL

V_REFBias Current

Current Limit

V_REF=1.25V

I_IL

2.2

4.5

THERMAL PROTECTION

Thermal Shutdown

Temperature

3.3V≤V_CNTL≤5V

T_SD

125

0.8

150

°C

Thermal Shutdown

Hysteresis

Guaranteed by design

SHUTDOWN SPECIFICATIONS

Output ON (V_REF=0Vꢀ1.25V)

Output OFF (V_REF=1.25Vꢀ0V)

Shutdown Threshold

0.2

Note 2: V_OSis the voltage measurement, which is defined as the difference between V_OUTand V_REF.

Note 3: Load regulation is measured at constant junction temperature, using pulse testing with a low ON time.

Note 4: Current limit is measured by pulsing a short time.

Note 5: To operate the system safely; V_CNTLmust be always greater than V_IN.

Note 6: Specifications are guaranteed by Statistical Quality Controls (SQC), and not production tested,

within the operating temperature range of -40°C to 85°C.

11/07/2004 Rev.2.01

www.SiliconStandard.com

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SS6383A(G)

TYPICAL PERFORMANCE CHARACTERISTICS

0.52

0.48

0.44

0.40

0.36

0.32

0.52

0.48

0.44

0.40

0.36

0.32

=3.3V

CNTL

=5V

CNTL

V =2.5V

100

120

-20

100

120

Temperatur⁶e⁰(°C)

Temperature (°C)

Fig. 1 Turn-On Threshold vs. Temp.

Fig. 2 Turn On Threshold vs. Temp.

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

V_CNTL=3.3V, V_IN=2.5V

V_OUT=1.25V

=3.3V

=2.5V

=1.25V

CNTL

REF

No Load

-40

^-20

100 120

-40

-20

100

120

Temperature (°C)

Fig. 4 Current-Limit (Sourcing) vs. Temp.

Fig. 3 Output Voltage Offset vs. Temp.

V_CNTL=3.3V, V_IN=2.5V

V_OUT=1.25V

-40

-20

100

120

Temperature (°C)

Fig. 5 Current Limit (Sinking) vs. Temp.

11/07/2004 Rev.2.01

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SS6383A(G)

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

V_CNTL=3.3V

V_IN=2.5V

V_CNT_L=3.3V,

V_IN=2.5V

V_REF=1.25V

_REF=1.25V

Fig.7 Output Short-Circuit (Sourcing)

Fig. 6

Output Short-Circuit (Sinking)

V_CNTL=3.3V

V_CNTL=3.3V,

V_IN=2.5V

V_IN=1.8V

V_REF=0.9V

V_REF=1.25V

Fig.8 Transient Response at 1.25V_TT/2A

Fig. 9 Transient Response at 0.9V_TT/2A

BLOCK DIAGRAM

VCNTL

VIN

Control

VOUT

VREF

Thermal

Current

Limit

Shutdown

VOUT

Shutdown

GND

11/07/2004 Rev.2.01

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SS6383A(G)

PIN DESCRIPTIONS (TO-252-5)

PIN 4: VREF - Reference voltage input. Pull

this pin low to shutdown device.

PIN 1: VIN

- Input supply pin. It provides

main power to create the

external reference voltage by

divider resistors for regulating

PIN 5: VOUT - Output pin.

V_{REF and VOUT}

PIN 2: GND - Ground pin.

PIN 3: VCNTL - Input supply pin. It is used to

supply all the internal control

circuitry.

APPLICATION INFORMATION

The large copper area shown at V_{CNTL pins is}

able to relieve the thermal dissipation. Using the

via to direct heat into the large copper area shown

on the bottom layer also helps significantly.

All capacitors should be placed as close as

possible to the relevant pins.

Layout Consideration

As the SS6383A is in SO-8 and TO-252-5

packages, it is unable to dissipate heat easily when

it operates at high current. To avoid exceeding

the maximum junction temperature, a suitable

copper area must be used.

Figure 10. Top layer

Figure 11. Bottom layer

Figure 12. Placement

11/07/2004 Rev.2.01

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SS6383A(G)

PHYSICAL DIMENSIONS

SO-8

SYMBOL

MIN

1.35

0.10

0.33

0.19

4.80

3.80

MAX

1.75

0.25

0.51

0.25

5.00

4.00

1.27(TYP)

5.80

0.40

6.20

1.27

TO-252-5

SYMBOL

MIN

2.19

MAX

2.38

0.13

5.46

0.58

5.59

6.73

5.21

0.46

5.33

6.35

1.27 BSC

9.40

1.4

10.41

1.78

2.67 REF

0.51 BSC

1.52

2.03

0°

8°

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no

guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no

responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its

use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including

without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to

the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of

Silicon Standard Corporation or any third parties.

11/07/2004 Rev.2.01

www.SiliconStandard.com

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