SS6383B [SSC]

3A DDR Termination Regulator; 3A DDR终端稳压器
SS6383B
型号: SS6383B
厂家: SILICON STANDARD CORP.    SILICON STANDARD CORP.
描述:

3A DDR Termination Regulator
3A DDR终端稳压器

稳压器 双倍数据速率
文件: 总8页 (文件大小:569K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SS6383B(G)  
3A DDR Termination Regulator  
FEATURES  
DESCRIPTION  
Source and sink current capability of 3A  
The SS6383B linear regulator is designed to  
provide 3A source and sink current while  
regulating an output voltage to within 45mV.  
Low output voltage offset, ±20mV  
High accuracy output voltage at full-load  
VOUT adjustable by external resistors  
Low external component count  
Current limit protection  
The SS6383B converts voltage supplies ranging  
from 1.6V to 6V into an output voltage that  
is set by two external voltage-divider resistors.  
It provides an excellent voltage source for  
active termination schemes for high-speed  
transmission lines such as those seen in high-  
speed memory buses.  
Thermal protection  
SO-8, TO-252-5 and TO-263-5 packages  
APPLICATIONS  
Mother Boards  
The built-in current-limiting in source and sink  
mode, together with thermal shutdown, provides  
maximum protection to the SS6383B against  
fault conditions.  
Graphic Cards  
DDR Termination Voltage Supply - supports  
DDR1 (1.25VTT), DDR2 (0.9VTT), and meets  
JEDEC SSTL-2 and SSTL-3 term. specifications  
TYPICAL APPLICATION CIRCUIT  
1
VIN=2.5V  
VIN  
5
4
VOUT  
VREF  
VOUT  
+
CIN  
470µF  
2
3
COUT  
220µF  
+
R1  
100K  
GND  
VCNTL  
R2  
100K  
C1  
100pF  
VCNTL=3.3V  
+
EN  
SSM7002EN  
SS6383BCE5  
CCNTL  
47µF  
This device is available with Pb-free lead finish (second-level interconnect) as SS6383BGxx  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
1 of 8  
SS6383B(G)  
ORDERING INFORMATION  
PIN CONFIGURATION  
SS6383BXXX XX  
TO-263-5  
FRONT VIEW  
Packing  
TR: Tape and reel  
1: VIN  
1 2 3 4 5  
2: GND  
Package type  
CM5: TO-263-5, commercial  
3. VCNTL  
4. VREF  
5: VOUT  
CE5 : TO-252-5, commercial  
CS : SO-8, commercial  
GM5 : TO-263-5, commercial, Pb-free  
GE5 : TO-252-5, commercial, Pb-free  
GS : SO-8, commercial, Pb-free  
TO-252-5  
TOP VIEW  
1: VIN  
2: GND  
1 2 3 4 5  
3. VCNTL  
4. VREF  
5: VOUT  
Example:  
SS6383BGE5TR  
in TO-252-5 package, with Pb-free lead finish,  
shipped on tape and reel  
SO-8  
TOP VIEW  
1
VCNTL  
VCNTL  
VCNTL  
VCNTL  
VIN  
8
7
6
2
3
GND  
VREF  
VOUT  
5
4
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage  
-0.4V to 7V  
-40°C~85°C  
Operating Temperature Range  
Storage Temperature Range  
Lead Temperature (Solder, 10sec)  
-65°C ~150°C  
260°C  
Thermal Resistance θJC  
TO-263  
TO-252  
SO-8  
3°C /W  
12.5°C /W  
40°C /W  
Thermal Resistance θJA  
TO-263  
TO-252  
SO-8  
60°C /W  
100°C /W  
160°C /W  
(Assume no ambient airflow, no heatsink)  
Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
2 of 8  
SS6383B(G)  
TEST CIRCUIT  
1
2
3
2.5V  
3.3V  
VIN  
5
4
VOUT  
VREF  
V
OUT  
+
GND  
C
OUT  
10µF  
1.25V  
VCNTL  
SS6383B  
ELECTRICAL CHARACTERISTICS  
(VCNTL=3.3V, VIN=2.5V, VREF=0.5VIN, COUT=10µF, TA=25°C, unless otherwise specified)  
PARAMETER  
TEST CONDITIONS  
SYMBOL  
VIN  
MIN.  
1.6  
TYP.  
2.5  
MAX.  
UNIT  
6
6
Keep VCNTLVIN during  
Input Voltage (DDR1/2)  
V
power on and off sequences  
VCNTL  
VOUT  
VOS  
3.0  
3.3  
Output Voltage  
IOUT = 0mA  
VREF  
V
Output Voltage Offset  
IOUT = 0mA  
-20  
20  
45  
45  
30  
10  
1
mV  
IOUT =0.1mA ~ +3A  
IOUT =0.1mA ~ -3A  
VREF<0.2V, VOUT = OFF  
35  
35  
8
Load Regulation (DDR1/2)  
VLOR  
mV  
Quiescent Current  
IQ  
µA  
mA  
µA  
A
Operating Current of VCNTL No load  
ICNTL  
3
VREF Bias Current  
Current Limit  
VREF=1.25V  
0
IIL  
3.2  
4
6.5  
THERMAL PROTECTION  
Thermal Shutdown  
Temperature  
3.3VVCNTL5V  
TSD  
125  
0.8  
150  
30  
°C  
°C  
Thermal Shutdown  
Hysteresis  
Guaranteed by design  
SHUTDOWN SPECIFICATIONS  
Output ON (VREF=0V1.25V)  
Output OFF (VREF=1.25V0V)  
Shutdown Threshold  
V
0.2  
Note 2: VOS is the voltage measurement, which is defined as the difference between VOUT and VREF.  
Note 3: Load regulation is measured at constant junction temperature, using pulse testing with a low ON time.  
Note 4: Current limit is measured by pulsing a short time.  
Note 5: To operate the system safely; VCNTL must be always greater than VIN.  
Note 6: Specifications are guaranteed by Statistical Quality Controls (SQC), and not production tested,  
within the operating temperature range of -40°C to 85°C.  
Note 7: DDR2 is not supported in the TO-263 package.  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
3 of 8  
SS6383B(G)  
TYPICAL PERFORMANCE CHARACTERISTICS  
0.52  
0.48  
0.44  
0.40  
0.36  
0.32  
0.52  
0.48  
0.44  
0.40  
0.36  
0.32  
V
=3.3V  
CNTL  
V
=5V  
CNTL  
V =2.5V  
IN  
V =2.5V  
IN  
40  
20  
0
20  
40  
60  
80  
100  
120  
-20  
0
20  
40  
60  
80  
100  
120  
120  
120  
Temperature (°C)  
Fig. 1 Turn-On Threshold vs. Temp.  
Temperature (°C)  
Fig. 2 Turn On Threshold vs. Temp.  
6
5
4
3
2
V
CNTL  
=3.3V  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
V
V
V
=3.3V  
CNTL  
V
V
=2.5V  
IN  
=2.5V  
IN  
=1.25V  
REF  
=1.25V  
REF  
No Load  
-40  
-20  
0
20  
40  
60  
80  
100  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
Temperature (°C)  
Fig. 3 Output Voltage Offset vs. Temp.  
Temperature (°C)  
Fig. 4 Current-Limit (Sourcing) vs. Temp.  
6
5
4
3
2
V
=3.3V  
CNTL  
V
V
V
=3.3V  
CNTL  
V
=2.5V, V =1.25V  
IN REF  
=2.5V  
IN  
=1.25V  
REF  
V
, 50mV/div  
OUT  
I
OUT, 2A/div  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (°C)  
Fig. 5 Current-Limit (Sinking) vs. Temp.  
Fig. 6 Transient Response at 1.25VTT/3A  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
4 of 8  
SS6383B(G)  
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)  
V
V
V
=3.3V  
CNTL  
V
V
V
=3.3V  
CNTL  
=2.5V  
IN  
=2.5V  
IN  
=1.25V  
REF  
=1.25V  
REF  
Iout, 2A/div  
Iout, 2A/div  
Fig. 7 Output Short-Circuit Protection (Sinking)  
Fig. 8 Output Short-Circuit Protection (Sourcing)  
BLOCK DIAGRAM  
VCNTL  
VIN  
+
Control  
-
VOUT  
VREF  
Thermal  
Current  
Limit  
Shutdown  
VOUT  
Shutdown  
GND  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
5 of 8  
SS6383B(G)  
PIN DESCRIPTIONS (Pin numbers refer to TO-252/263)  
PIN 4: VREF - Reference voltage input. Pull  
PIN 1: VIN  
- Input supply pin. It provides  
main power to create the  
external reference voltage by  
divider resistors for regulating  
this pin low to shutdown device.  
PIN 5: VOUT - Output pin.  
VREF and VOUT  
.
PIN 2: GND - Ground pin.  
PIN 3: VCNTL - Input supply pin. It is used to  
supply all the internal control  
circuitry.  
APPLICATION INFORMATION  
The large copper area shown at VCNTL pins is  
able to relieve the thermal dissipation. Using the  
via to direct heat into the large copper area shown  
on the bottom layer also helps significantly.  
All capacitors should be placed as close as  
possible to the relevant pins.  
Layout Consideration  
As the SS6383B is in either SO-8, TO-252-5 or  
TO-263-5 packages, it is unable to dissipate heat  
easily when it operates at high current. To avoid  
exceeding the maximum junction temperature,  
a suitable copper area must be used.  
Fig. 9 Top layer for SO-8  
Fig. 10 Bottom layer for SO-8  
Fig. 11 Placement for SO-8  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
6 of 8  
SS6383B(G)  
PHYSICAL DIMENSIONS  
TO-263-5  
SYMBOL  
MIN  
4.06  
0
MAX  
4.83  
0.15  
1.40  
9.65  
10.29  
A
E
c2  
A
A1  
C2  
D
L2  
1.14  
8.38  
9.65  
D
L
E
e
1.70 BSC  
L
14.61  
2.29  
15.88  
2.79  
1.40  
L1  
L2  
L4  
A
A
e
0.25 BSC  
θ
θ
0°  
8°  
Gauge  
Plane  
Seating  
Plane  
L1  
A1  
L4  
TO-252-5  
SYMBOL  
MIN  
2.19  
0
MAX  
2.38  
0.13  
5.46  
0.58  
5.59  
6.73  
E
A
A
A1  
b3  
c2  
D
b3  
c2  
5.21  
0.46  
5.33  
6.35  
L3  
D
H
E
e
1.27 BSC  
H
9.40  
1.4  
10.41  
1.78  
L
A
e
A
L1  
L2  
L3  
θ
2.67 REF  
0.51 BSC  
1.52  
2.03  
L
A1  
0°  
8°  
L2  
L1  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
7 of 8  
SS6383B(G)  
PHYSICAL DIMENSIONS (cont.)  
SO-8  
D
SYMBOL  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
A
A1  
B
H
E
C
D
E
e
e
1.27(TYP)  
A
H
L
5.80  
0.40  
6.20  
1.27  
C
B
L
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no  
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no  
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its  
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including  
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to  
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of  
Silicon Standard Corporation or any third parties.  
11/07/2004 Rev.2.01  
www.SiliconStandard.com  
8 of 8  

相关型号:

UL1042

UL1042 - Uk砤d zr體nowa縪nego mieszacza iloczynowego

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

ZXFV201

QUAD VIDEO AMPLIFIER

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX

ZXFV201N14

IC-SM-VIDEO AMP

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX

ZXFV201N14TA

QUAD VIDEO AMPLIFIER

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX

ZXFV201N14TC

QUAD VIDEO AMPLIFIER

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

ZXFV302N16

IC-SM-4:1 MUX SWITCH

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC

ZXFV4089

VIDEO AMPLIFIER WITH DC RESTORATION

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX