SS810-31GU [SSC]

3-Pin Microprocessor Reset Circuits; 3引脚微处理器复位电路


型号：	SS810-31GU
厂家：	SILICON STANDARD CORP.
描述：	3-Pin Microprocessor Reset Circuits 3引脚微处理器复位电路微处理器复位电路
文件：	总8页 (文件大小：307K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SS809/810G

3-Pin Microprocessor Reset Circuits

FEATURES

DESCRIPTION

Ultra-low supply current 1mA (typ.)

Guaranteed reset valid to Vcc=0.9V

Available in three output types:

Open-drain active low (SS809N-xxGx)

Push-pull active low (SS809-xxGx)

Push-pull active high (SS810-xxGx)

Power-on reset pulse width min. 140ms

Internally fixed threshold 2.3V, 2.6V, 2.9V, 3.1V,

4.0V, 4.4V, 4.6V

The SS809G and SS810G are low-power microprocessor

(µP) supervisory circuits used to monitor power supplies

in µP and digital systems. They improve circuit reliability

and reduce cost by eliminating external components.

These devices provide valid signals in applications

with Vcc ranging from 6.0V down to 0.9V. The reset

signal lasts for a minimum period of 140mswhenever the

VCC supply voltage falls below a preset threshold. Both

the SS809G and SS810G were designed with a reset

comparator to help identify invalid signals lasting less

than 140ms. The only difference between the two

devices is that one has an active-low RESET output

and the other an active-high RESET output.

Tight voltage threshold tolerance: 1.5%

Packaged in RoHS-compliant SOT-23-3

APPLICATIONS

l Notebook Computers

l Digital Still Cameras

l PDAs

l Critical Microprocessor Monitoring

Low supply current (1mA) makes the SS809G and SS810G

ideal for portable equipment. The devices are available in

a SOT-23-3 package.

TYPICAL APPLICATION CIRCUIT

VCC

SS809G

(SS810G)

RESET

INPUT

RESET

(RESET)

GND

Push-Pull Output

9/20/2006 Rev.3.01

www.SiliconStandard.com

1 of 8

SS809/810G

ORDERING INFORMATION

PIN CONFIGURATION

SS809X-XXGU XX

SS810 -XXGU XX

SOT-23-3

Packing type

TR: Tape and reel

TOP VIEW

1: GND

2: RESET (RESET)

3: VCC

Package type

GU: RoHS-compliant Pb-free SOT-23-3

Reset threshold voltage

23: 2.3V

26: 2.6V

29: 2.9V

31: 3.1V

40: 4.0V

44: 4.4V

46: 4.6V

Output type

Default: Push-Pull type

N: N-ch open-drain type

Example: SS809-31GU TR

à 3.1V, push-pull version in RoHS-compliant SOT-23-3 , shipped in tape and reel

SOT-23 Part Marking

Part No.

Marking

Part No.

Marking

Part No.

Marking

SS809-23GU

SS809-26GU

SS809-29GU

SS809-31GU

SS809-40GU

SS809-44GU

SS809-46GU

RA23P

RA26P

SS809N-23GU

SS809N-26GU

SS809N-29GU

SS809N-31GU

SS809N-40GU

SS809N-44GU

SS809N-46GU

RB23P

RB26P

SS810-23GU

SS810-26GU

SS810-29GU

SS810-31GU

SS810-40GU

SS810-44GU

SS810-46GU

RD23P

RD26P

RA29P

RA31P

RA40P

RA44P

RA46P

RB29P

RB31P

RB40P

RB44P

RB46P

RD29P

RD31P

RD40P

RD44P

RD46P

9/20/2006 Rev.3.01

www.SiliconStandard.com

2 of 8

SS809/810G

ABSOLUTE MAXIMUM RATINGS

V_CC

-0.3V ~6.5V

-0.3V ~ (VCC+0.3V)

20mA

RESET

RESET,

Input Current (V_CC

)

Output Current (RESET or RESET )

Continuous Power Dissipation (T_A= +70°C)

Operating Junction Temperature Range

Storage Temperature Range

20mA

320mW

-40°C ~ 85°C

- 65°C ~ 125°C

260°C

Lead Temperature (Soldering) 10 sec

Note1: Any stress beyond the Absolute Maximum Ratings above may cause permanent damage to the device.

TEST CIRCUIT

Vin

VCC

RESET

GND

Iin

SS809G

9/20/2006 Rev.3.01

www.SiliconStandard.com

3 of 8

SS809/810G

ELECTRICAL CHARACTERISTICS

(Typical values are at T_A=25°C, unless otherwise specified.)

PARAMETER

TEST CONDITIONS

MIN.

TYP. MAX. UNIT

SYMBOL

V_CC

Operating Voltage Range

Supply Current

0.9

I_CC

V_CC= V_TH+0.1V

T_A=+25°C

2.265

2.254

2.561

2.548

2.857

2.842

3.054

3.038

3.940

3.920

4.334

4.312

4.531

4.508

2.3

2.335

2.346

2.639

2.652

2.944

2.958

3.147

3.162

4.060

4.080

4.466

4.488

4.669

4.692

SS809-23

SS809-26

SS809-29

T_A= -40°C to +85°C

T_A=+25°C

2.6

2.9

3.1

4.0

4.4

4.6

T_A= -40°C to +85°C

T_A=+25°C

T_A= -40°C to +85°C

T_A=+25°C

Reset Threshold

V_THSS809-31

SS809-40

T_A= -40°C to +85°C

T_A=+25°C

T_A= -40°C to +85°C

T_A=+25°C

SS809-44

T_A= -40°C to +85°C

T_A=+25°C

SS809-46

T_A=-40°C to +85°C

V_CCto Reset Delay

T_RD

T_RP

V_CC=V_THto (V_TH-0.1V), V_TH=3.1V

T_A=+25°C

V_CC= V_{TH (MAX)}

140

100

230

560

Reset Active Timeout Period

T_A= -40°C to +85°C

1030

V_OHV_CC=V_TH+0.1V, I_SOURCE=1mA

V_OLV_CC=V_TH- 0.1V, I_SINK=1mA

0.8V_CC

RESET

Output Voltage

0.2Vcc

V_OH

V_OL

0.8V_CC

V_CC=V_TH-0.1V, I_SOURCE=1mA

V_CC=V_TH+0.1V, I_SINK=1mA

RESET Output Voltage

RESET

Note2:

output is for the SS809G; RESET output is for the SS810G.

Note3: Specifications for operating temperature ranges from -40°C to 85°C are guaranteed by Statistical Quality

Controls (SQC), with no production testing.

9/20/2006 Rev.3.01

www.SiliconStandard.com

4 of 8

SS809/810G

TYPICAL PERFORMANCE CHARACTERISTICS

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

120

110

100

V_TH=2.3V

V_OD=V_TH-V_CC

V_TH=3.1V

V_TH=4.6V

V_OD=50mV

V_OD=100mV

V_OD=200mV

-40

-20

100

-60

-40

-20

100

Temperature ( C)

Fig 1 Supply Current vs. Temperature

Fig 2 Power-Down Reset Delay vs. Temperature

240

220

200

180

160

140

120

100

V_TH=3.1V

V_TH=4.6V

V_OD=50mV

400

300

200

100

V_OD=V_TH-V_CC

V_OD=50mV

V_OD=100mV

V_OD=200mV

V_OD=100mV

V_OD=200mV

-60

-40

-20

100

-60

-40

-20

100

Temperature ( C)

Fig 3 Power-Down Reset Delay vs. Temperature

Fig 4 Power-Down Reset Delay vs. Temperature

600

500

400

300

200

100

1.015

1.010

1.005

1.000

0.995

0.990

0.985

V_TH=4.6V

V_TH=3.1V

V_TH=4.6V

V_TH=3.1V

V_TH=2.3V

-40

-20

100

-60

-40

-20

100

Temperature ( C)

Fig 5 Normalized Reset Threshold vs. Temperature

Fig 6 Power-Up Reset Timeout vs. Temperature

9/20/2006 Rev.3.01

www.SiliconStandard.com

5 of 8

SS809/810G

BLOCK DIAGRAM

VCC

Bandgap

RESET

Reset Generator

NMOS

GND

N-ch Open-Drain Type

VCC

Bandgap

Reset Generator

RESET

(RESET)

GND

Push-Pull Type

PIN DESCRIPTIONS

GND Pin

Ground.

RESET Pin (SS809G) : Active low output pin. RESET Output remains low while Vcc is below the reset

RESET Pin (SS810G)

Active high output pin. RESET output remains high while Vcc is below the reset threshold.

Supply voltage.

Vcc Pin

9/20/2006 Rev.3.01

www.SiliconStandard.com

6 of 8

SS809/810G

DETAILED DESCRIPTIONS OF TECHNICAL TERMS

threshold, and RESET remains low for the reset

RESET OUTPUT

timeout period.

The µP will be activated at a valid reset state. These

µP supervisory circuits assert reset to prevent code

execution errors during power-up, power-down, or

brownout conditions.

BENEFITS OF HIGHLY ACCURATE RESET

THRESHOLD

The SS809G and SS810G with specified voltage as 5V±

RESET is guaranteed to be a logic low for

10% or 3V±10% are ideal for systems using a 5V±5%

or 3V±5% power supply. The reset is guaranteed to

assert after the power supply falls out of regulation,

but before the power drops below the minimum

specified operating voltage range of the system ICs.

V_TH>V >0.9V. Once V

exceeds the reset

threshold, an internal timer keeps RESET low for

the reset timeout period; after this interval, RESET

goes high.

If a brownout condition occurs (V drops below the

The pre-trimmed thresholds reduce the range over

which an undesirable reset may occur.

RESET

reset threshold),

goes low. Any time V

goes below the reset threshold, the internal timer

RESET

resets to zero, and

goes low. The internal

timer is activated after V

returns above the reset

APPLICATION INFORMATION

NEGATIVE-GOING VCC TRANSIENTS

of 0.9V. However in applications where RESET

In addition to issuing a reset to the µP during

must be valid down to 0V, adding a pull-down resistor

RESET

causes any leakage currents to flow to

RESET

power-up, power-down, and brownout conditions, the

SS809G series are relatively resistant to short-duration

negative-going VCC transients.

ground, holding

low.

INTERFACING TO A MICROPROCESSOR WITH

BIDIRECTIONAL RESET PINS

ENSURING A VALID RESET OUTPUT DOWN TO

VCC=0

RESET

The

output on the SS809N is open drain,

and this device interfaces easily with µPs that have

bidirectional reset pins. Connecting the mP

When VCC falls below 0.9V, the SS809G RESET

output no longer sinks current; it becomes an open

circuit. In this case, high-impedance CMOS logic

RESET

supervisor’s

microcontroller’s

output directly to the

pin with a single pull-up

RESET

inputs connected to

can drift to

RESET

undetermined voltages. Therefore, the SS809G/810G

are perfect for most CMOS applications down to VCC

resistor allows either device to assert reset.

9/20/2006 Rev.3.01

www.SiliconStandard.com

7 of 8

SS809/810G

PHYSICAL DIMENSIONS

SOT-23-3 (unit: mm)

SYMBOL

MIN

1.00

—

MAX

1.30

0.10

0.70

0.35

0.10

2.70

1.40

0.90

0.50

0.25

3.10

1.80

1.90 (TYP)

2.60

0.37

1°

3.00

—

9°

Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no

guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no

responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its

use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including

without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to

the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of

Silicon Standard Corporation or any third parties.

9/20/2006 Rev.3.01

www.SiliconStandard.com

8 of 8

SS810-31GU [SSC]

相关型号：

SS810-40GU

SS810-44GU

SS810-46GU

SS8100

SS810B

SS810G

SS811

SS811-23CV

SS811-23CVTR

SS811-26CV

SS811-26CVTR

SS811-29CV