SSM20P02H [SSC]
P-CHANNEL ENHANCEMENT-MODE POWER MOSFET; P沟道增强型功率MOSFET
| 型号： | SSM20P02H |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | P-CHANNEL ENHANCEMENT-MODE POWER MOSFET |
| 文件： | 总6页 (文件大小：444K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SSM20P02H,J
P-CHANNEL ENHANCEMENT-MODE
POWER MOSFET
Simple drive requirement
2.5V gate drive capability
Fast switching
D
S
BVDSS
RDS(ON)
ID
-20V
52mΩ
-18A
G
Description
Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
G
D
S
TO-252(H)
ruggedized device design, low on-resistance and cost-effectiveness.
The TO-252 package is widely preferred for all commercial and
industrial surface mount applications and suited for low voltage
applications such as DC/DC converters. The through-hole version
(SSM20P02J) is available for low-profile applications.
G
D
TO-251(J)
S
Absolute Maximum Ratings
Symbol
Parameter
Rating
- 20
Units
VDS
VGS
Drain-Source Voltage
V
V
Gate-Source Voltage
± 12
Continuous Drain Current, VGS @ 10V
ID@TA=25℃
ID@TA=100℃
IDM
-18
A
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current1
-14
A
-50
A
PD@TA=25℃
Total Power Dissipation
31.25
0.25
W
Linear Derating Factor
W/℃
℃
℃
TSTG
TJ
Storage Temperature Range
Operating Junction Temperature Range
-55 to 150
-55 to 150
Thermal Data
Symbol
Parameter
Value
4.0
Unit
℃/W
℃/W
Rthj-c
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max.
Max.
Rthj-a
110
Rev.2.01 6/26/2003
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SSM20P02H,J
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol
BVDSS
Parameter
Test Conditions
VGS=0V, ID=-250uA
Min. Typ. Max. Units
Drain-Source Breakdown Voltage
-20
-
-0.03
-
-
-
V
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA
-
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance
VGS=-4.5V, ID=-8A
52 mΩ
85 mΩ
VGS=-2.5V, ID=-5A
VDS=VGS, ID=-250uA
VDS=-10V, ID=-8A
VDS=-20V, VGS=0V
VDS=-16V, VGS=0V
VGS= ± 12
-
-
-
VGS(th)
gfs
Gate Threshold Voltage
-0.5
-
-
V
Forward Transconductance
Drain-Source Leakage Current (T=25oC)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
-
S
IDSS
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
j
-1
Drain-Source Leakage Current (T=150oC)
-
-25
j
IGSS
Qg
±100
Gate-Source Leakage
Total Gate Charge2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time2
Rise Time
-
ID=-8A
13.5
2.1
1.6
12
20
45
27
1050
410
110
-
-
-
-
-
-
Qgs
Qgd
td(on)
tr
VDS=-16V
VGS=-4.5V
VDS=-10V
ID=-8A
td(off)
tf
Turn-off Delay Time
Fall Time
RG=3.3Ω,VGS=-4.5V
RD=1.25Ω
-
-
-
-
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VGS=0V
VDS=-16V
f=1.0MHz
Source-Drain Diode
Symbol
Parameter
Test Conditions
Min. Typ. Max. Units
A
A
V
IS
Continuous Source Current ( Body Diode )
Pulsed Source Current ( Body Diode )1
Forward On Voltage2
VD=VG=0V , VS=-1.2V
-
-
-
-
-
-
-10
-50
-1.2
ISM
VSD
Tj=25℃, IS=-10A, VGS=0V
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us , duty cycle <2%.
Rev.2.01 6/26/2003
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SSM20P02H,J
60
40
20
0
45
30
15
0
T C =150 o C
-4.5V
-4.0V
T C =25 o C
-4.5V
-4.0V
-3.5V
-3.5V
-3.0V
-3.0V
-2.5V
-2.5V
V
GS= -2.0V
V
GS= -2.0V
0
2
4
6
0
2.5
5
7.5
-V DS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2
160
120
80
I D = -8A
I D = -8A
V GS = -4.5V
T c =25 ℃
1.4
Ω
Ω
Ω
Ω
0.8
40
0
0.2
-50
0
50
100
150
0
3
6
9
12
T j , Junction Temperature ( o C)
-VGS (V)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
Rev.2.01 6/26/2003
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SSM20P02H,J
20
16
12
8
40
30
20
10
0
4
0
0
30
60
90
120
150
25
50
75
100
125
150
T c , Case Temperature ( o C)
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current v.s.
Case Temperature
Fig 6. Typical Power Dissipation
100
10
1
1
Duty Factor = 0.5
100us
0.2
0.1
0.1
0.05
0.02
1ms
PDM
t
0.01
T
10ms
Single Pulse
Duty Factor = t/T
Peak Tj = PDM x Rthjc + TC
T C =25 °C
100ms
DC
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
0.1
1
10
100
-VDS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 6/26/2003
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SSM20P02H,J
8
6
4
2
0
10000
1000
100
f=1.0MHz
I D = -8A
V DS = -16V
Ciss
Coss
Crss
10
0
5
10
15
20
1
7
13
19
-V DS (V)
Q G , Total Gate Charge (nC)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
10
1
1.2
0.9
0.6
0.3
0
T j =150 o C
T j =25 o C
0
0.2
0.5
0.8
1.1
1.4
-50
0
50
100
150
-VSD (V)
T j , Junction Temperature ( o C)
Fig 11. Forward Characteristic of
Reverse Diode
Fig 12. Gate Threshold Voltage v.s.
Junction Temperature
Rev.2.01 6/26/2003
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SSM20P02H,J
VDS
RD
90%
VDS
TO THE
D
S
OSCILLOSCOPE
0.5 x RATED VDS
RG
G
10%
VGS
VGS
-4.5 V
td(off)
td(on) tr
tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS
QG
TO THE
OSCILLOSCOPE
D
S
-4.5V
0.8 x RATED VDS
QGD
QGS
G
VGS
-1~-3mA
I
ID
G
Q
Charge
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
Rev.2.01 6/26/2003
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