SSM2316GN [SSC]
N-channel Enhancement-mode Power MOSFET; N沟道增强模式功率MOSFET
| 型号： | SSM2316GN |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | N-channel Enhancement-mode Power MOSFET |
| 文件： | 总5页 (文件大小：467K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SSM2316GN
N-channel Enhancement-mode Power MOSFET
PRODUCT SUMMARY
DESCRIPTION
The SSM2316GN acheives fast switching performance
with low gate charge without a complex drive circuit. It
is suitable for low voltage applications such as DC/DC
converters and general load-switching circuits.
BVDSS
RDS(ON)
ID
30V
42mW
4.7A
The SSM2316GN is supplied in an RoHS-compliant
SOT-23-3 package, which is widely used for lower
power commercial and industrial surface mount
applications.
Pb-free; RoHS-compliant SOT-23-3
D
S
SOT-23-3
G
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
Parameter
Value
30
Units
V
Drain-source voltage
Gate-source voltage
VGS
± 20
V
ID
Continuous drain current 3, T = 25°C
4.7
A
A
T = 70°C
A
3.7
A
IDM
PD
Pulsed drain current 1,2
Total power dissipation 3, T = 25°C
10
A
1.38
W
A
Linear derating factor
0.01
W/°C
°C
°C
TSTG
TJ
Storage temperature range
Operating junction temperature range
-55 to 150
-55 to 150
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
Units
R
ΘJA
Maximum thermal resistance, junction-ambient3
90
°C/W
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
3.Mounted on a square inch of copper pad on FR4 board ; 270°C/W when mounted on the minimum pad area required for soldering.
6/16/2006 Rev.3.01
www.SiliconStandard.com
1 of 5
SSM2316GN
(at Tj = 25°C, unless otherwise specified)
ELECTRICAL CHARACTERISTICS
Symbol
BVDSS
Parameter
Test Conditions
VGS=0V, ID=250uA
Min. Typ. Max. Units
Drain-source breakdown voltage
30
-
-
0.02
-
-
-
V
∆BVDSS/∆Tj
Breakdown voltage temperature coefficient Reference to 25°C, ID=1mA
V/°C
mΩ
RDS(ON)
Static drain-source on-resistance
VGS=10V, ID=4A
-
42
VGS=4.5V, ID=2A
VDS=VGS, ID=250uA
VDS=10V, ID=4A
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
72
mΩ
V
VGS(th)
gfs
Gate threshold voltage
3
Forward transconductance
Drain-source leakage current
5
-
S
IDSS
V
uA
uA
nA
nC
nC
nC
ns
ns
ns
DS=30V, VGS=0V
-
1
VDS=24V ,VGS=0V, Tj = 70°C
VGS=±20V
ID=4A
-
10
IGSS
Qg
Gate-source leakage current
Total gate charge 2
Gate-source charge
Gate-drain ("Miller") charge
Turn-on delay time 2
Rise time
-
±100
5
8
Qgs
Qgd
td(on)
tr
VDS=24V
1
-
VGS=4.5V
3
-
VDS=15V
7
-
ID=1A
8
-
td(off)
tf
Turn-off delay time
Fall time
RG=3.3Ω , VGS=10V
RD=15Ω
12
3
-
-
430
-
ns
pF
pF
pF
Ω
Ciss
Coss
Crss
Rg
Input capacitance
VGS=0V
270
70
60
1.4
Output capacitance
Reverse transfer capacitance
Gate Resistance
VDS=25V
f=1.0MHz
-
f=1.0MHz
2.1
Source-Drain Diode
Symbol
VSD
Parameter
Forward voltage 2
Test Conditions
IS=1.2A, VGS=0V
IS=4A, VGS=0V,
Min. Typ. Max. Units
-
-
14
9
1.2
V
trr
Reverse recovery time
-
-
-
ns
nC
Qrr
Reverse recovery charge
dI/dt=100A/µs
-
Notes:
1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C.
2.Pulse width <300us, duty cycle <2%.
6/16/2006 Rev.3.01
www.SiliconStandard.com
2 of 5
SSM2316GN
12
12
10 V
7.0 V
5.0 V
4.5 V
10V
7.0V
5.0V
4.5V
T A =25 o C
T A = 150 o C
8
8
4
4
V G = 3.0 V
V
G = 3.0 V
0
0
0
1
2
3
4
0
1
2
3
4
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
65
55
45
35
25
1.8
1.5
1.2
0.9
0.6
I D = 4 A
I D = 2 A
T A =25 o C
V G =10V
-50
0
50
100
150
2
4
6
8
10
T j , Junction Temperature ( o C)
V GS , Gate-to-Source Voltage (V)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
4.0
3.0
2.0
1.0
0.0
1.8
1.4
1.0
0.6
0.2
T j =150 o C
T j =25 o C
0
0.2
0.4
0.6
0.8
1
1.2
-50
0
50
100
150
T j , Junction Temperature ( o C)
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
6/16/2006 Rev.3.01
www.SiliconStandard.com
3 of 5
SSM2316GN
f=1.0MHz
12
10
8
1000
100
10
I D =4A
V DS =15V
C iss
V
V
DS =20V
DS =24V
6
C oss
C rss
4
2
0
1
5
9
13
17
21
25
29
0
2
4
6
8
Q G , Total Gate Charge (nC)
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
100
1
Duty factor=0.5
0.2
10
0.1
0.1
100us
0.05
1ms
10ms
100ms
1
PDM
t
0.01
T
0.01
Single Pulse
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
T
A =25 o C
0.1
Rthja = 270°C/W
Single Pulse
1s
DC
0.001
0.0001
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
V DS , Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
12
VG
V DS =5V
9
QG
T j =25 o C
T j =150 o
C
4.5V
6
3
0
QGS
QGD
Charge
Q
0
2
4
6
V GS , Gate-to-Source Voltage (V)
Fig 11. Transfer Characteristics
Fig 12. Gate Charge Circuit
6/16/2006 Rev.3.01
www.SiliconStandard.com
4 of 5
SSM2316GN
PHYSICAL DIMENSIONS
SOT-23-3
SOT-23-3
SYMBOL
MILLIMETERS
MIN. MAX.
A
A1
A2
b
0.89
0
1.45
0.15
1.30
0.50
0.25
3.10
3.00
2.30
0.70
0.30
0.08
2.65
2.10
1.19
c
D
E
E1
e
0.95BSC
1.90BSC
0.30 0.60
e1
L
L1
Θ
0.60REF
8°
0°
*Dimensions do not include mold protrusions.
PART MARKING
PART NUMBER CODE: NI = SSM2316GN
First character is underlined to indicate Pb-free part
NI
XX = DATE/LOT CODE - contact SSC for
information on decoding this.
PACKING: Moisture sensitivity level MSL3
3000 pcs in antistatic tape on a reel packed in a moisture barrier bag (MBB).
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
6/16/2006 Rev.3.01
www.SiliconStandard.com
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