SFF80N20S1S [SSDI]
Power Field-Effect Transistor,;型号: | SFF80N20S1S |
厂家: | SOLID STATES DEVICES, INC |
描述: | Power Field-Effect Transistor, |
文件: | 总2页 (文件大小:137K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
D
SFF80N20S1
Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-4474 * Fax: (562) 404-1773
ssdi@ssdi-power.com * www.ssdi-power.com
80 AMP , 200 Volts, 15 mΩ
Avalanche Rated
DESIGNER’S DATA SHEET
Part Number / Ordering Information 1/
SFF80N20 ___ ___
N-channel MOSFET
Screening 2/
__ = Not Screened
TX = TX Level
TXV = TXV Level
S = S Level
│
│
│
│
│
│
└
└
Features:
Rugged poly-Si gate
Lowest ON-resistance in the industry
Avalanche rated
Hermetically Sealed Surface Mount Package
Low Total Gate Charge
Fast Switching
Package
S1 = SMD1
TX, TXV, S-Level screening available
Improved (RDS(ON) QG) figure of merit
Maximum Ratings3/
Symbol
VDSS
Value
Unit
V
Drain - Source Voltage
200
±20
±30
continuous
transient
Gate – Source Voltage
VGS
ID1
V
A
A
Max. Continuous Drain Current
(package limited)
55
@ TC = 25°C
@ TC = 25°C
@ TC = 175°C
Max. Instantaneous Drain Current
(Tj limited)
ID2
ID3
80
48
Max. Avalanche Current
@ L= 0.1 mH
@ ID= 80 A
IAR
EAS
80
500
A
mJ
W
Single and Repetitive Avalanche Energy
Total Power Dissipation
150
@ TC = 25°C
PD
Operating & Storage Temperature
-55 to +175
°C
T
OP & TSTG
Maximum Thermal Resistance
(Junction to Case)
RθJC
0.55 (typ.0.4)
°C/W
NOTES:
SMD1 (S1)
*Pulse Test: Pulse Width = 300 µsec, Duty Cycle = 2%.
1/ For ordering information, price, and availability - contact factory.
2/ Screening based on MIL-PRF-19500. Screening flows available
on request.
3/ Unless otherwise specified, all electrical characteristics @25°C.
NOTE: All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: FT0081A
DOC
Solid State Devices, Inc.
14701 Firestone Blvd * La Mirada, Ca 90638
Phone: (562) 404-4474 * Fax: (562) 404-1773
ssdi@ssdi-power.com * www.ssdi-power.com
SFF80N20S1
Electrical Characteristics3/
Symbol Min
Typ Max Unit
Drain to Source Breakdown Voltage
V
GS = 0 V, ID = 1 mA
BVDSS
RDS(on)
200
215
––
V
Drain to Source On State
Resistance
VGS = 10 V, ID = 80 A, Tj = 25°C
VGS = 10 V, ID = 80 A, Tj =125°C
VGS = 10 V, ID = 80 A, Tj = 175°C
––
––
––
15
25
35
20
35
––
mΩ
VDS = VGS, ID = .25 mA, Tj = 25°C
VDS = VGS, ID = .25 mA, Tj = 125°C
2.0
1.0
––
3.0
2.1
3.5
4.0
––
5
Gate Threshold Voltage
Gate to Source Leakage
VGS(th)
V
VDS = VGS, ID = .25 mA, Tj = -55°C
VGS = ±20 V, Tj = 25°C
VGS = ±20 V, Tj = 125°C
––
––
10
30
±100
––
IGSS
nA
V
DS = 200 V, VGS = 0 V, Tj = 25°C
––
––
––
0.1
10
250
1
100
––
μA
μA
μA
Zero Gate Voltage Drain Current
Forward Transconductance
V
V
DS = 200 V, VGS = 0 V, Tj = 125°C
DS = 200 V, VGS = 0 V, Tj = 175°C
IDSS
gfs
V
DS = 2.50 V, ID = 80 A, Tj = 25°C
50
70
––
Mho
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
V
GS = 10 V
Qg
Qgs
Qgd
––
––
––
65
24
13
100
35
20
VDS = 100 V
nC
ID = 44 A
Turn on Delay Time
Rise Time
Turn off Delay Time
Fall Time
V
V
GS = 10 V
DS = 100 V
ID = 44 A
td(on)
tr
td(off)
tf
––
––
––
––
35
32
65
20
75
65
125
45
nsec
V
RG = 1.6 Ω, pw= 3 µs
Diode Forward Voltage
IF = 88 A, VGS = 0 V
VSD
––
1.35
1.5
Diode Reverse Recovery Time
Reverse Recovery Charge
IF = 44 A, di/dt = 100 A/µsec
trr
Qrr
––
––
160
850
200 nsec
––
nC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
GS = 0 V
Ciss
Coss
Crss
––
––
––
6200
400
––
––
––
––
V
DS = 100 V
f = 1 MHz
pF
CASE OUTLINE: SMD1 (S1)
PIN ASSIGNMENT (Standard)
Package
SMD1
Drain
Source
Gate
Pin 3
Pin 2
Pin 1
NOTES:
*Pulse Test: Pulse Width = 300 µsec, Duty Cycle = 2%.
1/ For ordering information, price, and availability - contact factory.
2/ Screening based on MIL-PRF-19500. Screening flows available
on request.
3/ Unless otherwise specified, all electrical characteristics @25°C.
NOTE: All specifications are subject to change without notification.
SCD's for these devices should be reviewed by SSDI prior to release.
DATA SHEET #: FT0081A
DOC
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