74AC74TTR [STMICROELECTRONICS]

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR; 带预置和清除两个D型触发器


型号：	74AC74TTR
厂家：	ST
描述：	DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 带预置和清除两个D型触发器触发器锁存器逻辑集成电路光电二极管
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74AC74

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

■

HIGH SPEED:

= 300MHz (TYP.) at V = 5V

MAX

LOW POWER DISSIPATION:

= 2µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

50Ω TRANSMISSION LINE DRIVING

CAPABILITY

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 24mA (MIN)

ORDER CODES

PACKAGE

BALANCED PROPAGATION DELAYS:

TUBE

PLH

PHL

DIP

SOP

74AC74B

74AC74M

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

74AC74MTR

74AC74TTR

TSSOP

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 74

IMPROVED LATCH-UP IMMUNITY

transition of the clock pulse.

CLEAR and PRESET are independent of the

clock and accomplished by a low setting on the

appropriate input.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74AC74 is an advanced high-speed CMOS

DUAL D-TYPE FLIP FLOP WITH PRESET AND

CLEAR fabricated with sub-micron silicon gate

and double-layer metal wiring C MOS tecnology.

A signal on the D INPUT is transferred to the Q

and Q OUTPUTS during the positive going

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

1/12

74AC74

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCTION

Asynchronous Reset -

Direct Input

1, 13

1CLR, 2CLR

1D, 2D

2, 12

3, 11

Data Inputs

1CK, 2CK Clock Input

(LOW to HIGH, Edge

Triggered)

4, 10

1PR, 2PR Asynchronous Set - Direct

Input

5, 9

6, 8

1Q, 2Q

True Flip-Flop Outputs

Complement Flip-Flop

Outputs

GND

Ground (0V)

Positive Supply Voltage

TRUTH TABLE

INPUTS

OUTPUTS

FUNCTION

CLR

CLEAR

PRESET

NO CHANGE

X : Don’t Care

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

2/12

74AC74

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

Supply Voltage

-0.5 to +7

DC Input Voltage

-0.5 to V

+ 0.5

DC Output Voltage

DC Input Diode Current

DC Output Diode Current

DC Output Current

-0.5 to V

+ 0.5

± 20

°C

± 50

or I

DC V

or Ground Current

± 200

GND

Storage Temperature

-65 to +150

300

stg

Lead Temperature (10 sec)

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is

not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Value

Unit

Supply Voltage

2 to 6

0 to V

Input Voltage

Output Voltage

0 to V

Operating Temperature

Input Rise and Fall Time V

-55 to 125

°C

ns/V

= 3.0, 4.5 or 5.5V (note 1)

dt/dv

1) V from 30% to 70% of V

3/12

74AC74

DC SPECIFICATIONS

Test Condition

Value

= 25°C

Symbol

Parameter

-40 to 85°C -55 to 125°C Unit

(V)

Min. Typ. Max. Min. Max. Min. Max.

High Level Input

Voltage

3.0

4.5

5.5

3.0

4.5

5.5

3.0

2.1

1.5

2.1

= 0.1 V or

3.15 2.25

3.85 2.75

1.5

3.15

3.85

3.15

3.85

-0.1V

Low Level Input

Voltage

0.9

= 0.1 V or

2.25 1.35

2.75 1.65

2.99

1.35

1.65

1.35

1.65

-0.1V

High Level Output

Voltage

I =-50 µA

2.9

4.4

2.9

4.4

2.9

4.4

5.4

2.4

3.7

4.7

I =-50 µA

4.5

5.5

3.0

4.5

5.5

3.0

4.5

5.5

3.0

4.5

5.5

4.49

5.49

I =-50 µA

5.4

I =-12 mA

2.56

3.86

4.86

2.46

3.76

4.76

I =-24 mA

Low Level Output

Voltage

I =50 µA

0.002 0.1

0.001 0.1

0.36

0.1

0.5

I =50 µA

0.1

I =12 mA

0.44

I =24 mA

0.36

I =24 mA

0.36

Input Leakage

Current

V = V

or GND

5.5

± 0.1

± 1

µA

Quiescent Supply

Current

V = V

or GND

= 1.65 V max

= 3.85 V min

OLD

Dynamic Output

Current (note 1, 2)

5.5

OHD

-75

-50

OHD

1) Maximum test duration 2ms, one output loaded at time

2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω

4/12

74AC74

AC ELECTRICAL CHARACTERISTICS (C = 50 pF, R = 500 Ω, Input t = t = 3ns)

Test Condition

Value

-40 to 85°C -55 to 125°C Unit

= 25°C

Symbol

Parameter

(V)

Min. Typ. Max. Min. Max. Min. Max.

(*)

Propagation Delay

Time CK to Q or Q

7.0

5.0

6.0

14.0

10.0

12.0

16.0

10.5

13.5

17.5

12.0

14.0

PLH PHL

3.3

(**)

(*)

5.0

Propagation Delay

Time PR or CLR to

Q or Q

PLH PHL

3.3

(**)

4.5

1.5

9.5

10.5

5.0

3.3

(*)

Pulse Width HIGH

or LOW, CK or PR

or CLR

5.0

4.0

7.0

5.0

7.0

5.0

(**)

5.0

(*)

Setup Time D to CK

HIGH or LOW

4.0

3.0

2.0

1.0

100

140

-0.2

0.2

4.0

3.0

1.0

4.0

3.0

1.0

3.3

(**)

5.0

(*)

Hold Time D to CK

HIGH or LOW

3.3

(**)

(*)

0.2

5.0

Removal Time

PR or CLR to CK

-1.0

-0.7

300

REM

3.3

(**)

5.0

3.3

(*)

(**)

Maximum Clock

Frequency

MAX

MHz

130

5.0

(*) Voltage range is 3.3V ± 0.3V

(**) Voltage range is 5.0V ± 0.5V

CAPACITIVE CHARACTERISTICS

Test Condition

Value

= 25°C

Symbol

Parameter

-40 to 85°C -55 to 125°C Unit

(V)

Min. Typ. Max. Min. Max. Min. Max.

Input Capacitance

5.0

Power Dissipation

Capacitance

(note 1)

= 10MHz

1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I

Flip-Flop)

= C x V x f + I /2 (per

PD CC IN CC

CC(opr)

5/12

74AC74

TEST CIRCUIT

= 50pF or equivalent (includes jig and probe capacitance)

= R = 500Ω or equivalent

= Z

of pulse generator (typically 50Ω)

OUT

WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES, CLOCK PULSE WIDTHS

(f=1MHz; 50% duty cycle)

6/12

74AC74

WAVEFORM 2: PROPAGATION DELAYS, RESET AND SET PULSE WIDTHS (f=1MHz; 50% duty

cycle)

7/12

74AC74

WAVEFORM 3: RECOVERY TIMES (f=1MHz; 50% duty cycle)

WAVEFORM 4: PULSE WIDTH

8/12

74AC74

Plastic DIP-14 MECHANICAL DATA

inch

TYP.

DIM.

MIN.

0.51

1.39

TYP.

MAX.

MIN.

0.020

0.055

MAX.

1.65

0.065

0.5

0.020

0.010

0.25

0.787

8.5

2.54

15.24

0.335

0.100

0.600

7.1

5.1

0.280

0.201

3.3

0.130

1.27

2.54

0.050

0.100

P001A

9/12

74AC74

SO-14 MECHANICAL DATA

inch

TYP.

DIM.

MIN.

TYP.

MAX.

1.75

0.2

MIN.

MAX.

0.068

0.007

0.064

0.018

0.010

0.1

0.003

1.65

0.46

0.25

0.35

0.19

0.013

0.007

0.5

0.019

45 (typ.)

8.55

5.8

8.75

6.2

0.336

0.228

0.344

0.244

1.27

7.62

0.050

0.300

3.8

4.6

0.5

4.0

5.3

0.149

0.181

0.019

0.157

0.208

0.050

0.026

1.27

0.68

8 (max.)

P013G

10/12

74AC74

TSSOP14 MECHANICAL DATA

inch

TYP.

DIM.

MIN.

TYP.

MAX.

1.1

MIN.

MAX.

0.433

0.006

0.374

0.0118

0.0079

0.201

0.256

0.176

0.05

0.85

0.19

0.09

4.9

0.10

0.9

0.15

0.95

0.30

0.20

5.1

0.002

0.335

0.0075

0.0035

0.193

0.246

0.169

0.004

0.354

6.4

0.197

0.252

6.25

4.3

6.5

4.4

4.48

0.173

0.65 BSC

4^o

0.0256 BSC

4^o

0^o

8^o

0^o

8^o

0.50

0.60

0.70

0.020

0.024

0.028

PIN 1 IDENTIFICATION

11/12

74AC74

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consequences of use of such information nor for any infringement of patents or other rights of third parties which may resultfrom

its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications

mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information

previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or

systems without express written approval of STMicroelectronics.

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12/12

74AC74TTR [STMICROELECTRONICS]

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