74LCX162541 [STMICROELECTRONICS]
Low voltage CMOS 16-bit bus buffer with 5V tolerant inputs and outputs; 低电压CMOS 16位与5V容限输入和输出总线缓冲器
| 型号： | 74LCX162541 |
| 厂家： | 
ST |
| 描述： | Low voltage CMOS 16-bit bus buffer with 5V tolerant inputs and outputs |
| 文件： | 总15页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LCX162541
Low voltage CMOS 16-bit bus buffer (3-state)
with 5V tolerant inputs and outputs
Features
■ 5V tolerant inputs and outputs
■ High speed:
– t = 4.4ns (Max) at V = 3V
PD
CC
■ Power down protection on inputs and outputs
■ Symmetrical output impedance:
TSSOP48
– |I | = I = 12mA (Min) at V = 3V
OH
OL
CC
■ PCI bus levels guaranteed at 12mA
■ Balanced propagation delays:
Description
– t
≅ t
PHL
PLH
The 74LCX162541 is a low voltage CMOS 16 bit
bus buffer (non-inverted) fabricated with sub-
micron silicon gate and double-layer metal wiring
■ 26Ω serie resistor in outputs
■ Operating voltage range:
2
C MOS technology. It is ideal for low power and
– V (Opr) = 2.0V to 3.6V
CC
high speed 3.3V applications; it can be interfaced
to 5V signal environment for both inputs and
outputs.
■ Pin and function compatible with
74 series 162541
■ Latch-up performance exceeds 500mA
This is composed of two 8-bit sections with
separate output-enable signals. For either 8-bit
buffers section, the 3 state control gate operates
as a two input AND such that if either nG1 and
nG2 are high, all outputs are in the high
impedence state.
(JESD 17)
■ ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
This device is designed to be used with 3 state
memory address drivers, etc.
The device circuits is including 26Ω series
resistance in the outputs. These resistors permit
to reduce line noise in high speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Order codes
Part number
Package
Packaging
74LCX162541TTR
TSSOP48
Tape and reel
February 2007
Rev 3
1/15
www.st.com
15
Contents
74LCX162541
Contents
1
2
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
4
Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
6
7
8
9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15
74LCX162541
Logic symbols and I/O equivalent circuit
1
Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Figure 2. Input and output equivalent circuit
3/15
Pin settings
74LCX162541
2
Pin settings
2.1
Pin connection
Figure 3. Pin connection (top through view)
4/15
74LCX162541
Logic states
2.2
Pin description
Table 1. Pin description
Pin N°
Symbol
Name and function
Output enable inputs
1, 48
1G1, 1G2
2, 3, 5, 6,
8, 9, 11, 12
1Y1 to 1Y8
Data outputs
13, 14, 16, 17,
19, 20, 22, 23
2Y1 to 2Y8
2G1, 2G2
2A1 to 2A8
Data outputs
24, 25
Output enable inputs
Data outputs
36, 35, 33, 32,
30, 29, 27, 26
47, 46, 44, 43,
41, 40, 38, 37
1A1 to 1A8
Data outputs
4, 10, 15, 21,
28, 34, 39, 45
GND
VCC
Ground (0V)
7, 18, 31, 42
Positive supply voltage
3
Logic states
3.1
Truth table
Table 2. Truth table
Inputs
Output
G1
H
X
G2
X
An
X
Yn
Z
H
L
X
Z
L
H
L
H
L
L
L
Note:
X : Do not care
Z : High impedance
5/15
Maximum rating
74LCX162541
4
Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. these are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. exposure to absolute maximum rating conditions for
extended periods may affect device reliability. refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol
Parameter
Value
Unit
V
VCC
Supply voltage
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to VCC + 0.5
VI
VO
VO
IIK
DC input voltage
V
DC output voltage (OFF state)
V
DC output voltage (high or low state) (1)
DC input diode current
V
-50
-50
mA
mA
mA
mA
mA
°C
°C
DC output diode current (2)
DC output current
IOK
IO
±50
ICC
IGND
Tstg
TL
DC supply current per supply pin
DC ground current per supply pin
Storage temperature
± 100
± 100
-65 to +150
300
Lead temperature (10 sec)
1. IO absolute maximum rating must be observed
2. VO < GND
4.1
Recommended operating conditions
Table 4. Recommended operating conditions
Symbol
Parameter
Value
2.0 to 3.6
0 to 5.5
0 to 5.5
0 to VCC
Unit
V
Supply voltage (1)
Input voltage
VCC
VI
V
VO
VO
Output voltage (OFF state)
V
Output voltage (high or low state)
V
IOH, IOL High or low level output current (VCC = 3.0 to 3.6V)
OH, IOL High or low level output current (VCC = 2.7V)
± 12
± 8
mA
mA
°C
ns/V
I
Top
Operating temperature
Input rise and fall time (2)
-40 to 85
0 to 10
dt/dv
1. Truth table guaranteed: 1.5V to 3.6V
2. VIN from 0.8V to 2V at VCC = 3.0V
6/15
74LCX162541
Electrical characteristics
5
Electrical characteristics
Table 5. DC specification
Test condition
Value
-40 to 85 °C
Min Max
Symbol
Parameter
Unit
VCC
(V)
High level input
voltage
VIH
VIL
2.0
V
V
2.7 to 3.6
Low level input
voltage
0.8
IO = -100 µA
VCC-0.2
2.0
2.7 to 3.6
2.7
IO = -8 mA
High level output
voltage
VOH
V
V
I
O = -6 mA
O = -12 mA
IO = 100 µA
2.4
3.0
I
2.0
2.7 to 3.6
2.7
0.2
0.6
I
I
O = 8 mA
O = 6 mA
Low level output
voltage
VOL
0.55
0.8
3.0
IO = 12 mA
II
VI = 0 to 5.5V
Input leakage current 2.7 to 3.6
± 5
µA
µA
Power OFF leakage
Ioff
VI or VO = 5.5V
0
10
current
High impedance
output leakage
current
VI = VIH or VIL
VO = 0 to VCC
IOZ
2.7 to 3.6
± 5
µA
VI = VCC or GND
VI or VO= 3.6 to 5.5V
VIH = VCC - 0.6V
20
Quiescent supply
current
ICC
2.7 to 3.6
2.7 to 3.6
µA
µA
± 20
500
∆ICC
ICC incr. per Input
Table 6. Dynamic switching characteristics
Test condition
Value
TA = 25 °C
Symbol
Parameter
Unit
VCC
(V)
Min Typ Max
VOLP
VOLV
0.8
CL = 50pF
VIL = 0V, VIH = 3.3V
Dynamic low level
quiet output (1)
3.3
V
-0.8
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
7/15
Electrical characteristics
74LCX162541
Table 7. AC electrical characteristics
Test Condition
Value
-40 to 85 °C
Symbol
Parameter
Unit
VCC
(V)
CL
(pF)
RL
(Ω)
ts = tr
(ns)
Min
Max
5.6
4.4
6.3
5.9
6.3
5.9
2.7
3.0 to 3.6
2.7
1.5
1.5
1.5
1.5
1.5
1.5
Propagation
delay time
tPLH PHL
t
50
50
50
50
500
500
500
500
2.5
2.5
2.5
2.5
ns
ns
ns
ns
Output enable
time
tPZL PZH
t
3.0 to 3.6
2.7
Output disable
time
tPLZ PHZ
t
3.0 to 3.6
tOSLH
tOSHL
Output to output
skew time (1) (2)
3.0 to 3.6
1.0
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|,
tOSHL = | tPHLm - tPHLn|)
2. Parameter guaranteed by design
Table 8. Capacitive characteristics
Test Condition
Value
TA = 25 °C
Symbol
Parameter
Unit
VCC
(V)
Min
Typ
Max
CIN
COUT
CPD
Input capacitance
Output capacitance
4
pF
pF
pF
10
50
Power dissipation
capacitance (1)
3.3
fIN = 10MHz
VIN = 0 or VCC
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
8/15
74LCX162541
Test circuit
6
Test circuit
Figure 4. Test circuit
Figure 5. Test circuit
Test
tPLH, tPHL
PZL, tPLZ
PZH, tPHZ
Switch
Open
t
6V
t
GND
C = 50pF or equivalent (includes jig and probe capacitance)
L
R = R = 500Ω or equivalent
L
1
R = Z
of pulse generator (typically 50Ω)
T
OUT
9/15
Waveforms
74LCX162541
7
Waveforms
Figure 6. Propagation delays (f = 1MHz; 50% duty cycle)
Figure 7. Output enable and disable time (f = 1MHz; 50% duty cycle)
10/15
74LCX162541
Package mechanical data
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/15
Package mechanical data
74LCX162541
TSSOP48 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
A
A1
A2
b
0.05
0.15
0.002
0.9
0.035
0.17
0.09
12.4
0.27
0.20
12.6
0.0067
0.0035
0.488
0.011
0.0079
0.496
c
D
E
8.1 BSC
0.5 BSC
0.318 BSC
E1
e
6.0
6.2
0.236
0.244
0.0197 BSC
K
0°
8°
0°
8°
L
0.45
0.75
0.018
0.030
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
7065588D
12/15
74LCX162541
Package mechanical data
Tape & Reel TSSOP48 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
8.9
1.197
0.350
0.524
0.067
0.161
0.476
Ao
Bo
Ko
Po
P
8.7
13.1
1.5
0.343
0.516
0.059
0.153
0.468
13.3
1.7
3.9
4.1
11.9
12.1
13/15
Revision history
74LCX162541
9
Revision history
Table 9. Revision history
Date
Revision
Changes
Ordering Codes Revision - pag. 1.
Document reformatted, temperature ranges updated
15-Sep-2004
06-Feb-2007
2
3
14/15
74LCX162541
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