74LVC125AM [STMICROELECTRONICS]

LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE; 低压CMOS四路总线缓冲器(三态)高性能
74LVC125AM
型号: 74LVC125AM
厂家: ST    ST
描述:

LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE
低压CMOS四路总线缓冲器(三态)高性能

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总10页 (文件大小:68K)
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74LVC125A  
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)  
HIGH PERFORMANCE  
5V TOLERANT INPUTS  
HIGH SPEED: t = 4.8ns (MAX.) at V = 3V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN) at V = 3V  
PCI BUS LEVELS GUARANTEED AT 24 mA  
OH  
OL  
CC  
SOP  
TSSOP  
BALANCED PROPAGATION DELAYS:  
t
t
PHL  
PLH  
ORDER CODES  
PACKAGE  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 3.6V (1.2V Data  
Retention)  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 125  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
V
CC  
TUBE  
T & R  
SOP  
74LVC125AM  
74LVC125AMTR  
74LVC125ATTR  
TSSOP  
It can be interfaced to 5V signal environment for  
inputs in mixed 3.3/5V system.  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
These devices require the same 3-STATE control  
input G to be taken high to make the output go in  
to the high impedance state.  
It has more speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LVC125A is a low voltage CMOS QUAD  
BUS BUFFER fabricated with sub-micron silicon  
gate and double-layer metal wiring C MOS  
technology. It is ideal for 1.65 to 3.6 V  
2
CC  
operations and low power and low noise  
applications.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
February 2002  
1/9  
74LVC125A  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
PIN DESCRIPTION  
TRUTH TABLE  
A
PIN No  
SYMBOL  
NAME AND FUNCTION  
G
Y
1, 4, 9, 12  
2, 5, 10, 13  
3, 6, 8, 11  
7
G1 to G4  
A1 to A4  
Y1 to Y4  
GND  
Output Enable Inputs  
Data Inputs  
X
L
H
L
L
Z
L
Data Outputs  
H
H
Ground (0V)  
X : Don’t care  
V
14  
Positive Supply Voltage  
CC  
Z : High Impedance  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage  
-0.5 to +7.0  
-0.5 to +7.0  
-0.5 to +7.0  
V
V
CC  
V
DC Input Voltage  
I
V
DC Output Voltage (High Impedance or V  
= 0V)  
CC  
V
O
O
V
I
DC Output Voltage (High or Low State) (note 1)  
DC Input Diode Current  
-0.5 to V  
+ 0.5  
CC  
V
- 50  
mA  
mA  
mA  
mA  
°C  
°C  
IK  
I
DC Output Diode Current (note 2)  
DC Output Current  
- 50  
± 50  
OK  
I
O
I
or I  
T
DC V  
or Ground Current per Supply Pin  
CC  
± 100  
CC  
GND  
Storage Temperature  
-65 to +150  
300  
stg  
T
Lead Temperature (10 sec)  
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is  
not implied  
1) I absolute maximum rating must be observed  
O
2) V < GND  
O
2/9  
74LVC125A  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage (note 1)  
Input Voltage  
1.65 to 3.6  
0 to 5.5  
V
V
CC  
V
I
V
Output Voltage (High Impedance or V  
Output Voltage (High or Low State)  
= 0V)  
CC  
0 to 5.5  
V
O
V
0 to V  
V
O
CC  
I
I
I
I
, I  
High or Low Level Output Current (V = 3.0 to 3.6V)  
± 24  
± 12  
mA  
mA  
mA  
mA  
°C  
ns/V  
OH OL  
CC  
, I  
High or Low Level Output Current (V = 2.7 to 3.0V)  
OH OL  
CC  
, I  
High or Low Level Output Current (V = 2.3 to 2.7V)  
± 8  
OH OL  
CC  
, I  
High or Low Level Output Current (V = 1.65 to 2.3V)  
± 4  
OH OL  
CC  
T
Operating Temperature  
-55 to 125  
0 to 10  
op  
dt/dv  
Input Rise and Fall Time (note 2)  
1) Truth Table guaranteed: 1.2V to 3.6V  
2) V from 0.8V to 2V at V = 3.0V  
IN  
CC  
DC SPECIFICATIONS  
Test Condition  
Value  
Symbol  
Parameter  
-40 to 85 °C  
-55 to 125 °C  
Unit  
V
CC  
(V)  
Min.  
Max.  
Min.  
Max.  
V
High Level Input  
Voltage  
0.65V  
0.65V  
CC  
1.65 to 1.95  
2.3 to 2.7  
2.7 to 3.6  
1.65 to 1.95  
2.3 to 2.7  
2.7 to 3.6  
IH  
CC  
V
V
1.7  
2
1.7  
2
V
Low Level Input  
Voltage  
0.35V  
0.35V  
CC  
IL  
CC  
0.7  
0.8  
0.7  
0.8  
V
High Level Output  
Voltage  
I =-100 µA  
V
-0.2  
V
-0.2  
CC  
1.65 to 3.6  
1.65  
2.3  
OH  
O
CC  
I =-4 mA  
1.2  
1.7  
2.2  
2.4  
2.2  
1.2  
1.7  
2.2  
2.4  
2.2  
O
I =-8 mA  
O
V
I =-12 mA  
2.7  
O
I =-18 mA  
3.0  
O
I =-24 mA  
3.0  
O
V
Low Level Output  
Voltage  
I =100 µA  
1.65 to 3.6  
1.65  
2.3  
0.2  
0.2  
0.45  
0.7  
OL  
O
I =4 mA  
0.45  
0.7  
O
I =8 mA  
V
O
I =12 mA  
2.7  
0.4  
0.4  
O
I =24 mA  
3.0  
0.55  
0.55  
O
I
Input Leakage  
Current  
I
V = 0 to 5.5V  
3.6  
± 5  
± 5  
µA  
I
I
Power Off Leakage  
Current  
off  
V or V = 5.5V  
0
10  
10  
µA  
µA  
I
O
I
High Impedance  
Output Leakage  
Current  
3.6  
V = V orV  
± 5  
± 5  
OZ  
I
IH  
IL  
V
= 0 to 5.5V  
O
I
Quiescent Supply  
Current  
V = V or GND  
I CC  
10  
± 10  
500  
10  
CC  
3.6  
µA  
µA  
V or V = 3.6 to  
I
O
± 10  
500  
5.5V  
I  
I
incr. per Input  
V
= V -0.6V  
2.7 to 3.6  
CC  
CC  
IH  
CC  
3/9  
74LVC125A  
DYNAMIC SWITCHING CHARACTERISTICS  
Test Condition  
Value  
T = 25 °C  
Symbol  
Parameter  
Unit  
A
V
CC  
(V)  
Min.  
Typ.  
Max.  
V
Dynamic Low Level Quiet  
Output (note 1)  
0.8  
C = 50pF  
OLP  
L
3.3  
V
V
= 0V, V = 3.3V  
V
IL  
IH  
-0.8  
OLV  
1) Number of output defined as ”n”. Measured with ”n-1” outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is  
measured in the LOW state.  
AC ELECTRICAL CHARACTERISTICS  
Test Condition  
Value  
-55 to 125 °C  
Symbol  
Parameter  
-40 to 85 °C  
Unit  
ns  
V
(V)  
C
R
t = t  
CC  
L
L
s
r
(pF)  
()  
(ns)  
Min.  
Max.  
Min.  
Max.  
t
t
Propagation Delay  
Time  
1.65 to 1.95  
2.3 to 2.7  
2.7  
30  
30  
50  
50  
30  
30  
50  
50  
30  
30  
50  
50  
1000  
500  
500  
500  
1000  
500  
500  
500  
1000  
500  
500  
500  
2.0  
2.0  
2.5  
2.5  
2.0  
2.0  
2.5  
2.5  
2.0  
2.0  
2.5  
2.5  
9.0  
6.3  
5.5  
4.8  
9.9  
7.4  
6.6  
5.4  
11  
12  
8.5  
6.5  
5.8  
13  
PLH PHL  
1.5  
1
3.0 to 3.6  
t
t
t
Output Enable Time 1.65 to 1.95  
PZL PZH  
2.3 to 2.7  
9.6  
7.9  
6.5  
14  
ns  
2.7  
1
1
3.0 to 3.6  
t
Output Disable Time 1.65 to 1.95  
PLZ PHZ  
2.3 to 2.7  
2.7  
5.6  
5.0  
4.6  
1
7.3  
6.0  
5.5  
1
ns  
ns  
2
2
3.0 to 3.6  
t
Output To Output  
Skew Time (note1,  
2)  
2.7 to 3.6  
OSLH  
t
OSHL  
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-  
ing in the same direction, either HIGH or LOW (t  
2) Parameter guaranteed by design  
= | t  
- t  
|, t  
= | t  
- t  
|
OSLH  
PLHm PLHn OSHL  
PHLm PHLn  
CAPACITIVE CHARACTERISTICS  
Test Condition  
Value  
T = 25 °C  
Symbol  
Parameter  
Unit  
A
V
CC  
(V)  
Min.  
Typ.  
Max.  
C
Input Capacitance  
4
pF  
pF  
IN  
C
Power Dissipation Capacitance  
(note 1)  
1.8  
2.5  
3.3  
f
= 10MHz  
28  
30  
34  
PD  
IN  
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without  
PD  
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I  
= C xV x f +I /n (per circuit)  
CC(opr)  
PD CC IN CC  
4/9  
74LVC125A  
TEST CIRCUIT  
R
= Z  
of pulse generator (typically 50)  
T
OUT  
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE  
V
CC  
Symbol  
1.65 to 1.95V  
30pF  
2.3 to 2.7V  
2.7V  
50pF  
500Ω  
6V  
3.0 to 3.6V  
50pF  
500Ω  
6V  
C
30pF  
L
R = R  
1000Ω  
500Ω  
L
1
V
2 x V  
2 x V  
CC  
S
CC  
V
V
V
CC  
2.7V  
1.5V  
3.0V  
2.7V  
IH  
CC  
V
V
/2  
V /2  
CC  
1.5V  
M
CC  
V
V
V
CC  
3.0V  
OH  
CC  
V
V
+ 0.15V  
- 0.15V  
V
+ 0.15V  
- 0.15V  
V
+ 0.3V  
V
OL  
+ 0.3V  
- 0.3V  
X
Y
OL  
OL  
OL  
V
V
V
V
- 0.3V  
V
OH  
OH  
OH  
OH  
t = t  
<2.0ns  
<2.0ns  
<2.5ns  
<2.5ns  
r
r
5/9  
74LVC125A  
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)  
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)  
6/9  
74LVC125A  
SO-14 MECHANICAL DATA  
mm.  
inch  
DIM.  
MIN.  
TYP  
MAX.  
1.75  
0.2  
MIN.  
TYP.  
MAX.  
0.068  
0.007  
0.064  
0.018  
0.010  
A
a1  
a2  
b
0.1  
0.003  
1.65  
0.46  
0.25  
0.35  
0.19  
0.013  
0.007  
b1  
C
0.5  
0.019  
c1  
D
45° (typ.)  
8.55  
5.8  
8.75  
6.2  
0.336  
0.228  
0.344  
0.244  
E
e
1.27  
7.62  
0.050  
0.300  
e3  
F
3.8  
4.6  
0.5  
4.0  
5.3  
0.149  
0.181  
0.019  
0.157  
0.208  
0.050  
0.026  
G
L
1.27  
0.68  
M
S
8° (max.)  
PO13G  
7/9  
74LVC125A  
TSSOP14 MECHANICAL DATA  
mm.  
inch  
DIM.  
MIN.  
TYP  
MAX.  
1.2  
MIN.  
TYP.  
MAX.  
0.047  
0.006  
0.041  
0.012  
0.0089  
0.201  
0.260  
0.176  
A
A1  
A2  
b
0.05  
0.8  
0.15  
1.05  
0.30  
0.20  
5.1  
0.002  
0.031  
0.007  
0.004  
0.193  
0.244  
0.169  
0.004  
0.039  
1
0.19  
0.09  
4.9  
c
D
5
6.4  
0.197  
0.252  
E
6.2  
6.6  
E1  
e
4.3  
4.4  
4.48  
0.173  
0.65 BSC  
0.0256 BSC  
K
0°  
8°  
0°  
8°  
L
0.45  
0.60  
0.75  
0.018  
0.024  
0.030  
A2  
A
K
L
b
e
A1  
c
E
D
E1  
PIN 1 IDENTIFICATION  
1
0080337D  
8/9  
74LVC125A  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the  
consequences of use ofsuch information nor for any infringement of patents or other rights of third parties which may result from  
its use. No license is granted by implication or otherwise under any patent orpatent rights of STMicroelectronics. Specifications  
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information  
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or  
systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
2002 STMicroelectronics - Printed in Italy - All Rights Reserved  
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9/9  
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