A5973D_08 [STMICROELECTRONICS]
Up to 2 A step down switching regulator for automotive applications; 高达2A的降压开关稳压器用于汽车应用
| 型号： | A5973D_08 |
| 厂家： | 
ST |
| 描述： | Up to 2 A step down switching regulator for automotive applications |
| 文件： | 总12页 (文件大小：788K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A5973D
Up to 2 A step down switching regulator
for automotive applications
Features
■ Qualified following the AEC-Q100
requirements (temperature grade 3), see
PPAP for more details.
■ Temperature range -40 °C to +85 °C
■ 2 A DC output current
HSOP8 exposed pad
■ Operating input voltage from 4 V to 36 V
■ 3.3 V / ( 2 %) reference voltage
Description
The A5973D is a step down monolithic power
■ Output voltage adjustable from 1.235 V to 35 V
■ Low dropout operation: 100 % duty cycle
■ 250 kHz Internally fixed frequency
■ Voltage feedforward
switching regulator with a minimum switch current
limit of 2.25 A so it is able to deliver more than 2 A
DC current to the load depending on the
application conditions. The output voltage can be
set from 1.235 V to 35 V. The high current level is
also achieved thanks to an HSOP8 package with
■ Zero load current operation
exposed frame, that allows to reduce the R
down to approximately 40°C/W. The device uses
an internal P-channel DMOS transistor (with a
■ Internal current limiting
th(JA)
■ Inhibit for zero current consumption
■ Synchronization
typical R
of 250 mΩ) as switching element
DS(on)
to minimize the size of the external components.
An internal oscillator fixes the switching frequency
at 250 kHz. Having a minimum input voltage of
4 V only, it is particularly suitable for 5 V bus.
Pulse by pulse current limit with the internal
frequency modulation offers an effective constant
current short circuit protection. Pulse by pulse
current limit with the internal frequency
■ Protection against feedback disconnection
■ Thermal shutdown
Applications
■ Dedicated to automotive applications
modulation offers an effective constant current
short circuit protection.
Figure 1.
Application schematic
L1 15uH
Vout=3.3V
VIN=4V to 35V
OUT
1
VCC
8
4
SYNCH
COMP
2
5
R1
D1
C4
A5973D
5k6
STPS340U
C1
10uF
22nF
C2
330uF
6.3V
FB
6
7
3
35V
C3
VREF
3.3V
R3
CERAMIC
R2
INH
GND
220pF
4k7
3k3
May 2008
Rev 4
1/11
www.st.com
1
A5973D
Contents
1
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
4
5
6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/11
Pin settings
A5973D
1
Pin settings
1.1
Pin connection
Figure 1.
Pin connection (top view)
1.2
Pin description
Table 1.
N
Pin description
Pin
Description
1
2
OUT
Regulator output.
SYNCH
Master/slave synchronization.
A logical signal (active high) disables the device. If INH not used the pin
must be grounded. When it is open an internal pull-up disable the
device.
3
4
5
INH
COMP
FB
E/A output for frequency compensation.
Feedback input. Connecting directly to this pin results in an output
voltage of 1.23 V. An extenal resistive divider is required for higher
output voltages.
6
7
8
VREF
GND
VCC
3.3 V VREF. No cap is requested for stability.
Ground.
Unregulated DC input voltage.
3/11
A5973D
2
Electrical data
2.1
Maximum ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
V8
V1
Input voltage
40
V
OUT pin DC voltage
-1 to 40
-5 to 40
V
V
OUT pin peak voltage at ∆t = 0.1 µs
I1
V4 , V5
V3
Maximum output current
Analog pins
int. limit.
4
V
V
INH
-0.3 to VCC
-0.3 to 4
2.25
V2
SYNCH
V
PTOT
TJ
Power dissipation at TA ≤ 70 °C
Operating junction temperature range
Storage temperature range
W
°C
°C
-40 to 150
-55 to 150
TSTG
2.2
Thermal data
Table 3.
Symbol
RthJA
Thermal data
Parameter
SO8
Unit
Maximum thermal resistance junction-ambient
40 (1)
°C/W
1. Package mounted on board
4/11
Electrical characteristics
A5973D
3
Electrical characteristics
Table 4.
Electrical characteristics
(T = -40 °C to 125 °C, VCC = 12 V, unless otherwise specified)
J
Symbol
Parameter
Test condition
Min
Typ
Max
Unit
Operating input
voltage range
VCC
V0 = 1.235 V; I0 = 2 A
4
36
V
MOSFET on
resistance
RDS(on)
0.250
0.5
3.5
Ω
Maximum limiting
current
IL
VCC = 5 V
2.25
3
A
fSW
Switching frequency
Duty cycle
212
0
250
280
100
kHz
%
Dynamic characteristics (see test circuit).
4.4 V < VCC < 36 V,
20 mA < I0 < 2 A
V5
Voltage feedback
Efficiency
1.198 1.235 1.272
90
V
η
V0 = 5 V, VCC = 12 V
%
DC characteristics
Total operating
Iqop
Iq
3
5
mA
quiescent current
Quiescent current
Duty cycle = 0; VFB=1.5 V
Vinh > 2.2 V
2.5
mA
50
80
100
µA
Total stand-by
quiescent current
Iqst-by
VC C= 36 V;
Vinh > 2.2 V
150
µA
Inhibit
Device ON
0.8
V
V
INH threshold voltage
Device OFF
2.2
3.5
Error amplifier
High level output
voltage
VOH
VFB = 1 V
V
V
Low level output
voltage
VOL
VFB = 1.5 V
0.4
Io source
190
1
300
1.5
µA
V
COMP = 1.9 V; VFB = 1 V
Source output current
Sink output current
Io sink
Ib
mA
VCOMP = 1.9 V; VFB = 1.5 V
Source bias current
DC open loop gain
2.5
65
4
µA
RL = ∞
50
dB
5/11
A5973D
Table 4.
Symbol
gm
Electrical characteristics (continued)
(T = -40 °C to 125 °C, VCC = 12 V, unless otherwise specified)
J
Parameter
Test condition
Min
Typ
Max
Unit
ICOMP = -0.1 mA to 0.1 mA;
Transconductance
2.3
mS
VCOMP = 1.9 V
Synch function
High input voltage
2.5
VREF
0.74
V
V
VCC= 4.4 to 36 V;
VCC= 4.4 to 36 V;
Low input voltage
Vsynch= 0.74 V (1)
Vsynch= 2.33 V
0.11
0.21
0.25
0.45
Slave synch current
mA
Master output
amplitude
Isource= 3 mA
2.75
0.20
3
V
Output pulse width
0.35
µs
no load, Vsynch= 1.65 V
Reference section
I
REF = 0 to 5 mA
CC = 4.4 V to 36 V
Reference voltage
Line regulation
3.2
3.3
5
3.399
10
V
V
I
REF = 0 mA
mV
VCC = 4.4 V to 36 V
Load regulation
8
15
35
mV
mA
I
REF = 0 mA
Short circuit current
5
18
1. Guarantee by design
6/11
Typical characteristics
A5973D
4
Typical characteristics
Figure 2.
Line regulatior
Figure 3.
Shutdown current vs junction
temperature
Figure 4.
Output voltage vs junction
temperature
Figure 5.
Switching frequency vs
junction temperature
Figure 6.
Quiescent current vs junction
temperature
7/11
A5973D
Figure 7.
Junction temperature vs
output current
Figure 8.
Junction temperature vs
output current
Figure 9.
Efficiency vs output current Figure 10. Efficiency vs output current
8/11
Package mechanical data
A5973D
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/11
A5973D
Table 5.
Dim
HSOP8 mechanical data
mm
inch
Typ
Min
Typ
Max
Min
Max
A
A1
A2
b
1.70
0.10
0.0669
0.0039
0.00
1.25
0.31
0.17
4.80
3
0.00
0.0492
0.0122
0.0067
0.1890
0.118
0.51
0.25
5.00
3.2
0.0201
0.0098
0.1969
0.126
c
D
4.90
3.1
0.1929
0.122
D1
E
5.80
3.80
2.31
6.00
3.90
2.41
1.27
6.20
4.00
2.51
0.2283
0.1496
0.091
0.2441
0.1575
0.099
E1
E2
e
0.095
h
0.25
0.40
0.50
1.27
0.0098
0.0157
0.0197
0.0500
L
k
0° (min), 8° (max)
ccc
0.10
0.0039
Figure 11. Package dimensions
10/11
Revision history
A5973D
6
Revision history
Table 6.
Date
Document revision history
Revision
Changes
06-Aug-2007
23-Oct-2007
07-Jan-2008
02-May-2008
1
2
3
4
Initial release
Updated: Table 4 on page 5, Table 5 on page 10
Updated Table 5 on page 10
Updated Table 4 on page 5
11/11
A5973D
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