E-STA2051 [STMICROELECTRONICS]

32-BIT, FLASH, 66MHz, RISC MICROCONTROLLER, PQFP64, TQFP-64;
E-STA2051
型号: E-STA2051
厂家: ST    ST
描述:

32-BIT, FLASH, 66MHz, RISC MICROCONTROLLER, PQFP64, TQFP-64

时钟 外围集成电路
文件: 总7页 (文件大小:150K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
STA2051  
32-bit single chip baseband controller  
for GPS and telematic applications  
Data Brief  
Features  
Suitable for automotive applications  
ARM7TDMI 16/32 bit RISC CPU based host  
microcontroller.  
Complete embedded memory system:  
– Flash 256 KB + 16 KB (100K  
erasing/programming cycles)  
TQFP64  
TQFP144  
16-bit watchdog timer with 8 bits prescaler for  
system reliability and integrity.  
– RAM 64 KB  
External memory interface provides glueless  
support for up to four banks of external SRAM,  
Flash, ROM.  
CAN module compliant with the CAN  
specification V2.0 part B (active). The bit rate  
can be programmed up to 1 MBaud.  
12 channel GPS correlation DSP:  
Four16-bit programmable timers with 7 bit  
prescaler, up to two input capture/output  
compare, one pulse counter function, one  
PWM channel with selectable frequency each.  
– no TCXO required  
– RTCA-SC159 / WAAS / EGNOS support  
GPS performance  
4 channels 12-bit sigma-delta analog to digital  
converter, single channel or multi channel  
conversion modes, single-shotor continuous  
conversion modes, sample rate1KHz (4 KHz  
when single channel), conversion range 0-2.5V.  
– accuracy: stand alone <30m; differential  
<1m; surveying <1cm  
– time to first fix: autonomous start 90s; cold  
start 45s; warm start 7s; obscuration 1s.  
CMOS M8T (0.18 µm) technology.  
-40°C to 85°C operating temperature range.  
Packaged in TQFP 64-pin or 144-pin  
Power supply:  
Three serial communication interfaces (UART)  
allow full duplex, asynchronous,  
communications with external devices,  
independently programmable TX and RX baud  
rates up to 625K baud.  
– 2.7V to 3.6V operating supply range for  
input/output periphery  
– 3V to 3. V operating supply range for A/ D  
Converter reference  
One UART adapted to suit smart card interface  
needs, for asynchronous SC as defined by ISO  
7816-3; it includes SC clock generation..  
Two serial peripheral interfaces (SPI) allow full  
duplex, synchronous communications with  
external devices, master or slave operation,  
max baud rate: 8Mb/s. One SPI may be used  
as multimedia card interface.  
– 1.8V operating supply range for core supply  
provided either by internal voltage regulator  
with external stabilization capacitor, or by  
external supply for higher power efficiency.  
0-66MHz internal clock frequency managed by  
a reset and clock control unit; the unitisable to  
provide low power modes (Wait, Slow, Stop,  
Standby) and to generate the internal clock from  
the external reference through integrated PLL.  
48 programmable general purpose I/O, each  
pin programmable independently as digital  
input or digital output; 40 (30 in TQFP64) are  
multiplexed with peripheral functions; 16 can  
generate an interrupt on input level/transition  
Two I2C interfaces provide multi-master and  
slave functions, support normal and fast I2C  
mode (400 kHz), 7/10 bit addressing modes.  
One I2C interface is multiplexed with one SPI,  
so either 2xSPI+1xI2C or 1xSPI+2xI2C may be  
used at a time.  
USB unit V1.1 compliant, software configurable  
end point setting, USB Suspend/Resume  
support. (TQFP144 only)  
High Level Data Link Controller (HDLC) unit  
supports full duplex operating mode, NRZ,  
NRZI, FM0 and MANCHESTER modes,  
internal 8bit Baud Rate Generator.  
Real time clock module with 3 2 kHz low power  
oscillator and separate power supply to  
continue running during stand-by mode.  
December 2008  
Rev 3  
1/7  
For further information contact your local STMicroelectronics sales office.  
www.st.com  
STA2051  
1
System block and pin connection diagrams  
Figure 1.  
System block diagram  
2/7  
STA2051  
Figure 2.  
TQFP144 pin connection diagram (top view)  
3/7  
STA2051  
Figure 3.  
LQFP64 pin connection diagram (top view)  
4/7  
STA2051  
2
Ordering information  
Table 1.  
Device summary  
Order code  
Package  
Packing  
STA2051  
STA2051TR  
STA2051E  
TQFP64  
TQFP64  
TQFP144  
TQFP144  
TQFP64  
TQFP64  
Tray  
Tape and reel  
Tray  
STA2051ETR  
E-STA2051  
E-STA2051TR  
Tape and reel  
Tray  
Tape and reel  
5/7  
 
STA2051  
3
Revision history  
Table 2.  
Date  
Document revision history  
Revision  
Changes  
24-Sep-1994  
25-Jan-2004  
1
2
Initial release.  
Added a new feature (first bullet).  
Reformatted document.  
05-Dec-2008  
3
Updated Section 2: Ordering information.  
6/7  
STA2051  
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7/7  

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