HCC4033B [STMICROELECTRONICS]

7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED; 7段显示输出十进制计数器/分频器与DECODED
HCC4033B
型号: HCC4033B
厂家: ST    ST
描述:

7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED
7段显示输出十进制计数器/分频器与DECODED

计数器 输出元件
文件: 总15页 (文件大小:320K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HCC/HCF4026B  
HCC/HCF4033B  
DECADE COUNTERS/DIVIDERS WITH DECODED  
7-SEGMENT DISPLAY OUTPUTS  
WITH; DISPLAY ENABLE 4026B  
RIPPLE BLANKING 4033B  
.
.
.
COUNTER AND 7-SEGMENT DECODING IN  
ONE PACKAGE  
EASILY INTERFACED WITH 7-SEGMENT DIS-  
PLAY TYPES  
FULLY STATIC COUNTER OPERATION : DC  
TO 6MHz (typ.) AT VDD = 10V  
IDEAL FOR LOW-POWER DISPLAYS  
DISPLAY ENABLE OUTPUT - 4026B  
”RIPPLE BLANKING” AND LAMP TEST - 4033B  
QUIESCENT CURRENT SPECIFIED TO 20V  
FOR HCC DEVICE  
STANDARDIZED SYMMETRICAL OUTPUT  
CHARACTERISTICS  
5V, 10V, AND 15V PARAMETRIC RATING  
INPUT CURRENT OF 100nA AT 18V AND 25°C  
FOR HCC DEVICE  
EY  
F
(Plastic Package)  
(Ceramic Frit Seal Package)  
.
.
.
.
M1  
C1  
(Micro Package)  
.
(Plastic Chip Carrier)  
ORDER CODES :  
HCC40XXBF  
HCF40XXBEY  
.
HCF40XXBM1  
HCF40XXBC1  
.
.
.
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVESTANDARDN°13A, ”STANDARD SPE-  
CIFICATIONS FOR DESCRIPTION OF ”B”  
SERIES CMOS DEVICES”  
PIN CONNECTIONS  
DESCRIPTION  
The HCC4026B/4033B (extended temperature  
range) and HCF4026B/4033B (intermediate tem-  
perature range) are monolithic integrated circuits,  
available in 16-lead dual in-line plastic or ceramic  
package and plastic micro package. The  
HCC/HCF4026B and HCC/HCF4033B each con-  
sist of a 5-stage Johnson decade counter and an  
output decoder which converts the Johnson code to  
a 7-segment decoded output for driving one stage  
in a numerical display. These devices are particu-  
larly advantageous in display applications where  
low power dissipation and/or low package count are  
important. Inputs common to both types are  
CLOCK, RESET, & CLOCK INHIBIT ; common out-  
puts are CARRY OUT and the seven decoded out-  
puts (a, b, c, d, e, f, g). Additional inputs and outputs  
for the HCC/HCF4026B include DISPLAY ENABLE  
input and DISPLAY ENABLE and UNGATED ”C-  
SEGMENT” outputs. Signals peculiar to the  
HCC/HCF4033B are RIPPLE-BLANKING INPUT  
AND LAMP TEST INPUT and a RIPPLE-BLANK-  
ING OUTPUT. A high RESET signal clears the de-  
4026B  
4033B  
June 1989  
1/15  
HCC/HCF4026B/4033B  
cade counter to its zero count. The counter is ad-  
vanced one count at the positive clock signal tran-  
sition if the CLOCK INHIBIT signal is low. Counter  
advancement via the clock line is inhibited when the  
CLOCK INHIBIT signal is high. Antilock gating is  
provided on the JOHNSON counter, thus assuring  
normal writing practice. For example, the number  
0050.07000 in an eight digit display would be dis-  
played as 50.07. Zero suppression on the integer  
side is obtained by connecting the RBI terminal of  
the HCC/HCF4033B associated with the most sig-  
nificant digit in the display to a low-level voltage and  
connecting the RBOterminal of that stageto the RBI  
terminal of the HCC/HCF4033B in the next-lower  
significant position in the display. This procedure is  
continued for each succeeding HCC/HCF4033B on  
the integer side of the display. On the fraction side  
of the display the RBI of the HCC/HCF4033B asso-  
ciated with the least significant bit is connected to a  
low-level voltage and the RBO of that HCC/-  
HCF4033B is connected to the RBI terminal of the  
HCC/HCF4033B in the next more-significant-bit po-  
sition. Again, this procedure is continued for all  
HCC/HCF4033B’s on the fraction side of the dis-  
play. In a purely fractional number the zero immedi-  
ately preceding the decimal point can be displayed  
by connecting the RBI of that stage to a high level  
voltage (instead of to the RBO of the next more-sig-  
nificant-stage). For example : optional zero →  
0.7346. Likewise, the zero in a number such as  
763.0 can bedisplayed by connecting the RBI of the  
HCC/HCF4033B associated with it to a high-level  
voltage. Ripple blanking of non-significant zeros  
provides an appreciable savings in display power.  
The HCC/HCF4033B has a LAMP TEST input  
which, when connected to a high-level voltage,  
overrides normal decoder operation and enables a  
check to be made on possible display malfunctions  
by putting the seven outputs in the high state.  
proper counting sequence. The CARRY-OUT (Cout  
)
signal completes one cycle every ten CLOCK  
INPUT cycles and is used to clock the succeeding  
decade directly in a multi-decade counting chain.  
The seven decoded outputs (a, b, c, d, e, f, g) illumi-  
nate the proper segments in a seven segment dis-  
play device used for representing the decimal  
numbers 0 to 9. The 7-segment outputs go high on  
selection in the HCC/HCF4033B ; in the HCC/-  
HCF4026B these outputs go high only when the  
DISPLAY ENABLE IN is high.  
HCC/HCF4026B - When the DISPLAY ENABLE IN  
is low the seven decoded outputs are forced low re-  
gardless of the state of the counter. Activation of the  
display only when required results in significant  
power savings. This system also facilitates im-  
plementation of display-character multiplexing. The  
CARRY OUT and UNGATED ”C-SEGMENT” sig-  
nals are not gated by the DISPLAY ENABLE and  
therefore are available continuously. This feature is  
a requirement in implementation of certain divider  
functions such as divide-by-60 and divide-by-12.  
HCC/HCF4033B - The HCC/HCF4033B has provi-  
sions for automatic blanking of the non-significant  
zeros in a multi-digit decimal number which results  
in an easily readable display consistent with  
2/15  
HCC/HCF4026B/4033B  
FUNCTIONAL DIAGRAMS  
4026B  
4033B  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
Unit  
VDD  
*
Supply Voltage : HCC Types  
HCF Types  
– 0.5 to + 20  
– 0.5 to + 18  
V
V
Vi  
II  
Input Voltage  
– 0.5 to VDD + 0.5  
V
DC Input Current (any one input)  
± 10  
mA  
mW  
Ptot  
Total Power Dissipation (per package)  
Dissipation per Output Transistor  
200  
for Top = Full Package-temperature Range  
100  
mW  
Top  
Operating Temperature : HCC Types  
HCF Types  
– 55 to + 125  
– 40 to + 85  
°C  
°C  
Tstg  
Storasge Temperature  
– 65 to + 150  
°C  
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec-  
tions of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device  
reliability.  
*
All voltages values are referred to VSS pin voltage.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Supply Voltage : HCC Types  
HCF Types  
Value  
Unit  
VDD  
3 to 18  
3 to 15  
V
V
VI  
Input Voltage  
0 to VDD  
V
To p  
Operating Temperature : HCC Types  
HCF Types  
– 55 to + 125  
– 40 to + 85  
°C  
°C  
3/15  
HCC/HCF4026B/4033B  
LOGIC DIAGRAMS  
4026B  
4033B  
4/15  
HCC/HCF4026B/4033B  
TIMING DIAGRAMS  
4026B  
4033B  
5/15  
HCC/HCF4026B/4033B  
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)  
Test Conditions  
Value  
Symbol  
Parameter  
Unit  
VI  
VO  
| IO| VDD  
TLow  
*
25°C  
THigh*  
(V)  
(V)  
(µA) (V)  
Min. Max. Min. Typ. Max. Min. Max.  
IL  
Quiescent  
Current  
0/ 5  
0/10  
0/15  
0/20  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
5/0  
5
5
10  
20  
100  
20  
40  
80  
0.04  
0.04  
0.04  
5
150  
300  
600  
3000  
150  
300  
600  
10  
15  
20  
5
10  
20  
HCC  
Types  
µA  
0.08 100  
0.04  
0.04  
0.04  
20  
40  
80  
HCF  
Types  
10  
15  
VOH  
VOL  
VIH  
VIL  
Output High  
Voltage  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
5
4.95  
4.95  
9.95  
4.95  
9.95  
V
V
V
V
10 9.95  
15 14.95  
14.95  
14.95  
Output Low  
Voltage  
5
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
10/0  
15/0  
10  
15  
Input High  
Voltage  
0.5/4.5 < 1  
1/9 < 1  
5
10  
15  
5
3.5  
7
3.5  
7
3.5  
7
1.5/13.5 < 1  
4.5/0.5 < 1  
11  
11  
11  
Input Low  
Voltage  
1.5  
3
1.5  
3
1.5  
3
9/1  
< 1  
10  
15  
5
13.5/1.5 < 1  
4
4
4
IOH  
Output  
Drive  
Current  
0/ 5  
0/ 5  
0/10  
0/15  
0/ 5  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
2.5  
4.6  
9.5  
13.5  
2.5  
4.6  
9.5  
13.5  
0.4  
0.5  
1.5  
0.4  
0.5  
1.5  
– 2  
– 1.6 – 3.2  
– 0.51 – 1  
– 1.3 – 2.6  
– 3.4 – 6.8  
– 1.36 – 3.2  
– 0.44 – 1  
– 1.1 – 2.6  
– 3.0 – 6.8  
– 1.15  
– 0.36  
– 0.9  
– 2.4  
– 1.1  
– 0.36  
– 0.9  
– 2.4  
0.36  
5
– 0.64  
HCC  
Types  
10 – 1.6  
15 – 4.2  
mA  
5
5
– 1.53  
– 0.52  
HCF  
Types  
10 – 1.3  
15 – 3.6  
I
OL  
Output  
Sink  
Current  
5
0.64  
1.6  
0.51  
1.3  
1
HCC  
Types  
10  
15  
5
2.6  
6.8  
1
0.9  
4.2  
3.4  
2.4  
mA  
0.52  
1.3  
0.44  
1.1  
0.36  
HCF  
Types  
10  
15  
2.6  
6.8  
0.9  
3.6  
3.0  
2.4  
I , IIL  
IH  
Input  
Leakage  
Current  
HCC  
Types  
0/18  
0/15  
18  
15  
± 0.1  
± 0.3  
±10–5 ± 0.1  
±10–5 ± 0.3  
± 1  
± 1  
Any Input  
µA  
HCF  
Types  
CI  
Input Capacitance  
Any Input  
5
7.5  
pF  
(*) TLow= – 55°C for HCC device : – 40°C for HCF device.  
THigh= + 125°C for HCC device : + 85°C for HCF device.  
The Noise Margin for both ”1” and ”0” level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5V min. with VDD = 15V.  
6/15  
HCC/HCF4026B/4033B  
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200k,  
typical temperature coefficient for all VDD values is 0.3%/°C, all input rise and fall times = 20ns)  
Test Conditions  
Value  
Symbol  
Parameter  
Unit  
V DD (V) Min. Typ. Max.  
CLOCKED OPERATION  
t
t
PLH, tPHL Propagation Delay Time  
Carry Out Line  
5
250  
100  
75  
500  
200  
150  
700  
250  
180  
200  
100  
50  
ns  
ns  
10  
15  
5
PLH, tPHL Propagation Delay Time  
Decode Out Lines  
350  
125  
90  
10  
15  
5
t
THL, tTLH Transition Time  
Carry Out Line  
100  
50  
ns  
10  
15  
5
25  
fCL  
*
Maximum Clock Input Frequency  
Clock Pulse Width  
2.5  
5.5  
8
5
MHz  
10  
15  
5
11  
16  
tWC  
110  
50  
270  
100  
80  
ns  
10  
15  
40  
tr, tf  
Clock Input Rise or Fall Time  
5
Unlimited  
µs  
10  
15  
RESET OPERATION  
tPLH  
,
Propagation Delay Time  
Carry Out Line  
5
275  
120  
80  
300  
125  
90  
100  
50  
25  
0
550  
240  
160  
600  
250  
180  
120  
100  
50  
ns  
ns  
ns  
ns  
10  
15  
5
t
PLH, tPHL Propagation Delay Time  
Decode Out Lines  
10  
15  
5
tWR  
Reset Pulse Width  
10  
15  
5
trem  
Reset Removal Time  
30  
10  
15  
0
15  
0
10  
* Measured with respect to carry output line.  
7/15  
HCC/HCF4026B/4033B  
Typical Output Low (sink) Current.  
Minimum Output Low(sink) Current Characteristics.  
Typical Output High (source) Current Charac-  
teristics.  
Minimum Output High (source) Current Charac-  
teristics.  
TYPICAL APPLICATIONS  
Interfacing with Filament Fluorescent Display.  
Detail of Typical Flip-flop Stage for Both Types.  
8/15  
HCC/HCF4026B/4033B  
TYPICAL APPLICATIONS (continued)  
Interfacing with LED Displays (display common  
anode).  
(Display Common Cathode).  
Interfacing with NIXIE Tube.  
9/15  
HCC/HCF4026B/4033B  
Interfacing with Liquid Cristal Displays.  
TEST CIRCUITS  
Quiescent Device Current.  
Input Voltage.  
Input Current.  
10/15  
HCC/HCF4026B/4033B  
Plastic DIP16 (0.25) MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
0.51  
0.77  
TYP.  
MAX.  
MIN.  
0.020  
0.030  
MAX.  
a1  
B
b
1.65  
0.065  
0.5  
0.020  
0.010  
b1  
D
E
e
0.25  
20  
0.787  
8.5  
2.54  
17.78  
0.335  
0.100  
0.700  
e3  
F
7.1  
5.1  
0.280  
0.201  
I
L
3.3  
0.130  
Z
1.27  
0.050  
P001C  
11/15  
HCC/HCF4026B/4033B  
Ceramic DIP16/1 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
20  
MIN.  
MAX.  
0.787  
0.276  
A
B
7
D
E
3.3  
0.130  
0.700  
0.38  
0.015  
e3  
F
17.78  
2.29  
0.4  
2.79  
0.55  
1.52  
0.31  
1.27  
10.3  
8.05  
5.08  
0.090  
0.016  
0.046  
0.009  
0.020  
0.110  
0.022  
0.060  
0.012  
0.050  
0.406  
0.317  
0.200  
G
H
L
1.17  
0.22  
0.51  
M
N
P
7.8  
0.307  
Q
P053D  
12/15  
HCC/HCF4026B/4033B  
SO16 (Narrow) MECHANICAL DATA  
mm  
inch  
DIM.  
MIN.  
TYP.  
MAX.  
1.75  
0.2  
MIN.  
TYP.  
MAX.  
0.068  
0.007  
0.064  
0.018  
0.010  
A
a1  
a2  
b
0.1  
0.004  
1.65  
0.46  
0.25  
0.35  
0.19  
0.013  
0.007  
b1  
C
0.5  
0.019  
c1  
D
45° (typ.)  
9.8  
5.8  
10  
0.385  
0.228  
0.393  
0.244  
E
6.2  
e
1.27  
8.89  
0.050  
0.350  
e3  
F
3.8  
4.6  
0.5  
4.0  
5.3  
0.149  
0.181  
0.019  
0.157  
0.208  
0.050  
0.024  
G
L
1.27  
0.62  
M
S
8° (max.)  
P013H  
13/15  
HCC/HCF4026B/4033B  
PLCC20 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
10.03  
9.04  
MIN.  
0.385  
0.350  
0.165  
MAX.  
0.395  
0.356  
0.180  
A
B
9.78  
8.89  
4.2  
D
4.57  
d1  
d2  
E
2.54  
0.56  
0.100  
0.022  
7.37  
8.38  
0.290  
0.330  
0.004  
e
1.27  
5.08  
0.38  
0.050  
0.200  
0.015  
e3  
F
G
0.101  
M
M1  
1.27  
1.14  
0.050  
0.045  
P027A  
14/15  
HCC/HCF4026B/4033B  
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No  
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned  
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.  
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin life support devices or systems without express  
written approval of SGS-THOMSON Microelectonics.  
1994 SGS-THOMSON Microelectronics - All Rights Reserved  
SGS-THOMSON Microelectronics GROUP OF COMPANIES  
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -  
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A  
15/15  

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