HCC4536BF [STMICROELECTRONICS]

PROGRAMMABLE TIMER; 可编程定时器
HCC4536BF
型号: HCC4536BF
厂家: ST    ST
描述:

PROGRAMMABLE TIMER
可编程定时器

计时器或实时时钟 微控制器和处理器 外围集成电路
文件: 总17页 (文件大小:352K)
中文:  中文翻译
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HCC/HCF4536B  
PROGRAMMABLE TIMER  
.
.
.
24 FLIP-FLOP STAGES - COUNTS FROM  
20 TO 224  
LAST 16 STAGES SELECTABLE BY BCD SE-  
LECT CODE  
BYPASS INPUT ALLOWS BYPASSING FIRST  
8 STAGES  
ON-CHIP RC OSCILLATOR PROVISION  
CLOCK INHIBIT INPUT  
SCHMITT-TRIGGER IN CLOCK LINE PER-  
MITS OPERATION WITH VERY LONG RISE  
AND FALL TIMES  
ON-CHIP MONOSTABLE OUTPUT PROVI-  
SION  
TYPICAL fCL = 3MHz AT VDD = 10V  
TEST MODE ALLOWS FAST TEST SE-  
QUENCE  
EY  
F
.
.
.
(Plastic Package)  
(Ceramic Package)  
.
C1  
.
.
(Chip Carrier)  
ORDER CODES :  
HCC4536BF  
HCF4536BEY  
HCF4536BC1  
.
.
SET AND RESET INPUTS  
CAPABLE OF DRIVING TWO LOW POWER  
TTL  
LOADS,  
ONE  
LOWER-POWER  
SCHOTTKY LOAD, OR TWO HTL LOADS  
OVER THE RATED TEMPERATURE RANGE  
STANDARDIZED, SYMMETRICAL OUTPUT  
CHARACTERISTICS  
QUIESCENT CURRENT AT 20V FOR HCC DE-  
VICE  
5V, 10V, AND 15V PARAMETRIC RATINGS  
INPUT CURRENT OF100 nA AT 18V AND 25°C  
FOR HCC DEVICE  
100% TESTED FOR QUIESCENT CURRENT  
MEETS ALLREQUIREMENTS OF JEDECTEN-  
TATIVE STANDARD No. 13A, ”STANDARD  
SPECIFICATIONS FOR DESCRIPTION OF ”B”  
SERIES CMOS DEVICES”  
.
PIN CONNECTIONS  
.
.
.
.
.
DESCRIPTION  
The HCC4536B (extended temperature range) and  
HCF4536B (intermediate temperature range) are  
monolithic integrated circuits, available in 16-lead  
dual in-line plastic or ceramic package. The  
HCC/HCF4536B is a programmable timer consi-  
sting of 24 ripple-binary counter stages. The salient  
feature of this device is its flexibility. The device can  
count from 1 to 224 or the first 8 stages can be by-  
passed to allow an output, selectable by a 4-bit co-  
de, from any one of the remaining 16 stages. It can  
be driven by an external clock or an RC oscillator  
that can be constructed using on-chip components.  
November 1996  
1/17  
HCC/HCF4536B  
Input IN1 serves as either the external clock input or  
the input to the on-chip RC oscillator. OUT1 and  
OUT2 are connection terminals for the external RC  
components. In addition, an on-chip monostable cir-  
cuit is provided to allow a variable pulse width out-  
put. Various timing functions can be achieved using  
combinations of these capabilities. A logic 1 on the  
8-BYPASS input enables a bypass of the first 8 sta-  
ges and makes stage 9 the first counter stage of the  
last 16stages. Selection of 1 of16 outputs isaccom-  
plished by the decoder and the BCD inputs A, B, C  
and D. MONO IN is the timing input for the on-chip  
monostable oscillator. Grounding of the MONO IN  
terminal through a resistor of 10Kor higher, disa-  
bles the one-shot circuit and connects the decoder  
directly to the DECODE OUT terminal. A resistor to  
VDD and a capacitor to ground from the MONO IN  
terminal enables the one-shot circuit and controls its  
pulse width. A fast test mode is enabled by a logic  
1 on 8-BYPASS, SET, and RESET. This mode di-  
vides the 24-stage counter into three 8-stage sec-  
tions to facilitate a fast test sequence.  
FUNCTIONAL DIAGRAM  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Supply Voltage : HCC Types  
HCF Types  
Value  
Unit  
VDD  
*
– 0.5 to + 20  
– 0.5 to + 18  
V
V
Vi  
II  
Input Voltage  
– 0.5 to VDD + 0.5  
V
DC Input Current (any one input)  
± 10  
mA  
mW  
Pt ot  
Total Power Dissipation (per package)  
Dissipation per Output Transistor  
200  
for Top = Full Package-temperature Range  
100  
mW  
To p  
Tstg  
Operating Temperature : HCC Types  
HCF Types  
– 55 to + 125  
– 40 to + 85  
°C  
°C  
Storage Temperature  
– 65 to + 150  
°C  
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and  
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not  
implied. Exposure to absolute maximum ratingconditions for external periods may affect device reliability.  
* All voltages are with respect to VSS (GND).  
2/17  
HCC/HCF4536B  
BLOCK DIAGRAM  
DECODE OUT SELECTION TABLE  
TRUTH TABLE  
Number or Stages  
In Divider Chain  
Clock Osc  
Inh Inh  
Decode  
Out  
In1 Set Reset  
Out1 Out2  
D
C
B
A
8-BYPASS = 0 8-BYPASS = 1  
No  
Change  
0
0
0
0
0
0
0
0
/
/
\
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
9
1
2
3
4
10  
11  
12  
Advance  
to Next  
State  
\
/
\
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
13  
14  
15  
16  
5
6
7
8
X
X
1
0
0
1
0
0
0
0
0
0
1
1
1
0
No  
Change  
X
0
0
0
0
0
1
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
17  
18  
19  
20  
9
No  
Change  
10  
11  
12  
X
0
1
Advance  
to Next  
State  
1
0
0
0
/
\
/
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
21  
22  
23  
24  
13  
14  
15  
16  
0 = Low Level  
0 = Low Level  
3/17  
HCC/HCF4536B  
LOGIC DIAGRAMS (continued on next page)  
4/17  
HCC/HCF4536B  
LOGIC DIAGRAMS (continued)  
5/17  
HCC/HCF4536B  
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)  
Test Conditions  
Value  
Symbol  
Parameter  
Unit  
VI  
VO  
|IO  
|
VD D  
T Lo w  
*
25°C  
T High*  
(V)  
(V)  
(µA) (V)  
Min. Max. Min. Typ. Max. Min. Max.  
IL  
Quiescent  
Current  
0/ 5  
0/10  
0/15  
0/20  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
5/0  
5
5
10  
20  
100  
20  
40  
80  
0.04  
0.04  
0.04  
5
150  
300  
600  
3000  
150  
300  
600  
10  
15  
20  
5
10  
20  
HCC  
Types  
µA  
0.08 100  
0.04  
0.04  
0.04  
20  
40  
80  
HCF  
Types  
10  
15  
VOH  
VOL  
VIH  
VIL  
Output High  
Voltage  
< 1  
< 1  
< 1  
< 1  
< 1  
< 1  
5
4.95  
4.95  
9.95  
4.95  
9.95  
V
V
10 9.95  
15 14.95  
14.95  
14.95  
Output Low  
Voltage  
5
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
10/0  
15/0  
10  
15  
Input High  
Voltage  
0.5/4.5 < 1  
1/9 < 1  
5
10  
15  
5
3.5  
7
3.5  
7
3.5  
7
V
V
1.5/13.5 < 1  
4.5/0.5 < 1  
11  
11  
11  
Input Low  
Voltage  
1.5  
3
1.5  
3
1.5  
3
9/1  
< 1  
10  
15  
5
13.5/1.5 < 1  
4
4
4
IOH  
Output  
Drive  
Current  
0/ 5  
0/ 5  
0/10  
0/15  
0/ 5  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
0/ 5  
0/10  
0/15  
2.5  
4.6  
9.5  
13.5  
2.5  
4.6  
9.5  
13.5  
0.4  
0.5  
1.5  
0.4  
0.5  
1.5  
– 2  
– 1.6 – 3.2  
– 0.51 – 1  
– 1.3 – 2.6  
– 3.4 – 6.8  
– 1.36 – 3.2  
– 0.44 – 1  
– 1.1 – 2.6  
– 3.0 – 6.8  
– 1.15  
– 0.36  
– 0.9  
– 2.4  
– 1.1  
– 0.36  
– 0.9  
– 2.4  
0.36  
5
– 0.64  
HCC  
Types  
10 – 1.6  
15 – 4.2  
mA  
5
5
– 1.53  
– 0.52  
HCF  
Types  
10 – 1.3  
15 – 3.6  
IOL  
Output  
Sink  
Current  
5
0.64  
1.6  
0.51  
1.3  
1
HCC  
Types  
10  
15  
5
2.6  
6.8  
1
0.9  
4.2  
3.4  
2.4  
mA  
0.52  
1.3  
0.44  
1.1  
0.36  
HCF  
Types  
10  
15  
2.6  
6.8  
0.9  
3.6  
3.0  
2.4  
I
IH, IIL Input  
HCC  
Types  
0/18  
0/15  
± 0.1  
± 0.3  
±105 ± 0.1  
± 1  
± 1  
18  
15  
Leakage  
Current  
Any Input  
µA  
HCF  
Types  
±105 ± 0.3  
CI  
Input Capacitance  
Any Input  
5
7.5  
pF  
* TLow = – 55°C for HCC device: – 40°C for HCF device.  
* THigh= + 125°C for HCC device : + 85°C for HCF device.  
The Noise Margin for both ”1” and ”0” level is : 1V min. with VDD = 5V , 2V min. with VDD = 10V, 2.5 V min. with VDD =15V.  
6/17  
HCC/HCF4536B  
o
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25 C, CL = 50 pF, RL = 200 K,  
typical temperature coefficent for all VDD values is 03 %/oC, all input rise and fall times= 20 ns)  
Test Conditions  
VDD (V) Min.  
Value  
Typ.  
1
Symbol  
Parameter  
Propagation Delay Time  
Unit  
Max.  
2
tPLH  
tPHL  
5
Clock to Q1, 8-bypass High  
µs  
10  
15  
5
0.5  
0.35  
2.5  
0.8  
0.6  
4
1
0.7  
5
Clock to Q1, 8-bypass Low  
µs  
µs  
10  
15  
5
1.6  
1.2  
8
Clock to Q16  
10  
15  
5
1.5  
1
3
2
Qn to Qn + 1  
150  
75  
300  
150  
100  
600  
250  
160  
6
ns  
10  
15  
5
50  
tPLH  
Propagation Delay Time  
Reset to Qn  
300  
125  
80  
ns  
10  
15  
5
tPHL  
3
µs  
10  
15  
5
1
2
0.75  
100  
50  
1.5  
200  
100  
80  
400  
150  
100  
400  
200  
120  
6
tTLH  
tTHL  
Transition Time  
ns  
10  
15  
5
40  
tW  
Pulse Width  
Clock  
200  
75  
ns  
10  
15  
5
50  
Set  
200  
100  
60  
ns  
10  
15  
5
Reset  
3
µs  
10  
15  
5
1
2
0.75  
2.5  
1
1.5  
5
Recovery Time  
Set  
µs  
10  
15  
5
2
0.6  
3.5  
1.5  
1
1.6  
7
Reset  
µs  
10  
15  
5
3
2
tr, tf  
Clock Input Rise or Fall Time  
Maximum Clock Input Frequency  
Unlimted  
µs  
MHz  
10  
15  
fCL  
0.5  
1.5  
2.5  
1
3
5
10  
15  
7/17  
HCC/HCF4536B  
Output Low (sink) Current Characteristics.  
Output High (source) Current Characteristics.  
Typical Transition Time vs. Load Capacitance.  
Typical Propagation Delay Time vs. Load Capacit-  
ance (clock to Q1, 8 Bypass high).  
Typical Propagation Delay Time vs. Load Capacit-  
ance (Clock to Q1, 8 Bypass low).  
Typical Propagation Delay Time vs. Load Capacit-  
ance (Clock to Q16, 8 Bypass high).  
8/17  
HCC/HCF4536B  
Typical Propagation Delay Time vs. Load Capacit-  
ance (QN to QN+1).  
Typical RC Oscillator Frequency Deviation vs.  
Supply Voltage.  
Typical RC Oscillator Frequency Deviation vs.  
Time Constant Resistance and Capacitance.  
Typical RC Oscillator Frequency Deviation vs. Am-  
bient Temperature (RS = 0).  
Typical RC Oscillator Frequency Deviation vs. Am-  
bient Temperature (RS = 120KΩ).  
Typical Pulse Width vs. External Capacitance  
(VDD = 5V).  
9/17  
HCC/HCF4536B  
Typical Pulse Width vs. External Capacitance  
(VDD = 10V).  
Typical Pulse Width vs. External Capacitance  
(VDD = 15V).  
Typical Dynamic Power Dissipation vs. Input  
Pulse Frequency.  
TYPICAL APPLICATIONS  
Time Internal Configuration Using External Clock  
; Set and Clock Inhibit Functions.  
Time Internal Configuration Using External Clock  
; Reset and Output Monostable to Achieve a  
Pulse Output.  
10/17  
HCC/HCF4536B  
TYPICAL APPLICATIONS (Continued)  
Time Internal Configuration Using Onchip RC Os-  
cillator and Reset Input to Initiate Time Interval.  
Application Showing Use of 4098B and 4536B to  
get Decode Pulse 8 Clock Pulses after Reset  
TIMING DIAGRAM  
11/17  
HCC/HCF4536B  
Functional Test Sequence  
Outputs  
Inputs  
Comments  
Decade Out  
Q 1 Thru Q24  
In1  
Set Reset 8-Bypass  
All 24 steps are in reset mode.  
1
1
0
1
1
1
1
1
0
Counter is in three 8-stage section in parallel  
mode.  
0
0
1
1
1
1
1
1
0
First ”1to ”0” Transition of Clock  
1
0
255 ”1to ”0transitions are clocked in the  
counter.  
0
1
0
1
0
1
0
1
1
The 255 ”1to ”0” Transition  
Counter converted back to 24 stages in series  
mode.  
Set and Reset must be connected together and  
simultaneoulsy go from ”1” to ”0”.  
0
1
0
0
0
0
0
0
0
1
0
In1 switches to a ”1”.  
Counter Ripples from an all ”1” state to an all ”0”  
state.  
FUNCTIONAL TEST SEQUENCE  
Test Function has been included for the reduction of  
test time required to exercise all 24 counter stages.  
at a ”1”. The counter is now returned to the normal  
24-steps in series configuration. One more pulse is  
entered into In1 whichwill causethe counter to ripple  
from an all ”1” state to an all ”0” state.  
This test function divides the counter into three 8-  
stage section and 255 counts are loaded in each of  
the 8-stage sections in parallel. All flip-flops are now  
TEST CIRCUITS  
Quiescent Device Current.  
Input Voltage.  
12/17  
HCC/HCF4536B  
TEST CIRCUITS (continued)  
Input Leakage Current.  
Dynamic Power Dissipation.  
Switching Time.  
Input Waveforms for Switching-Time.  
Functional.  
13/17  
HCC/HCF4536B  
Plastic DIP16 (0.25) MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
0.51  
0.77  
TYP.  
MAX.  
MIN.  
0.020  
0.030  
MAX.  
a1  
B
b
1.65  
0.065  
0.5  
0.020  
0.010  
b1  
D
E
e
0.25  
20  
0.787  
8.5  
2.54  
17.78  
0.335  
0.100  
0.700  
e3  
F
7.1  
5.1  
0.280  
0.201  
I
L
3.3  
0.130  
Z
1.27  
0.050  
P001C  
14/17  
HCC/HCF4536B  
Ceramic DIP16/1 MECHANICAL DATA  
mm  
inch  
DIM.  
MIN.  
TYP.  
MAX.  
20  
MIN.  
TYP.  
MAX.  
0.787  
0.276  
A
B
7
D
E
3.3  
0.130  
0.700  
0.38  
0.015  
e3  
F
17.78  
2.29  
0.4  
2.79  
0.55  
1.52  
0.31  
1.27  
10.3  
8.05  
5.08  
0.090  
0.016  
0.046  
0.009  
0.020  
0.110  
0.022  
0.060  
0.012  
0.050  
0.406  
0.317  
0.200  
G
H
L
1.17  
0.22  
0.51  
M
N
P
7.8  
0.307  
Q
P053D  
15/17  
HCC/HCF4536B  
PLCC20 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
9.78  
8.89  
4.2  
TYP.  
MAX.  
10.03  
9.04  
MIN.  
0.385  
0.350  
0.165  
MAX.  
0.395  
0.356  
0.180  
A
B
D
4.57  
d1  
d2  
E
2.54  
0.56  
0.100  
0.022  
7.37  
8.38  
0.290  
0.330  
0.004  
e
1.27  
5.08  
0.38  
0.050  
0.200  
0.015  
e3  
F
G
0.101  
M
M1  
1.27  
1.14  
0.050  
0.045  
P027A  
16/17  
HCC/HCF4536B  
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No  
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned  
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.  
SGS-THOMSON Microelectronics products are not authorized for use as critical components in lifesupport devices or systems without express  
written approval of SGS-THOMSON Microelectonics.  
1996 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved  
SGS-THOMSONMicroelectronics GROUP OF COMPANIES  
Australia - Brazil - Canada - China - France- Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -  
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A  
.
17/17  

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