HCF4047BC1 [STMICROELECTRONICS]
LOW-POWELOW-POWER MONOSTABLE/ASTABLE MULTIVIBRATOR; LOW- POWELOW功耗单稳态/非稳态多谐振荡器
| 型号： | HCF4047BC1 |
| 厂家： | 
ST |
| 描述： | LOW-POWELOW-POWER MONOSTABLE/ASTABLE MULTIVIBRATOR |
| 文件： | 总15页 (文件大小：304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCC/HCF4047B
LOW-POWER MONOSTABLE/ASTABLE MULTIVIBRATOR
.
.
.
LOW POWER CONSUMPTION : SPECIAL
COS/MOS OSCILLATOR CONFIGURATION
MONOSTABLE (one-shot) OR ASTABLE (free-
running) OPERATION
TRUE AND COMPLEMENTED BUFFERED
OUTPUTS
ONLY ONE EXTERNAL R AND C REQUIRED
BUFFERED INPUTS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTEDFOR QUIESCENT CURRENT
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVESTANDARDN°13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
.
.
.
EY
F
(Plastic Package)
(Ceramic Frit Seal Package)
.
C1
M1
.
(Plastic Chip Carrier)
(Micro Package)
.
ORDER CODES :
.
.
HCC4047BF
HCF4047BEY
HCF4047BM1
HCF4047BC1
PIN CONNECTIONS
DESCRIPTION
The HCC4047B (extended temperature range) and
HCF4047B (intermediate temperature range) are
monolithic integrated circuits, available in 14-lead
dual in-line plastic or ceramic package and plas-
tic micropackage. The HCC/HCF4047B consists of
a gatable astable multivibrator with logic techniques
incorporated to permit positive or negative edge-
triggeredmonostable multivibrator action withretrig-
gering and external counting options. Inputs include
+TRIGGER -TRIGGER, ASTABLE, ASTABLE, RE-
TRIGGER, and EXTERNAL RESET. Buffered out-
puts are Q, Q, and OSCILLATOR. In all modes of
operation, anexternal capacitor must be connected
between C-Timing and RC-Common terminals, and
an external resistor must be connected between the
R-Timing and RC-Common terminals. For operating
modes see functional terminal connections and ap-
plication notes.
June 1989
1/15
HCC/HCF4047B
BLOCK DIAGRAM
FUNCTIONAL TERMINAL CONNECTIONS
Terminal Connections
Output
Pulse
From
Output Period
or
Pulse Width
Function*
Input
Pulse to
to VDD
to VSS
Astable Multivibrator :
Free Running
True Gating
4, 5, 6, 14
4, 6, 14
6, 14
7, 8, 9, 12
7, 8, 9, 12
5, 7, 8, 9 ,12
–
5
4
10, 11, 13
10, 11, 13
10, 11, 13
tA (10, 11) = 4.40RC
tA (13) = 2.20RC
Complement Gating
Monostable Multivibrator :
Positive–Edge Trigger
Negative–Edge Trigger
Retriggerable
4, 14
4, 8, 14
4, 14
14
5, 6, 7, 9, 12
5, 7, 9, 12
5, 6, 7, 9
8
6
10, 11
10, 11
10, 11
10, 11
8, 12
–
tM (10, 11) = 2.48RC
External Countdown**
5, 6, 7, 8, 9, 12
*
In all cases external capacitor and resistor between pins, 1, 2 and 3 (see logic diagrams).
** Input pulse to Reset of External Counting Chip.
External Counting Chip Output to pin 4.
2/15
HCC/HCF4047B
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VDD
*
Supply Voltage : HCC Types
HCF Types
– 0.5 to + 20
– 0.5 to + 18
V
V
Vi
II
Input Voltage
– 0.5 to VDD + 0.5
V
DC Input Current (any one input)
± 10
mA
mW
Ptot
Total Power Dissipation (per package)
Dissipation per Output Transistor
200
for Top = Full Package-temperature Range
100
mW
Top
Operating Temperature : HCC Types
HCF Types
– 55 to + 125
– 40 to + 85
°C
°C
Tstg
Storage Temperature
– 65 to + 150
°C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Supply Voltage : HCC Types
HCF Types
Value
Unit
VDD
3 to 18
3 to 15
V
V
VI
Input Voltage
0 to VDD
V
To p
Operating Temperature : HCC Types
HCF Types
– 55 to + 125
– 40 to + 85
°C
°C
LOGIC DIAGRAM
3/15
HCC/HCF4047B
Detail for Flip-flops FF1 and FF3 (a) and for Flip-flops FF2 and FF4 (b).
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions
Value
Symbol
Parameter
Unit
VI
VO
|IO| VDD
TLow
*
25°C
THigh*
(V)
(V)
(µA) (V)
Min. Max. Min. Typ. Max. Min. Max.
IL
Quiescent
Current
0/ 5
0/10
0/15
0/20
0/ 5
0/10
0/15
0/ 5
0/10
0/15
5/0
5
1
2
0.02
0.02
0.02
0.04
0.02
0.02
0.02
1
2
30
60
10
15
20
5
HCC
Types
4
4
120
600
30
µA
20
4
20
4
HCF
Types
10
15
8
8
60
16
16
120
VOH
VOL
VIH
Output High
Voltage
< 1
5
4.95
4.95
9.95
4.95
9.95
V
V
< 1 10 9.95
< 1 15 14.95
14.95
14.95
Output Low
Voltage
< 1
5
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
10/0
15/0
< 1 10
< 1 15
Input High
Voltage
0.5/4.5 < 1
1/9 < 1 10
1.5/13.5 < 1 15
5
3.5
7
3.5
7
3.5
7
V
11
11
11
* TLow = – 55°C for HCC device : – 40°C for HCF device.
* THigh = + 125°C for HCC device : + 85°C for HCF device.
The Noise Margin for both ”1” and ”0” level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5V min. with VDD = 15V.
4/15
HCC/HCF4047B
STATIC ELECTRICAL CHARACTERISTICS (continued)
Test Conditions
Value
Symbol
Parameter
Unit
VI
VO
|IO| VDD
TLow
*
25°C
THigh*
(V)
(V)
(µA) (V)
Min. Max. Min. Typ. Max. Min. Max.
VIL
Input Low
Voltage
4.5/0.5 < 1
9/1 < 1 10
13.5/1.5 < 1 15
5
1.5
3
1.5
3
1.5
3
V
4
4
4
IOH
Output
Drive
Current
0/ 5
0/ 5
0/10
0/15
0/ 5
0/ 5
0/10
0/15
0/ 5
0/10
0/15
0/ 5
0/10
0/15
2.5
4.6
9.5
13.5
2.5
4.6
9.5
13.5
0.4
0.5
1.5
0.4
0.5
1.5
5
5
– 2
– 1.6 – 3.2
– 0.51 – 1
– 1.3 – 2.6
– 3.4 – 6.8
– 1.36 – 3.2
– 0.44 – 1
– 1.1 – 2.6
– 3.0 – 6.8
– 1.15
– 0.36
– 0.9
– 2.4
– 1.1
– 0.36
– 0.9
– 2.4
0.36
0.9
– 0.64
HCC
Types
10 – 1.6
15 – 4.2
mA
5
5
– 1.53
– 0.52
HCF
Types
10 – 1.3
15 – 3.6
IOL
Output
Sink
Current
5
0.64
1.6
0.51
1.3
1
HCC
Types
10
15
5
2.6
6.8
1
4.2
3.4
2.4
mA
0.52
1.3
0.44
1.1
0.36
0.9
HCF
Types
10
15
2.6
6.8
3.6
3.0
2.4
IIH, IIL
Input
leakage
Curent
HCC
Types
± 1
± 1
0/18
0/15
± 0.1
± 0.3
±10–5 ± 0.1
18
15
Any Input
Any Input
µA
HCF
Types
±10–5 ± 0.3
CI
Input Capacitance
5
7.5
pF
* TLow = – 55°C for HCC device : – 40°C for HCF device.
* THigh = + 125°C for HCC device : + 85°C for HCF device.
The Noise Margin for both ”1” and ”0” level is : 1V min. with VDD = 5V, 2V min. with VDD = 10V, 2.5V min. with VDD = 15V.
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25°C, CL = 50pF, RL = 200kΩ,
typical temperature coefficient for all VDD values is 0.3%/°C, all input rise and fall times = 20ns)
Test Conditions
Value
Symbol
Parameter
Astable, Astable to
Unit
VDD (V) Min.
Typ. Max.
tPLH, tPHL
Propagation
Delay Time
5
200
100
80
400
200
160
700
350
250
1000
450
300
osc. out
10
15
5
Astable, Astable to
Q, Q
350
175
125
500
225
150
10
15
5
ns
+ or – Trigger to
Q, Q
10
15
5/15
HCC/HCF4047B
DYNAMIC ELECTRICAL CHARACTERISTICS (continued)
Test Conditions
Value
Symbol
Parameter
Unit
VDD (V) Min.
Typ. Max.
tPLH, tPHL
Propagation
Delay Time
Retrigger to Q, Q
5
300
150
100
250
100
70
600
300
200
500
200
140
200
100
80
10
15
5
External Reset to
Q, Q
10
15
5
t
THL, tTLH Transition Time Osc. Out Q, Q
100
50
10
15
5
ns
40
tw
Input Pulse
Width :
+ Trigger,
– Trigger
200
80
400
160
100
200
100
60
10
15
5
50
Reset
100
50
10
15
5
30
Retrigger
300
115
75
600
230
150
10
15
5
tr, tf
Input Rise and Fall Time All Inputs
Unlimited
µs
10
15
5
Q or Q Deviation from 50% Duty
Factor
± 0.5
± 0.5
± 1
± 1
%
10
15
± 0.1 ± 0.5
Typical Output Low (sink) Current Charac-
teristics.
Minimum Output Low (sink) Current Charac-
teristics.
6/15
HCC/HCF4047B
Typical Output High (source) Current Charac-
teristics.
Minimum Output High (source) Current Charac-
teristics.
APPLICATION INFORMATION
1 - CIRCUIT DESCRIPTION
the output pulse remains high as long as the input
pulse period is shorter than the period determined
by the RC components. An external countdown op-
tion can be implemented by coupling ”Q” to an ex-
ternal ”N” counter and resetting the counter with the
trigger pulse. The counter output pulse is fed back
to the ASTABLE input and has a duration equal to
N times the period of the multivibrator. A high level
on the EXTERNAL RESET input assures no output
pulse during an ”ON” power condition. This input
can also be activated to terminate the output pulse
at any time. In themonostable mode, a high-level or
power-on reset pulse, must be applied to the EX-
TERNAL RESET whenever VDD is applied.
Astable operation is enabled by a high level on the
ASTABLE input. The period of the square wave at
the Q and Q Outputs in this mode of operation is a
function of the external components employed.
”True” input pulses on the ASTABLE input or ”Com-
plement”pulsesonthe ASTABLE inputallow thecir-
cuit to be used as a gatable multivibrator. The
OSCILLATOR output period will behalf of the Q ter-
minal output in the astable mode. However, a 50%
duty cycle is not guaranteed at this output. In the
monostable mode, positive-edge triggering is ac-
complished by application of a leading-edge pulse
to the +TRIGGERinput and a low level to the –TRI-
GGER input. For negative-edge triggering, a trail-
ing-edge pulse is applied to the –TRIGGER and a
high level is applied to the +TRIGGER. Input pulses
may be of any duration relative to the output pulse.
The multivibrator can be retriggered (on the leading
edge only) by applying a common pulse to both the
RETRIGGER and +TRIGGER inputs. In this mode
2 - ASTABLE MODE
The following analysis presents worst-case vari-
ations from unit-to-unit as afunction of transfer-volt-
age (VTR) shift (33% – 67% VDD) for free-running
(astable) operation.
7/15
HCC/HCF4047B
ASTABLE MODE WAVEFORMS.
VTR
t1 = – RC In
t2 = – RC In
VDD + VTR
VDD – VTR
2 VDD – VTR
(VTR) (VDD – VTR)
tA = 2 (t1 + t2) = –2 RC In
(VDD + VTR) (2 VDD – VTR)
Typ : VTR = 0.5 VDD tA = 4.40 RC
Min : VTR = 0.33 VDD tA = 4.62 RC
Max : VTR = 0.67 VDD tA = 4.62 RC
period may vary as a function of frequency with re-
spect to VDD and temperature.
3 - MONOSTABLE MODE
The following analysis presents worst-case vari-
ations from unit-to-unit as afunction of transfer-volt-
age (VTR) shift (33% – 67% VDD) for one-shot
(monostable) operation.
thus if tA = 4.40 RC is used, the maximum vari-
ation will be (+ 5.0%, – 0.0%)
In addition tovariations from unit-to-unit, the astable
MONOSTABLE WAVEFORMS.
VTR
t1 = – RC In
t2 = – RC In
2 VDD
VDD – VTR
2 VDD – VTR
(VTR) (VDD – VTR)
tM = (t1 + t2) = – RC In
(2 VDD – VTR) (2 VDD
)
Where tM = monostable mode pulse width. Values
for tM are as follows :
modetoextend theoutput-pulse duration, orto com-
pare the frequency of an input signal with that of the
internal oscillator. In the retrigger mode the input
pulseis applied to terminals8and 12, and theoutput
is taken from terminal 10 or 11. As shown in fig. A
normal monostable action is obtained when one re-
trigger pulse is applied. Extended pulse duration is
obtained when more than one pulse is applied. For
two input pulses, tRE = t1’ + t1 + 2t2. For more than
two pulses, tRE (Q OUTPUT) terminates at some
variable time tD after the termination of the last re-
trigger pulse. tD is variable because tRE (Q OUT-
PUT) terminates after the second positive edge of
the oscillator output appears at flip-flop 4 (see logic
diagram).
Typ : VTR = 0.5 VDD tM = 2.48 RC
Min : VTR = 0.33 VDD tM = 2.71 RC
Max : VTR = 0.67 VDD tM = 2.48 RC
Thus if tM = 2.48 RC is used, the maximum vari-
ation will be (+ 9.3%, – 0.0%).
Note : In the astable mode, the first positive half
cyclehas a duration of TM ; succeeding dur-
ations are tA/2.
In addition to variations from unit to unit, the mono-
stable pulse width may vary as a function of fre-
quency with respect to VDD and temperature.
4 - RETRIGGER MODE
The HCC/HCF4047B can be used in the retrigger
8/15
HCC/HCF4047B
Figure A : Retrigger-mode Waveforms.
5 - EXTERNAL COUNTER OPTION
A typical implementation is shown in fig. B. The
pulse duration at the output is
TimetM canbeextended byany amount withtheuse
of external counting circuitry. Advantages include
digitally controlled pulseduration, small timingcapa-
citors for long time periods, and extremely fast re-
covery time.
text = (N – 1) (tA) + (tM + tA/2)
Where text = pulse duration of the circuitry, and N is
the number of counts used.
Figure B : Implementation of External Counter Option.
6 - POWER CONSUMPTION
age used, thecloserthe actual power dissipation will
be to the calculated value.
In the standby mode (Monostable or Astable),
power dissipation will be a function of leakage cur-
rent in the circuit, as shown in the static electrical
characteristics. For dynamic operation, the power
needed to charge the external timing capacitor C is
given by the following formula :
Because the power dissipation does notdepend on
R, adesign for minimum power dissipation wouldbe
a small value of C. The value of R would depend on
the desired period (within the limitations discussed
above).
Astable Mode : P = 2CV2f. (Output at Pin 13)
P = 4CV2f. (Outputat Pin 10 and 11)
7 - TIMING-COMPONENT LIMITATIONS
The capacitor used in the circuit should be non-po-
larized and have low leakage (i.e. the parallel resist-
ance of the capacitor should be an order of
magnitude greater than the external resistor used).
Threeisno upper or lower limit for either RorCvalue
to maintain oscillation.
(2.9CV2) (Duty Cycle)
Monostable Mode : P =
T
(Output at Pin 10 and 11)
The circuit is designed so that most of the total
power is consumed in the external components. In
practice, the lower the valuesof frequency and volt-
However, in consideration of accuracy, C must be
much larger than the inherent stray capacitance in
9/15
HCC/HCF4047B
the system (unless this capacitance can be
measured and taken into account). R must bemuch
larger than the COS/MOS ”ON” resistance in series
with it, which typically is hundreds of ohms. In addi-
tion, with verylarge valuesof R, some short-term in-
stability with respect to time may be noted.
C ≥ 100pF, up to any practical value, for astable
modes ;
C ≥ 1000pF, up to any practical value, for mono-
stable modes.
10KΩ ≤ R ≤ 1MΩ.
The recommended values for these components to
maintain agreement with previously calculated for-
mulas without trimming should be :
TEST CIRCUITS
Quiescent Device Current.
Input Voltage.
Input Current.
10/15
HCC/HCF4047B
Plastic DIP14 MECHANICAL DATA
mm
inch
DIM.
MIN.
0.51
1.39
TYP.
MAX.
MIN.
0.020
0.055
TYP.
MAX.
a1
B
b
1.65
0.065
0.5
0.020
0.010
b1
D
E
e
0.25
20
0.787
8.5
2.54
15.24
0.335
0.100
0.600
e3
F
7.1
5.1
0.280
0.201
I
L
3.3
0.130
Z
1.27
2.54
0.050
0.100
P001A
11/15
HCC/HCF4047B
Ceramic DIP14/1 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
20
MIN.
MAX.
0.787
0.276
A
B
7.0
D
E
3.3
0.130
0.600
0.38
0.015
e3
F
15.24
2.29
0.4
2.79
0.55
1.52
0.31
2.54
10.3
8.05
5.08
0.090
0.016
0.046
0.009
0.060
0.110
0.022
0.060
0.012
0.100
0.406
0.317
0.200
G
H
L
1.17
0.22
1.52
M
N
P
7.8
0.307
Q
P053C
12/15
HCC/HCF4047B
SO14 MECHANICAL DATA
mm
inch
DIM.
MIN.
TYP.
MAX.
1.75
0.2
MIN.
TYP.
MAX.
0.068
0.007
0.064
0.018
0.010
A
a1
a2
b
0.1
0.003
1.65
0.46
0.25
0.35
0.19
0.013
0.007
b1
C
0.5
0.019
c1
D
45° (typ.)
8.55
5.8
8.75
6.2
0.336
0.228
0.344
0.244
E
e
1.27
7.62
0.050
0.300
e3
F
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.026
G
L
1.27
0.68
M
S
8° (max.)
P013G
13/15
HCC/HCF4047B
PLCC20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
9.78
8.89
4.2
TYP.
MAX.
10.03
9.04
MIN.
0.385
0.350
0.165
MAX.
0.395
0.356
0.180
A
B
D
4.57
d1
d2
E
2.54
0.56
0.100
0.022
7.37
8.38
0.290
0.330
0.004
e
1.27
5.08
0.38
0.050
0.200
0.015
e3
F
G
0.101
M
M1
1.27
1.14
0.050
0.045
P027A
14/15
HCC/HCF4047B
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
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