ITA25U1 [STMICROELECTRONICS]
Transil array for data line protection; TRANSIL阵列数据线路保护型号: | ITA25U1 |
厂家: | ST |
描述: | Transil array for data line protection |
文件: | 总8页 (文件大小:91K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ITAxxU1
Transil™ array for data line protection
Features
■ High surge capability Transil array:
I
= 40 A (8/20 µs)
PP
■ Peak pulse power : 300 W (8/20 µs)
■ Up to 6 bidirectional Transil functions
SO-8
■ Low clamping factor (V / V ) at high current
CL
BR
level
Figure 1.
Functional diagram
■ Low leakage current
■ ESD protection up to 15 kV
I/O1 1
8 I/O6
7 GND
6 GND
I/O2 2
I/O3 3
I/O4 4
Complies with the following standards
■ IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
5
I/O5
■ MIL STD 883G- Method 3015-7: class 3B
– 25 kV (human body model)
Applications
Data transmission lines protection, such as:
■ Unipolar signal up to 5.5 V
■ Bipolar signal in the 2.5 V range
Description
Transil diode arrays provide high overvoltage
protection by clamping action. Their
instantaneous response to transient overvoltages
makes them particularly suited to protect voltage
sensitive devices such as MOS technology and
low voltage supplied IC’s.
The ITA series allies high surge capability against
energetic pulses with high voltage performance
against ESD.
TM: Transil is a trademark of STMicroelectronics
November 2007
Rev 2
1/8
www.st.com
8
Characteristics
ITAxxU1
1
Characteristics
Table 1.
Symbol
Absolute ratings (T
= 25 °C)
amb
Parameter
Value
Unit
P
Peak pulse power (8/20 µs)(1)
T initial = T
j
300
40
W
A
PP
amb
amb
I
Peak pulse current (8/20 µs)(1)
Wire I2t value(1)
T initial = T
j
PP
I2t
0.6
A2s
°C
°C
°C
T
Maximum operating junction temperature
Storage temperature range
125
j
T
-55 to +150
260
stg
T
Maximum lead temperature for soldering during 10 s
L
1. For surges greater than the specified maximum value, the I/O will first present a short-circuit and after an open circuit
caused by the wire melting.
Table 2.
Symbol
Electrical characteristics (T
= 25 °C)
amb
Parameter
Stand-off voltage
I
IF
V
RM
V
Breakdown voltage
Clamping voltage
BR
VBR
V
CL
VF
VRM
VCL
I
Leakage current
V
RM
IRM
I
Peak pulse current
Voltage temperature coefficient
Forward voltage drop
Capacitance
PP
αT
V
F
IPP
C
VBR @ IR
IRM @ VRM
VCL
@
IPP
VCL
@
IPP
αT
C
VF @ IF
max.
min.
max. 8/20 µs max. 8/20 µs max.
max.
Order code
max.
(1)
(1)
(1)
(2)
V
mA
1
µA
10
V
5
V
A
V
A
10-4/ °C
4
pF
V
A
1
ITA6V1U1
6.51
10
10
12
25
1500
1.3
1. Between I/O pin and ground.
2. Between two input pins at 0 V Bias, F = 1 MHz.
2/8
ITAxxU1
Figure 2.
Characteristics
Pulse waveform
Figure 3.
Typical peak pulse power versus
exponential pulse duration
P
(W)
PP
%IPP
1000
100
10
Tj initial=25°C
8µs
100
50
Pulse waveform 8/20µs
t (ms) expo
P
0
t
20µs
1E-3
1E-2
1E-1
1E+0
1E+1
Figure 4.
Clamping voltage versus peak
pulse current (exponential
waveform 8/20 µs)
Figure 5.
Peak current IDC inducing open
circuit of the wire for one
input/output versus pulse duration
(typical values)
V
(V)
CL
I (A)
DC
1E+03
1E+03
1E+02
%IPP
Tj initial=25°C
Exponential waveform
100
50
t
0
tr
tp
1E+02
1E+01
1E+00
1E+01
1E+00
I (A)
PP
t (ms)
P
1E-01
1E+00
1E+01
1E+02
1E-02
1E-01
1E+00
1E+01
Figure 6.
Junction capacitance versus
reverse applied voltage for one
input/output (typical values)
Figure 7.
Relative variation of leakage
current versus junction
temperature
C(pF)
I (T )
R
j
1500
1250
1000
I (T =25°C)
R
j
Tj=25°C
F=1MHz
5E+3
1E+3
VR=VRM
1E+2
1E+1
1E+0
1E-1
750
500
T (°C)
j
V (V)
R
0
25
50
75
100
125
150
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
3/8
Application information
ITAxxU1
2
Application information
Figure 8.
µP I/O lines
+5V
I/O
I/O
I/O
I/O
I/O
µP
interface
I/O
GND
Figure 9.
2.5 V datalines
I/O
I/O
I/O
Line
driver
I/O
GND
+2.5V -2.5V
4/8
ITAxxU1
Ordering information scheme
3
Ordering information scheme
Figure 10. Ordering information scheme
ITA 6V1
U
1
RL
Integrated Transil Array
Breakdown Voltage (min)
25 = 25 Volt
Type of lines protected
U = Unidirectional
Package
1 = SO-8
Packaging
RL = Tape & reel
Blank = Tube
5/8
Package information
ITAxxU1
4
Package information
●
Epoxy meets UL94, V0
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Table 3.
SO-8 dimensions
Dimensions
Millimeters
Min. Typ. Max. Min. Typ. Max.
ccc C
Ref.
Inches
A
A2
A1
e
b
A
1.75
0.069
0.010
A1
0.1
0.25 0.004
0.049
C
h x 45°
(Seating
Plane)
A2 1.25
0.25mm
(Gage Plane)
b
C
D
E
0.28
0.17
0.48 0.011
0.23 0.007
0.019
0.009
C
L
k
4.80 4.90 5.00 0.189 0.193 0.197
5.80 6.00 6.20 0.228 0.236 0.244
L1
D
E1 3.80 3.90 4.00 0.150 0.154 0.157
e
h
1.27
0.050
0.25
0.40
0.50 0.010
1.27 0.016
0.020
0.050
8
5
4
L
E
E1
L1
k°
ccc
1.04
0.041
1
0
8
0
8
0.10
0.004
Figure 11. SO-8 footprint (dimensions in mm)
6.7
0.54
4.03
1.27
1.335
6/8
ITAxxU1
Ordering Information
5
Ordering Information
Table 4.
Order code
ITA6V1U1
ITA6V1U1RL
ordering information
Marking
Package
Weight
Base qty
Delivery mode
6V1U1
6V1U1
2000
2500
Tube
SO-8
0.08 g
Tape and reel
6
Revision history
Table 5.
Date
Document revision history
Revision
Changes
13-Dec-2004
07-Nov-2007
1
Initial release.
Reformatted to current standards.
SO-8 package dimensions update.
2
7/8
ITAxxU1
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