L3934AD [STMICROELECTRONICS]

SPEECH AND 14 MEMORY DIALER WITH HOLD FUNCTION; 言14内存锁定功能拨号器
L3934AD
型号: L3934AD
厂家: ST    ST
描述:

SPEECH AND 14 MEMORY DIALER WITH HOLD FUNCTION
言14内存锁定功能拨号器

文件: 总15页 (文件大小:189K)
中文:  中文翻译
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L3914A  
L3924A - L3934A  
SPEECH AND 14 MEMORY DIALER WITH HOLD FUNCTION  
ADVANCE DATA  
SPEECH CIRCUIT  
2 TO 4 WIRES CONVERSION  
PRESENT THE PROPER DC PATH FOR THE  
LINE CURRENT AND THE FLEXIBILITY TO  
ADJUST IT AND ALLOW PARALLEL PHONE  
OPERATION  
PROVIDES SUPPLY WITH LIMITED CUR-  
RENT FOR EXTERNAL CIRCUITRY  
SYMMETRICAL HIGH IMPEDANCE MICRO-  
PHONE INPUTS SUITABLE FOR DYNAMIC  
DIP28  
SO28  
ORDERING NUMBERS:  
L3914AN  
L3924AN  
L3934AN  
L3914AD  
L3924AD  
L3934AD  
ELECTRET  
OR  
PIEZOELECTRIC  
TRANSDUCER  
ASYMMETRICAL  
SUITABLE FOR DYNAMIC TRANSDUCER  
LINE LOSS COMPENSATION  
EARPHONE OUTPUT  
PIN CONNECTION (Topview)  
INTERNAL MUTING TO DISABLE SPEECH  
DURING DIALING  
HOLD FUNCTION FOR PARALLEL PHONE  
WITH 400ms DELAY TO PREVENT FALSE  
RELEASE  
DIALER CIRCUIT  
32 DIGITS FOR LAST NUMBER REDIAL  
BUFFER  
18 DIGITS FOR 13 MEMORY REDIAL  
ALLOW MIXED MODE DIALING IN EITHER  
TONE OR PULSE MODE  
PACIFIER TONE PROVIDES AUDIBLE INDI-  
CATION OF VALID KEY PRESSED IN A  
BUZZER OR/AND IN THE EARPHONE  
TIMED PABX PAUSE  
KEYPAD CONFIGURATION  
FLASH INITIATES TIMED BREAK:  
MASK OPTIONS WITH 585ms,300ms,100ms  
CONTINUOUS TONE FOR EACH DIGIT UN-  
TIL KEY RELEASE  
USES INEXPENSIVE 3.579545MHz CE-  
RAMIC RESONATOR  
POWERED FROM TELEPHONE LINE, LOW  
OPERATING VOLTAGE FOR LONG LOOP  
APPLICATION  
DESCRIPTION  
The device consists of the speech and the dialer.  
It provides the DC line interface circuit that termi-  
nates the telephone line, analog amplifier for  
speech transmission and necessary signals for  
either DTMF or loop disconnect (pulse) dialing.  
Note: PAUSE/LND:  
PAUSE and LND functions are sharing the same key with different  
sequence. Hereafter, PAUSEand LND keys arereferring tothesame  
key.  
January 1995  
1/15  
This isadvanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  
L3914A - L3924A - L3934A  
BLOCK DIAGRAM  
transfer calls or to activate other special features  
provided by the PABX or centraloffice.  
When mated with a tone ringer, a complete tele-  
phone can be produced with just two ICs.  
The PAUSE key stores a timedpause in the num-  
ber sequence.Redial is then delayed until an out-  
side line can be accessed or some other activity  
occursbefore normal signaling resumes.  
The DC line interface circuit develops its own line  
voltage across the device and it is adjustable by  
external resistor to suit different country’s specifi-  
cation.  
A LND key input automatically redials the last  
number dialed.  
The speech network provides the two to four  
wires interface, electronic switching between dial-  
ing and speech and automatic gain control on  
transmit and receive.  
The dialing network buffers up to 32 digits into the  
LND memory that can be later redialed with a sin-  
gle key input. Additionally, another 13 memories  
(including 3 emergency memories) of 18 digits  
memory is available. Users can store all 13 sig-  
nalling keys and access several unique functions  
with single key entries. These functions include:  
Pause/Last Number Dialed (LND), Softswitch,  
Flash and Hold.  
The HOLD key allows the user to suspend the  
conversation and resume the call on either the  
same phone by pressing the HOLD key again or  
resume the conversationat a parallel phone.  
FUNCTION PIN DESCRIPTION  
C1, C2, C3, C4, R5, R4, R3, R2, R1  
Keyboards inputs. Pins 1, 2, 3, 4, 24, 25, 26, 27,  
28. The one chip phone interfaces with either the  
standard 2-of-9 with negative common or the sin-  
gle-contact (Form A) keyboard.  
The FLASH key simulates a timed hook flash to  
2/15  
L3914A - L3924A - L3934A  
is pressed, in this way the phone will stay con-  
nected to the line untill the parallel phone is  
hooked-OFFor the Hold Key is pressed again.  
FUNCTION PIN DESCRIPTION (continued)  
A valid keypad entry is either a single Row con-  
nected to a single Column or GND simultaneously  
presented to both a single Row and a single Col-  
unm.  
In its quiescent or standby state, during normal  
off-hook operation, either the Rows or the Col-  
umns are at logic level 1 (VDD). Pulling one input  
low enables the on chip oscillator. Keyboard  
scanningthen begins.  
MODE/PACIFIER TONE  
Input (MODE). Pin 7. MODE determines the di-  
aler’s default operating mode. When the device is  
powered up or the hookswitch input is switched  
from on-hook (VDD) to off-hook (GND), the default  
determines the signalling mode. A VDD connec-  
tion defaults to tone mode operation and a GND  
connectiondefaults to pulse mode operation.  
When dialing in the pulse mode, a softswitch fea-  
turewill allow a change to the tone mode whenever  
the * key is depressed.Subsequent* key inputs will  
cause the DTMF code for an * to be dialed.. The  
softswitch will only switch from pulse to tone. After  
returning to on-hook and back to off-hook, the  
phonewill be in pulse mode. Redial by the LND key  
or the MEM key will repeat the softswitch.  
Output (PACIFIER TONE). Pin 7. In pulse mode,  
all valid key entries activate the pacifier tone. In  
tone mode, any non DTMF entry (FLASH,  
PROG, PAUSE, LND, HOLD, MEM, E1, E2 and  
E3), activates the pacifier tone. The pacifier tone  
provides audible feedback, confirming that key  
has been properly entered and accepted. It is a  
500Hz square wave activated upon acceptance of  
valid key input after the 32ms debounce time. The  
square wave terminates after a maximum of  
75ms or when the valid key is no longer present.  
The pacifier tone signal is simultaneously sent to  
earphone and the buzzer. The buzzer can be re-  
moved without affecting this function.  
Scanning consists of Rows and Columns alter-  
nately switching high through on chip pullups. Af-  
ter both a Row and Column key have been de-  
tected, the debounce counter is enabled and any  
noise (bouncing contacts, etc) is ignored for a de-  
bounce period (TKD) of 32ms. At this time, the  
keyboard is sampled and if both the Row and Col-  
umn information are valid, the information is buff-  
ered into the LND location. After scanning starts,  
the row and column inputs will assume opposite  
states.  
In the tone mode, if two or more keys in the same  
row or if two or more keys in the same column are  
depressed a single tone will be output. The tone  
will corresponds to the row or column for which  
the two keyswere pushed. This feature is for test-  
ing purposes, and single tone will not be redialed.  
Also in the tone mode, the output tone is continu-  
ous in the manual dialing as long as the key is  
pushed. The output tone duration follows the Ta-  
ble 1. When redialing in the tone mode, each  
DTMF output has 100ms duration, and the tone  
separation(inter signal delay) is 100ms.  
Table 1: Output Tone Duration  
HKS  
Key-Push Time, T  
T<= 32ms  
Tone Output  
Input. Pin 8. This is the hookswitch input to the one  
chip phone. This is a high impedance input and  
must be switched high for on-hook operationor low  
for off-hook operation. A transition on this input  
causes the on chip logic to initialize, terminating  
any operationin progress at the time. The signaling  
mode defaults to the mode selected at pin 7. Fig-  
ures 1 and 2 illustrate the timing for this pin.  
No output, ignored by  
one chip phone.  
32ms < = T < = 100ms +  
Tkd  
T > = 100ms + Tkd  
100ms Duration  
Output Duration = T - Tkd  
OSC  
Output. Pin 5. Only one pin is needed to connect  
the ceramic resonator to the oscillator circuit. The  
other end of the resonator is connected to GND  
(pin 8). The nominal resonator frequency is  
3.579545MHzand any deviation from this standard  
is directly reflected in the Tone output frequencies.  
The ceramic resonator provides the time reference  
for all circuit functions.A ceramic resonatorwith tol-  
eranceof ±0.25%is recommended.  
GND  
Pin 9 is the negative line terminal of the device.  
This is the voltage reference for all specifications.  
RXOUT, GRX, RXIN  
RXOUT (pin 10), GRX (pin 11) and RXIN (pin 12).  
The receive amplifier has one input RXIN and a  
non inverting output RXOUT. Amplification from  
RXIN to RXOUT is typically 31dB and it can be  
adjusted between 11dB and 41dB to suit the sen-  
sitivity of the earphone used. The amplification is  
proportionalto the external resistor connected be-  
tween GRX and RXOUT.  
PULSE  
Output. Pin 6. This is an output consisting of an  
open drain N-Channel device. During on-hook,  
pulse output pin is in high impedance and once  
off-hooked, it will be pulled high by external resis-  
tor. The pulse out will go high when the Hold key  
3/15  
L3914A - L3924A - L3934A  
is 40dB. Final output level on LN can be adjusted  
via the external resistor connected between  
GDTMF and GND through a decoupling capaci-  
tor. A confidence tone is sent to the earphone  
during tone dialing. The attenuation of the confi-  
dence tone from LN to Vear is –32dB typically.  
FUNCTION PIN DESCRIPTION (continued)  
IREF  
Pin 13. An external resistor of 3.6kOhm con-  
nected between IREF and GND will set the inter-  
nal current level. Any change of this resistor value  
will influence the microphone gain, DTMF gain,  
earphone gain and sidetone.  
VDD  
Pin 23. VDD is the positive supply for the dialing  
network and must meet the maximum and mini-  
mum voltage requirements.  
VCC  
Pin 14, VCC is the positive supply of the speech  
network. It is stabilized by a decoupling capacitor  
between VCC and GND. The VCC supply voltage  
may also be used to supply external peripheral  
circuits.  
DEVICE OPERATION  
During on-hook all keypad inputs are high imped-  
ance internally and it requiresvery low current for  
memory retention. At anytime, Row and Column  
inputs assume opposite states at off-hook. The  
circuit verifies that a valid key has been entered  
by alternately scanning the Row and Column in-  
puts. If the input is still valid following 32ms of de-  
bounce, the digit is stored into memory, and dial-  
LED  
Pin 15. The LED connected to this pin will start to  
blink when the HOLD key is pressed and will turn  
off if the HOLD key is pressed again. Otherwise, it  
will continue to blink at 1Hz frequency when the  
phone is on-hooked and then turn off when the  
parallel phone goes off-hook.  
ing begins after  
a
pre-signal delay of  
approximately 40ms (measured from the initial  
key closure). Output tone duration is shown in Ta-  
ble 1.  
The device allows manual dialing of an indefinite  
number of digits, but if more than 32 digits are di-  
aled, it will ”wrap around”. That is, the extra digits  
beyond 32 will be stored at the beginning of LND  
buffer, and the first 32 digits will no longer be  
available for redial.  
ILINE  
Pin 16. A recommended external resistor of  
20ohm is connected between ILINE and GND.  
Changing this resistor value will have influence on  
microphone gain, DTMF gain, sidetone,maximum  
output swing on LN and on the DC characteristics  
(especially in the low voltage region).  
Table 2: DTMF Output Frequency  
LN  
Stadard  
Frequency Frequency  
Actual  
Key Input  
% Deviation  
Pin 17. LN is the positive line terminal of the device.  
ROW 1  
ROW 2  
ROW 3  
ROW 4  
697  
770  
852  
941  
699.1  
766.2  
847.4  
948.0  
+0.31  
–0.49  
–0.54  
+0.74  
REG  
Pin 18. The internal voltage regulator has to be  
decoupled by a capacitor from REG) to GND).  
The DC characteristics can be changed with an  
external resistor connected between LN and REG  
COL 1  
COL 2  
COL 3  
1209  
1336  
1477  
1215.9  
1331.7  
1471.9  
+0.57  
–0.32  
–0.35  
or between REG and ILINE  
.
NORMAL DIALING  
D1 D2  
GTX, MIC–, MIC+  
D3  
....etc  
GTX (pin 19), MIC– (pin 20) and MIC+ (pin 21).  
The one chip phone has symmetrical microphone  
inputs. The amplification from microphone inputs to  
LN is 51.5dB and it can be adjusted between 43.5  
and 51.5dB. The amplification is proportional to ex-  
ternalresistor connectedbetween GTX and REG.  
Normal dialing is straighforward, all keyboard en-  
tries will be stored in the buffer and signaled in  
succession.  
PROGRAMMING AND REPORTORY DIALING  
To program, enter the following:  
GDTMF  
PROG  
D1  
D2  
Dn MEM (location0-9)  
Pin 22. When the DTMF input is enabled, the mi-  
crophone inputs and the receive amplifier input will  
be muted and the dialing tone will be sent to the  
line. The voltage amplification from GDTMF to LN  
or  
PROG  
D1  
D2  
Dn E1-E3  
During programming, dialing is inhibited.  
4/15  
L3914A - L3924A - L3934A  
Table 3: Special FunctionDelays  
FUNCTION PIN DESCRIPTION (continued)  
Each delay shown below represents the time re-  
quired after the special function key is depressed  
until a new digit is dialed. The time is considered  
”FIRST” key if all previous inputs have been com-  
pletely dialed. The time is considered ”AUTO” if in  
redial, or if previous dialling is still in progress.  
To dial a number from repertory memory (HKS  
must be low), enter the following:  
MEM (Location0-9) or E1-E3  
To save the last number dialed, enter the follow-  
ing:  
PROG MEM (location 0-9) or E1-E3  
Delay (seconds)  
Function  
First/Auto  
Pulse  
Tone  
SOFTSWITCH  
FIRST  
AUTO  
0.2  
1.0  
HOOK FLASH  
D1  
FLASH  
D2  
...etc  
PAUSE  
FIRST  
AUTO  
2.6  
3.4  
3.0  
3.1  
Hook flash may be entered into the dialed se-  
quence at any point by keying in the function key,  
FLASH. Flash consists of a timed break of  
585ms, 300ms or 100ms depending on the Mask  
option. When a FLASH key is pressed, no further  
key inputs will be accepted until the hookflash  
function has been dialed. The key input following  
a FLASH will be stored as the initial digit of the  
new number, overwriting the number dialed be-  
fore the FLASH, unless it is another FLASH.  
HOLD  
When HOLD key is pressed during off hook, there  
are two options. The first option is to mute the  
phone (LED will blink) and the conversation can  
be resumed by pressing the HOLD key again.  
The second option is to mute the phone (LED will  
blink), on-hook the phone (LED will still blink at  
1Hz frequency) and automatic switch off the  
phone when parallel phone is off-hook.  
FLASH key pressed immediately after hookswitch  
or LND will not clear the LND buffer unless digits  
are entered following the FLASH key.  
The HOLD function is disabled when the line cur-  
rent drops below 20mA.  
Example:  
FLASH  
LND not cleared  
SOFTSWITCH FUNCTION USING TONE/PULSE  
MODE SWITCH  
LND  
FLASH  
When dialing in Pulse mode after off-hook, switch-  
ing TONE/PULSE mode switch from Pulse to Tone  
will causethe device to change the signaling mode  
into tone signal and store the softswitch function in  
the LND memory for redial. To redial the softswitch  
function (mixed mode dialing) in the pulse mode af-  
ter going on-hook and back to off-hook, you have  
to switch the TONE/PULSE mode switch back to  
pulsemode either beforegoing on-hookor after off-  
hook or during on-hook.  
Subsequentmode change from Tone to Pulse will  
change the signaling mode to pulse dialing se-  
quence but this mode change will not be stored in  
.the LND memory.  
LND not cleared  
LND  
FLASH  
D1  
D2  
LND buffer will contain D1, D2  
PAUSE/LAST NUMBER DIALED  
If the PAUSE/LND key is pressed right after off  
hook or FLASH key, it is considered as LND, if it  
is pressed after a digit, it will be considered as  
PAUSE.  
LAST NUMBERED DIALED  
OFF-HOOK PAUSE/LND or FLASH PAUSE/LND  
When dialing in Tone mode afteroff-hook, a switch-  
ing of TONE/PULSE mode Switch from Tone to  
Pulse will cause the device to change the signaling  
mode into pulse mode but this mode change will  
not be stored in the LND memory. When LND key  
is pressed in Tone mode after going off-hook, the  
device will outputall tone signals.  
A pacifier tone of 75ms is provided after 32ms  
debounce time when switching from Pulse to  
Tone mode.  
Last number dialing is accomplished by entering  
the PAUSE/LND key.  
PAUSE  
OFF-HOOK D1 PAUSE/LND D2  
...etc  
A pause may be entered into the dialed sequence  
at any point by keying in the special function key,  
PAUSE/LND. Pause inserts a 3.1second delay into  
the dialing sequence.The total delay, including pre-  
digit and post-digit pausesis shown in Table 3.  
Redial by the LND key will repeat the mixed dial-  
ing sequencein Pulse mode.  
5/15  
L3914A - L3924A - L3934A  
Figure 1: Tone Mode Timing  
Figure 2: Pulse Mode Timing  
6/15  
L3914A - L3924A - L3934A  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Positive Line Voltage Continuous  
Value  
Unit  
V
VLN  
ILN  
12  
Line Current  
140  
7.0  
mA  
V
VDD  
VI  
Logic Voltage  
Maximum Voltage on Any Pin  
Operating Temperature Range  
Storage Temperature  
Total Power Dissipation  
GND(-0.3) VDD(+0.3)  
-25 to +75  
-40 to 125  
700  
V
Tamb  
Tstg  
Ptot  
°C  
°C  
mW  
ELECTRICAL CHARACTERISTICS (IL = 10 to 120mA; VDD = 3V; f = 1KHz; Tamb = 25°C, unless other-  
wise specified)  
Symbol  
Parameter  
Line Voltage  
Test Condition  
IL = 4mA  
IL = 15mA  
IL = 120mA  
RA = 68K; IL = 15mA  
RB = 39K; IL = 15mA  
Min.  
Typ.  
Max.  
Unit Fig.  
VLN  
2.50  
3.85  
7.0  
V
V
V
V
V
3
3.15  
3.50  
3.2  
4.1  
VDD  
IDD  
Logic Voltage)  
TONE MODE  
PULSE MODE  
2.50  
2.20  
6.00  
6.00  
V
V
3
3
Supply Current Into VDD  
TONE MODE  
PULSE MODE  
600  
400  
µA  
µA  
ICC  
Supply Current Into VCC  
IL = 15mA  
1.30  
mA  
3
3
ILED  
Supply Current to HOLD LED IL = 15mA  
IL = 120mA  
4
30  
mA  
mA  
VMR  
IMR  
IS  
Memory Retention Voltage  
Memory Retention Current  
1.50  
1.00  
V
4
4
3
3
3
1.00  
250  
µA  
µA  
mA  
Off-Hook Stand-by Current  
Pulse Output Sink Current  
VDD = 4.0V  
VO = 0.5V  
150  
IPL  
3.00  
IPO  
Pacifier Tone Sink/Source  
Current  
VO = 0.5V (Sink)  
VO = 2.5V (Source)  
1
0.6  
3
1
mA  
mA  
VIL  
VIH  
GTX  
HKS, Mode, Keyboard Inputs  
Low  
0.3xVDD  
V
-
-
HKS, Mode, Keyboard Inputs  
High  
0.7xVDD  
V
Transmit Gain  
Vmic = 2mVrms  
IL = 15mA; RGTX = 68KΩ  
IL = 60mA; RGTX = 68KΩ  
6
50.0  
44.5  
51.5  
46.5  
53.0  
48.5  
dB  
dB  
AGTX  
Transmit Gain Variation with  
RGTX  
IL = 15mA  
–8  
0
dB  
6
V
mic = 2mVrms  
R
R
GTX = 43KΩ  
GTX = 27KΩ  
– 4  
– 8  
dB  
dB  
DTX  
NTX  
Transmit Distortion  
IL = 15mA; VLN = 1Vrms  
IL = 15mA; Vmic = 0V  
2
%
dBmp  
KΩ  
6
6
5
7
7
Transmit Noise  
–72  
64  
ZMIC  
Microphone Input Impedance  
DTMF Gain (Output @ LN)  
Confidence Tone Level  
GDTMF  
CDTMF  
IL = 15mA ; RDTMF = 2.25KΩ  
38  
40  
42  
dB  
–34  
–32  
–30  
dB  
V
ear/VLN  
7/15  
L3914A - L3924A - L3934A  
ELECTRICAL CHARACTERISTICS (continued)  
Symbol  
Parameter  
Test Condition  
DTMF = 2.25K,  
DTMF = 22nF  
Min.  
Typ.  
Max.  
Unit Fig.  
VDTMF  
DTMF Level on the line  
High Frequency Group  
Low Frequency Group  
R
C
–8  
–10  
–6  
–8  
–4  
–6  
dBm  
dBm  
7
PEI  
DIS  
Pre-emphasis  
1.0  
2
5
3.0  
8
dB  
%
7
7
DTMF Output Distortion  
DTMF Att. pin Impedance  
Receive Gain  
ZDTMF  
GRX  
32  
KΩ  
Vinp = 5mVrms; Re = 300Ω  
GRX = 100KΩ  
8
R
IL = 15mA  
IL = 60mA  
29.5  
24  
31.0  
26  
32.5  
28  
dB  
dB  
AGRX  
Receive Gain Variation  
IL =15mA; Re = 300Ω  
–20  
+10  
dB  
dB  
dB  
8
8
R
GRX = 10KΩ  
–20  
+10  
RGRX = 300KΩ  
DRX  
Reveive Output Distortion  
IL = 15mA; RGRX = 100KΩ  
Re = 150Ω; VC = 0.25Vrms  
Re = 300Ω; VC = 0.45Vrms  
Re = 450; VC = 0.55Vrms  
2
2
2
%
%
%
NRX  
Receive Noise  
IL = 15mA; RL = 300;  
200  
35  
8
µV  
RGRX = 100K; VINP = 0V  
ZOUT  
VPT  
Receive Output Impedance  
IL = 15mA  
8
8
Pacifier Tone Level on  
Earphone  
IL= 15mA; Rp = ∞  
60  
600  
mVrms  
mVrms  
Rp = 430K  
KEYBOARD INTERFACE  
TKD  
FKS  
KRU  
KRD  
Keypad Debounce Time  
32  
ms  
Hz  
KΩ  
Keypad Scan Frequency  
Keypad Pullup Resistance  
Keypad Pulldown Resistance  
250  
100  
500  
PULSE MODE  
TPT  
FPT  
PR  
TB  
TM  
IDP  
PDP  
Pacifier Tone Duration  
Pacifier Tone Frequency  
Pulse Rate  
Break Time  
Make Time  
Inter Digit Pause  
Predigit Pause  
75  
500  
10  
60  
40  
820  
50  
ms  
Hz  
PPS  
ms  
ms  
ms  
ms  
TONE MODE  
TRIS  
TR  
TPSD  
TISD  
TDUR  
Tone Output Rise Time  
Tone Signalling Rate  
Pre Signal Delay  
Inter Signal Delay  
Tone Output Duration  
5
ms  
1/s  
ms  
ms  
ms  
5
40  
100  
100  
THD  
Hold Mode Delay  
Hook Flash Timing  
400  
ms  
tHFP  
L3914A  
L3924A  
L3934A  
585  
300  
100  
ms  
ms  
ms  
Notes:  
1. All inputs unloaded. Quiescent mode (oscillator off).  
2. Pulse output sink current for VOUT = 0.5V.  
3. Pacifier tone sink current for VOUT = 0.5V. Source current for VOUT = 2.5V.  
4. Memory retention voltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is guaranteed if  
either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum currentand voltage  
simultaneously.  
8/15  
L3914A - L3924A - L3934A  
TEST CIRCUITS  
Figure 3.  
470nF  
2.25K  
22nF  
GDTMF  
C4  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
22  
4
3
V1  
ICC =  
VCC  
IDD  
2
RDTMF  
VDD  
23  
6
1
1
4
7
2
5
8
0
3
6
9
#
FLASH  
PROG  
P/LND  
HOLD  
VDD  
470K  
PULSE  
28  
27  
26  
25  
24  
3.58MHz  
OSC  
5
*
SW2  
100K  
MODE  
/PT  
PULSE  
TONE  
7
E1 E2 E3 MEM  
HKS  
GND  
MIC+  
8
9
21  
SW1  
2.2K  
MIC-  
1µF  
RXOUT  
10  
11  
20  
19  
300Ω  
Re  
100K  
GRX  
IREF  
VCC  
1µF 4.7µF  
GTX  
RGRX  
10µF  
RGTX 68K  
VLN  
RA  
13  
14  
12  
REG  
LN  
18  
17  
3.6K  
RB  
130K  
100µF  
LED  
RGIN  
15  
16  
100µF  
ILED  
IL  
390Ω  
3.9K  
ILINE  
V1  
ICC  
620Ω  
100nF  
20Ω  
390Ω  
600Ω  
D95TL169  
Figure 4.  
470nF  
IMR  
2.25K  
22nF  
GDTMF  
C4  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
22  
4
3
2
VMR  
VDD  
23  
6
1
1
4
7
2
3
FLASH  
PROG  
P/LND  
HOLD  
470K  
PULSE  
28  
27  
26  
25  
24  
5
8
0
6
9
#
3.58MHz  
OSC  
5
*
SW2  
100K  
MODE  
/PT  
PULSE  
TONE  
7
E1 E2 E3 MEM  
HKS  
GND  
MIC+  
8
9
21  
SW1  
2.2K  
MIC-  
1µF  
RXOUT  
GRX  
10  
11  
20  
19  
300Ω  
1µF 4.7µF  
GTX  
Re  
RGRX  
10µF  
RGTX  
IREF  
VCC  
13  
14  
12  
REG  
LN  
18  
17  
3.6K  
130K  
100µF  
LED  
RGIN  
15  
16  
ILED  
390Ω  
3.9K  
ILINE  
620Ω  
100nF  
20Ω  
390Ω  
D95TL170  
9/15  
L3914A - L3924A - L3934A  
TEST CIRCUITS(continued)  
Figure 5.  
470nF  
2.25K  
GDTMF  
C4  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
22  
4
3
1.2V  
Imic  
ZMIC =  
22nF  
470K  
2
VDD  
23  
6
1
1
4
7
2
5
8
0
3
6
9
#
FLASH  
PULSE  
28  
27  
26  
25  
24  
PROG  
P/LND  
HOLD  
3.58MHz  
OSC  
5
*
SW2  
MODE  
/PT  
PULSE  
7
E1 E2 E3 MEM  
100K  
TONE  
HKS  
GND  
MIC+  
Imic  
8
9
21  
SW1  
1.2V  
RXOUT  
GRX  
MIC-  
GTX  
10  
11  
20  
19  
300Ω  
4.7µF  
Re  
RGRX  
10µF  
RGTX  
IREF  
VCC  
13  
14  
12  
REG  
LN  
18  
17  
3.6K  
130K  
100µF  
LED  
RGIN  
15  
16  
ILED  
390Ω  
3.9K  
ILINE  
620Ω  
100nF  
20Ω  
390Ω  
D95TL171  
Figure 6.  
470nF  
2.25K  
GDTMF  
VLN  
C4  
22  
4
3
GTX=20log  
Vrms  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
NTX measured with Vrms=0  
IDD  
22nF  
2
VDD  
23  
6
1
1
4
7
2
5
8
0
3
6
9
#
FLASH  
VDD  
470K  
PULSE  
28  
27  
26  
25  
24  
PROG  
P/LND  
HOLD  
3.58MHz  
OSC  
5
*
SW2  
100K  
MODE  
/PT  
PULSE  
TONE  
7
E1 E2 E3 MEM  
HKS  
GND  
MIC+  
8
9
21  
SW1  
2.2K  
MIC-  
1µF  
1µF  
Vrms  
RXOUT  
10  
11  
20  
19  
100K  
GRX  
IREF  
VCC  
GTX  
Re  
RGRX  
10µF  
RGTX 88K  
4.7µF  
VLN  
13  
14  
12  
REG  
LN  
18  
17  
3.6K  
130K  
100µF  
LED  
RGIN  
15  
16  
100µF  
600Ω  
ILED  
390Ω  
IL  
3.9K  
ILINE  
620Ω  
100nF  
20Ω  
390Ω  
D95TL172  
10/15  
L3914A - L3924A - L3934A  
TEST CIRCUITS(continued)  
Figure 7.  
470nF  
2.25K  
GDTMF  
VLN  
GDTMF=20log  
VMF  
C4  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
22  
4
3
Vear  
CDTMF=20log  
VLN  
VMF  
VDD  
22nF  
2
IDD  
RDTMF  
1
23  
6
1
4
7
2
5
8
0
3
6
9
#
FLASH  
PROG  
P/LND  
HOLD  
28  
27  
26  
25  
24  
4.0V  
470K  
PULSE  
3.58MHz  
OSC  
5
*
SW2  
100K  
MODE  
/PT  
E1 E2 E3 MEM  
PULSE  
TONE  
7
MIC+  
HKS  
GND  
21  
8
9
SW1  
2.2K  
MIC-  
1µF  
1µF  
RXOUT  
20  
19  
10  
11  
10µF  
100K  
300Ω  
GRX  
IREF  
GTX  
Re  
RGRX  
RGTX 88K  
4.7µF  
VLN  
REG  
LN  
13  
18  
17  
Vear  
3.6K  
VCC  
14  
12  
130K  
LED  
100µF  
RGIN  
15  
16  
100µF  
600Ω  
ILED  
390Ω  
IL  
3.9K  
ILINE  
620Ω  
100nF  
20Ω  
390Ω  
D95TL173  
Figure 8.  
470nF  
2.25K  
22nF  
GDTMF  
Vear  
Vinp  
C4  
22  
4
3
GRX=20log  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
NRX with Vin=0  
IDD  
2
VDD  
PULSE  
OSC  
23  
6
1
1
2
5
8
0
3
6
9
#
FLASH  
PROG  
P/LND  
HOLD  
4.0V  
470K  
3.58MHz  
28  
27  
26  
25  
24  
4
7
5
*
SW2  
100K  
MODE  
/PT  
PULSE  
TONE  
7
E1 E2 E3 MEM  
HKS  
GND  
MIC+  
8
9
21  
SW1  
2.2K  
MIC-  
1µF  
1µF  
RP  
20  
19  
RXOUT  
GRX  
10  
11  
10µF  
GTX  
Re  
RGTX  
4.7µF  
RGRX  
3.6K  
VLN  
REG  
LN  
IREF  
18  
17  
13  
Vear  
VCC  
130K  
14  
12  
LED  
15  
16  
100µF  
ILED  
390Ω  
100µF  
RGIN  
IL  
3.9K  
ILINE  
Vinp  
100nF  
620Ω  
20Ω  
390Ω  
D95TL167  
11/15  
L3914A - L3924A - L3934A  
Figure 9:Typical Application Circuit.  
10 R1  
1N4004 x 4  
TIP  
D1  
D4  
HP5A94 Q1  
D14  
TPA270  
100K  
R3  
D2  
D3  
10V  
D15  
4.7nF  
C6  
RING  
SW1A  
3.3K  
R4  
1.2K  
R7  
10M  
R6  
150K  
R2  
10K  
R5  
HF393  
Q3  
1N4140  
VDD  
22µF/16V  
C23  
220µF  
16V  
C1  
5.6V  
D10  
PULSE  
23  
C4  
C3  
C2  
C1  
R1  
R2  
R3  
R4  
R5  
6
4
3
4.7K RMF  
GDTMF  
22  
1.2K  
R14  
0.47µF  
25V  
C10  
2
1
4.7nF CMF  
1
4
7
2
5
8
0
3
6
9
#
FLASH  
PROG  
P/LND  
HOLD  
28  
27  
26  
25  
24  
3.579MHz x1  
OSC  
5
7
CERAMIC RESONATOR  
BUZZER  
*
E1 E2 E3 MEM  
SW2  
MODE  
MIC+  
MIC-  
21  
20  
/PT  
100K R8  
HKS  
8
9
SW1B  
GND  
RXOUT  
GRX  
1.2K  
R15  
HOOK  
4.7µF/25V  
10  
11  
13  
56K  
GTX  
100K RGRX  
3.6K R9  
19  
RGTX  
C7  
10µF/50V  
REG  
LN  
IREF  
18  
17  
C3  
390R11  
3.9K R12  
130K R13  
VCC  
ILINE  
14  
12  
16  
100µF C5  
RGIN  
120Ω  
RS1  
15  
LED  
1K  
RAC  
D12  
LED  
20Ω  
R10  
470Ω  
RS2  
100nF  
C4  
220nF  
CS  
D95TL175  
12/15  
L3914A - L3924A - L3934A  
SO28 PACKAGE MECHANICAL DATA  
mm  
inch  
DIM.  
MIN.  
TYP.  
MAX.  
2.65  
0.3  
MIN.  
TYP.  
MAX.  
0.104  
0.012  
0.019  
0.013  
A
a1  
b
0.1  
0.004  
0.014  
0.009  
0.35  
0.23  
0.49  
0.32  
b1  
C
0.5  
0.020  
c1  
D
45° (typ.)  
17.7  
10  
18.1  
0.697  
0.394  
0.713  
0.419  
E
10.65  
e
1.27  
0.050  
0.65  
e3  
F
16.51  
7.4  
0.4  
7.6  
0.291  
0.016  
0.299  
0.050  
L
1.27  
S
8° (max.)  
0016572  
13/15  
L3914A - L3924A - L3934A  
DIP28 PACKAGE MECHANICAL DATA  
mm  
inch  
TYP.  
0.025  
0.018  
DIM.  
MIN.  
0.23  
15.2  
TYP.  
0.63  
0.45  
MAX.  
MIN.  
0.009  
0.598  
MAX.  
a1  
b
b1  
b2  
D
E
0.31  
0.012  
1.27  
0.050  
37.34  
16.68  
1.470  
0.657  
e
2.54  
0.100  
1.300  
e3  
F
33.02  
14.1  
0.555  
I
4.445  
3.3  
0.175  
0.130  
L
K
C1  
L
G
F
N
e3  
A
28  
1
15  
14  
B
CDIP28  
0016130  
14/15  
L3914A - L3924A - L3934A  
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the  
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No  
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men-  
tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.  
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex-  
press written approval of SGS-THOMSON Microelectronics.  
1995 SGS-THOMSON Microelectronics - All RightsReserved  
SGS-THOMSON Microelectronics GROUP OF COMPANIES  
Australia - Brazil - France - Germany - Hong Kong - Italy- Japan - Korea - Malaysia - Malta - Morocco - The Netherlands  
Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A.  
15/15  

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