L4949EPTR-E [STMICROELECTRONICS]
Multifunction very low drop voltage regulator; 多功能非常低的压差电压稳压器
| 型号： | L4949EPTR-E |
| 厂家： | 
ST |
| 描述： | Multifunction very low drop voltage regulator |
| 文件： | 总19页 (文件大小：475K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L4949ED-E
L4949EP-E
Multifunction very low drop
voltage regulator
Features
®
■ ECOPACK : lead free and RoHS compliant
■ Automotive Grade: compliance with AEC
guidelines
■ Operating DC supply voltage range 5 V - 28 V
■ Transient supply voltage up to 40V
SO-8
SO-20W (12+4+4)
■ Extremely low quiescent current in standby
mode
Description
■ High precision standby output voltage 5V 1ꢀ
■ Output current capability up to 100mA
■ Very low dropout voltage less than 0.5V
■ Reset circuit sensing the output voltage
The L4949ED-E and L4949EP-E are monolithic
integrated 5V voltage regulators with a very low
dropout output and additional functions as power-
on reset and input voltage sense. They are
designed for supplying the microcomputer
controlled systems especially in automotive
applications.
■ Programmable reset pulse delay with external
capacitor
■ Voltage sense comparator
■ Thermal shutdown and short circuit protections
Table 1.
Device summary
Package
Order codes
Tape and reel
Tube
SO-8
L4949ED-E
L4949EP-E
L4949EDTR-E
L4949EPTR-E
SO-20W
November 2009
Doc ID 16823 Rev 1
1/19
www.st.com
1
Contents
L4949ED-E, L4949EP-E
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
3.3
3.4
3.5
3.6
Supply voltage transient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Sense comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
5
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1
4.2
4.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SO-8 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SO-20 TP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin definitions and functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Preregulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SO-8 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SO-20 TP mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Doc ID 16823 Rev 1
3/19
List of figures
L4949ED-E, L4949EP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
(1)
Application circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Foldback characteristic of V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
O
Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Quiescent current vs supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Block circuit of reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SO-8 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. SO20 TP package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
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L4949ED-E, L4949EP-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1.
Block diagram
Note:
The block diagram illustrates only a major internal device functionality and it is not intended
to mimic any details of hardware design
Figure 2.
Configuration diagram (top view)
SO-8
SO-20
Doc ID 16823 Rev 1
5/19
Block diagram and pin description
L4949ED-E, L4949EP-E
Table 2.
Pin definitions and functions
Pin N°
Symbol
Function
SO-8
SO-20
Input supply voltage. Block to GND via an external
capacitor (see Figure 3).
1
19
20
1
VS
SI
Sense input pin to supervise input voltage. Connect via an
external voltage divider connected to VS and to GND.
2
3
4
5
6
Preregulator output voltage. For details, see Section 3.4:
Preregulator.
VZ
Reset pulse delay adjustment. Connecting this pin via a
capacitor to GND
2
CT
4, 5, 6, 7, 14,
15, 16, 17
GND
RES
Ground reference
Reset output. It is pulled down when the output voltage
10
11
goes below VRT
.
Sense output. This open collector pin must be connected to
VOUT via an external resistor. It is pulled down whenever
the SI voltage becomes lower than an internal voltage.
7
SO
Output voltage. Block to GND via an external capacitor (see
Figure 3)
8
-
12
VOUT
NC
3, 8, 9, 13, 18
Not connected pins
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Electrical specifications
2
Electrical specifications
2.1
Absolute maximum ratings
(1)
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VSDC
VSTR
IO
DC operating supply voltage
Transient supply voltage (T < 1s)
Output current
28
V
V
40
Internally limited
VO
Output voltage
20
V
V
VRES, VSO Output voltage
IRES, ISO Output current
20
5
mA
V
VCT
VSIDC
VZ
Reset delay voltage
7
Sense input voltage
28
V
Preregulator output voltage
Preregulator output current
Junction temperature
7
V
IZ
5
mA
°C
°C
TJ
-40 to +150
-55 to +150
Tstg
Storage temperature range
1. The circuit is ESD protected according to MIL-STD-883C.
2.2
Thermal data
Table 4.
Symbol
Thermal data
Description
SO-8
200
SO20L
Unit
Rth j-amb
Rth j-pins
TJSD
Thermal Resistance Junction-ambient (max)
Thermal Resistance Junction-pins (max)
Thermal Shutdown Junction temperature
50
15
°C/W
°C/W
°C
165
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Electrical specifications
L4949ED-E, L4949EP-E
2.3
Electrical characteristics
VS = 14 V; -40 °C < Tj < 125 °C unless otherwise specified
Table 5.
Symbol
Electrical characteristics
Parameter
Output voltage
Test condition
TJ = 25 °C; IO = 1 mA
6 V < VIN < 28 V, 1 mA < IO < 50 mA
IN = 40 V;
Min.
Typ.
Max.
Unit
VO
VO
4.95
4.90
5
5
5.05
5.10
V
V
Output voltage
Output voltage
V
VO
4.75
5.25
V
T < 1 s; 5 mA < IO < 100 mA
I
O = 10 mA
0.1
0.2
0.3
0.25
0.4
0.5
V
V
V
VDP
Dropout voltage
IO = 50 mA
IO = 100 mA
Input to output voltage
VIO
difference in undervoltage VIN = 4 V, IO = 35 mA
condition
0.4
V
(1)
Iouth
Max output leakage
Line regulation
VIN = 25 V, VO = 5.5 V
6 V < VIN < 28 V; IO = 1 mA
1 mA < IO < 100 mA
20
50
80
20
30
µA
mV
mV
VOL
VOLO
Load regulation
200
VO = 4.5 V
105
120
400
400
mA
mA
mA
ILIM
Current limit
VO = 4.5 V; TJ = 25 °C
VO = 0 V(2)
100
200
IQSE
IQ
Quiescent current
Quiescent current
IO = 0.3 mA; TJ < 100 °C
IO = 100 mA
300
5
µA
mA
1. With this test we guarantee that with no output current the output voltage will not exceed 5.5V
2. Foldback characteristic
Table 6.
Symbol
Reset
Parameter
Test condition
Min.
Typ.
Max.
Unit
VO -
0.5V
VRT
Reset threshold voltage
V
VRTH
tRD
Reset threshold hysteresis
Reset pulse delay
50
55
100
100
200
180
0.4
mV
ms
V
CT = 100 nF; TR ≥ 100 µs
VRL
Reset output low voltage
RRES = 10 KΩ to VO VS ≥ 1.5V
Reset output high leakage
current
IRH
VRES = 5 V
1
µA
V
VCTth
Delay comparator threshold
2
Delay comparator threshold
hysteresis
VCTth, hy
100
mV
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L4949ED-E, L4949EP-E
Electrical specifications
Table 7.
Symbol
Sense
Parameter
Test condition
Min.
Typ.
Max.
Unit
Vst
Sense low threshold
1.16
20
1.23
100
1.35
200
V
Vsth
Sense threshold hysteresis
mV
VSI ≤ 1.16 V; VS ≥ 3 V
RSO = 10 KΩ to VO
VSL
Sense output low voltage
0.4
V
ISH
ISI
Sense output leakage
Sense input current
VSO = 5 V; VSI ≥ 1.5 V
1
µA
µA
VSI = 0
-20
-8
-3
Table 8.
Symbol
Preregulator
Parameter
Test condition
Min.
Typ.
Max.
Unit
VZ
IZ
Preregulator output voltage
Preregulator output current
IZ = 10 µA
4.5
5
6
V
10
µA
Doc ID 16823 Rev 1
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Application information
L4949ED-E, L4949EP-E
3
Application information
(1)
Figure 3.
Application circuit
1. For stability: CS ≥ 1µF, CO ≥ 4.7µF, ESR < 10Ω at 10KHz. Recommended for application: CS = CO = 10 µF to 100 µF
3.1
Supply voltage transient
High supply voltage transients can cause a reset output signal disturbance. For supply
voltages greater than 8V the circuit shows a high immunity of the reset output against supply
transients of more than 100V/µs. For supply voltages less than 8V supply transients of more
than 0.4V/µs can cause a reset signal disturbance.
To improve the transient behaviour for supply voltages less than 8V a capacitor at pin V can
Z
be used.
This capacitor (C3 ≤ 1 µF) reduces also the output noise.
3.2
Functional description
The L4949ED-E and L4949EP-E are monolithic integrated voltage regulator, based on the
STM modular voltage regulator approach. Several outstanding features and auxiliary
functions are implemented to meet the requirements of supplying microprocessor systems
in automotive applications. Nevertheless, it is suitable also in other applications where the
10/19
Doc ID 16823 Rev 1
L4949ED-E, L4949EP-E
Application information
present functions are required. The modular approach of this device allows to get easily also
other features and functions when required.
3.3
Voltage regulator
The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating
element.
Figure 4.
Foldback characteristic of V
O
With this structure very low dropout voltage at currents up to 100mA is obtained. The
dropout operation of the standby regulator is maintained down to 3V input supply voltage.
The output voltage is regulated up to the transient input supply voltage of 40V. With this
feature no functional interruption due to overvoltage pulses is generated. The typical curve
showing the standby output voltage as a function of the input supply voltage is shown in
Figure 5. The current consumption of the device (quiescent current) is less than 300 µA.
To reduce the quiescent current peak in the undervoltage region and to improve the
transient response in this region, the dropout voltage is controlled, the quiescent current as
a function of the supply input voltage is shown in Figure 6.
Doc ID 16823 Rev 1
11/19
Application information
Figure 5.
L4949ED-E, L4949EP-E
Output voltage vs input voltage
Figure 6.
Quiescent current vs supply voltage
3.4
Preregulator
To improve the transient immunity a preregulator stabilizes the internal supply voltage to 5 V.
This internal voltage is present at Pin 3 (V ). This voltage should not be used as an output
Z
because the output capability is very small (≤ 10 µA).
This output may be used as an option when a better transient behaviour for supply voltages
less than 8 V is required (see also application note).
In this case a capacitor (100 nF - 1 µF) must be connected between pin V and GND. If this
Z
feature is not used pin V must be left open.
Z
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L4949ED-E, L4949EP-E
Application information
3.5
Reset circuit
The block circuit diagram of the reset circuit is shown in Figure 7. The reset circuit
supervises the output voltage.
The reset threshold of 4.5 V is defined with the internal reference voltage and standby
output divider.
The reset pulse delay time t , is defined with the charge time of an external capacitor C :
RD
T
C • 2V
T
2μA
t
= --------------------
RD
The reaction time of the reset circuit originates from the discharge time limitation of the reset
capacitor CT and is proportional to the value of CT.
The reaction time of the reset circuit increases the noise immunity. Standby output voltage
drops below the reset threshold only a bit longer than the reaction time results in a shorter
reset delay time.
The nominal reset delay time is generated for standby output voltage drops longer than
approximately 50ms.
The typical reset output waveforms are shown in Figure 8.
3.6
Sense comparator
The sense comparator compares an input signal with an internal voltage reference of typical
1.23V. The use of an external voltage divider makes this comparator very flexible in the
application.
It can be used to supervise the input voltage either before or after the protection diode and
to give additional informations to the microprocessor like low voltage warnings.
Figure 7.
Block circuit of reset circuit
Doc ID 16823 Rev 1
13/19
Application information
Figure 8.
L4949ED-E, L4949EP-E
Waveforms
14/19
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L4949ED-E, L4949EP-E
Package and packing information
4
Package and packing information
4.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
4.2
SO-8 TP package information
Table 9.
SO-8 TP mechanical data
mm
Typ.
Dim.
Min.
Max.
A
a1
a2
a3
b
1.75
0.25
1.65
0.85
0.48
0.25
0.5
0.1
0.65
0.35
0.19
0.25
b1
C
c1
D(1)
E
45° (typ.)
4.8
5.8
5.0
6.2
e
1.27
3.81
e3
F(1)
L
3.8
0.4
4.0
1.27
0.6
M
S
8° (max.)
1. D and F do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm
(.006inch).
Doc ID 16823 Rev 1
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Package and packing information
L4949ED-E, L4949EP-E
Figure 9.
SO-8 TP package dimensions
4.3
SO-20 TP package information
Table 10. SO-20 TP mechanical data
mm
Typ.
Dim.
Min.
Max.
2.65
0.3
A
A1
B
2.35
0.1
0.33
0.23
12.6
7.4
0.51
0.32
13
C
D
E
7.6
e
1.27
H
10
10.65
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Package and packing information
Table 10. SO-20 TP mechanical data (continued)
mm
Typ.
Dim.
Min.
0.25
Max.
0.75
1.27
h
L
0.4
K
0 (min.)8 (max.)
Figure 10. SO20 TP package dimensions
Doc ID 16823 Rev 1
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Revision history
L4949ED-E, L4949EP-E
5
Revision history
Table 11.
Date
24-Nov-2009
Document revision history
Revision
Description of changes
1
Initial release.
18/19
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L4949ED-E, L4949EP-E
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Doc ID 16823 Rev 1
19/19
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