L5959 [STMICROELECTRONICS]
Multifunction voltage regulator for car radio; 汽车收音机的多功能稳压器
| 型号： | L5959 |
| 厂家： | 
ST |
| 描述： | Multifunction voltage regulator for car radio |
| 文件： | 总19页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L5959
Multifunction voltage regulator for car radio
Features
■ Four outputs
– 8.5V @ 200mA (V8P5)
– 8/10V @ 1000mA selectable 10V or 8V
(V810)
– 3.3V @ 100mA permanent (VSTBY)
– 3.3V @ 800mA (VREGSW)
Multiwatt15
■ Two protected high side driver (HSD1, HSD2)
■ Reset function
■ Battery voltage (under/over) warning output
■ Load dump protection
Description
■ Independent thermal shutdown on all
The L5959 contains a four voltage regulator and
two protected HSDs. HSDs are protected against
loss of ground and loss of battery.
regulators and HSDs
■ Overcurrent limitation
■ Storage CAP output (STCAP)
■ Small CAP required by stability of regulators
■ All pins ESD protected
The IC includes a monitoring circuit for detection.
The IC features a very low quiescent current in
stand-by and independent thermal shutdown.
Table 1.
Device summary
Order code
Package
Multiwatt15
Packing
L5959
Tube
August 2007
Rev 2
1/19
www.st.com
1
Contents
L5959
Contents
1
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
Pins connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
3.2
3.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
5
6
Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2/19
L5959
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Enable logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3/19
List of figures
L5959
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pins connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Timing diagram of regulators and HSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STCAP and RST diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VBATVW (over/under voltage warning) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Independent thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
RST glitch rejection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Enable on/off delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Multiwatt15 (vertical) mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . 17
4/19
L5959
1
Block diagram
Block diagram
Figure 1.
Block diagram
VBAT
Tw o H S D
V810
HSD1
HSD2
V810
VSTBY
VSTBY
STCAP
VREGSW
V8P5
VREGSW
V8P5
VBATVW
RST
LOAD-DUMP
RESET
EN0
EN1
EN2
ENABLE
RSTDLY
Table 2.
EN2
Enable logic
EN1
V810
(8V)
V810
(10V)
EN0
VREGSW
V8P5
HSD1
HSD2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Off
On
On
On
On
On
On
On
Off
On
Off
On
On
On
On
On
Off
On
Off
On
On
On
On
On
Off
Off
Off
Off
Off
Off
On
On
Off
On
Off
Off
Off
On
Off
Off
Off
On
Off
On
Off
Off
Off
On
5/19
Pins description
L5959
2
Pins description
2.1
Pins connection
Figure 2.
Pins connection (top view)
15
14
13
12
11
10
9
VBAT
V810
V8P5
VREGSW
STCAP
VSTBY
HSD1
GND
8
7
VBATVW
EN2
6
5
EN1
4
EN0
3
RSTDLY
RST
2
1
HSD2
D06AU1637
6/19
L5959
Electrical specification
3
Electrical specification
3.1
Absolute maximum ratings
Table 3.
Absolute maximum ratings
Parameter
Symbol
Value
Unit
VBATDC
VBATTR
IO
DC operating supply voltage
Transient supply voltage
30
50
V
V
Output current
internally limited
0.5
RESR
Top
Output capacitor series eq. resistance (MAX.)
Operating temperature range
Storage temperature
Ω
-40 to 105
-55 to 150
-55 to 150
43
°C
°C
°C
W
Tstg
Tj
Junction temperature
Pd
Power dissipation Tcase = 85°C
3.2
Thermal data
Table 4.
Symbol
Rth j-case
Thermal data
Parameter
Multiwatt
Unit
Thermal resistance junction to case max.
1.8
°C/W
3.3
Electrical characteristics
Table 5.
Electrical characteristics
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
INPUT SUPPLIES
Vbat
VSTCAP
Vbat
Input supply
Operating
9
6
18
18
V
V
Input supply voltage 2
Battery voltage
Operating
Reverse polarity
Reverse polarity
non operating
non operating
VSTCAP Input supply voltage 2
EN0 = EN1 = EN2 = 0 V;
Iq
Total quiescent current
55
27
75
30
µA
V
VBAT = 14 V; IVSTBY = 100 µA
Verify all outputs except VSTBY
disabled and VBATVW*
VOV
VBAT Over-voltage shutdown
24
asserted low (VBAT Rising)
Hysteresis of over-voltage
shutdown
VHYSOV
200
750
1500
mV
7/19
Electrical specification
L5959
Table 5.
Electrical characteristics (continued)
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Verify VBATVW* asserted low
(VBAT Falling)
VUV
VBAT Under-voltage warning
7
7.4
7.8
V
Hysteresis of under-voltage
warning
VHYSUV
70
300
500
mV
VSTBY
Vo(VSTBY) Output voltage of VSTBY
3.14
-10
3.3
0
3.46
+10
+10
V
ΔV
Line regulation
Load regulation
VBAT = 6 to 18V; I = 100mA
IVSTBY = 0.5 to 100 mA
mV
mV
ΔVi
-40
-5
IVSTBY = 100 to 0.5 mA,
Co=1µF
Vover
Over shoot
2.5
70
6
%
IVSTBY = 50 mA;
fo = 20 to 1 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
50
45
dB
PSRR
Supply voltage ripple rejection
IVSTBY = 50 mA;
fo = 20 to 20 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
55
85
dB
µV
Weighted filter
fo = 20 Hz to 20 kHz
IVSTBY = 5 mA
VN
Output noise
200
Drop out voltage
Drop out voltage
Current limit
I
I
VSTBY = 100mA(1)
2.6
2.3
300
V
V
Vdrop
Im
VSTBY = 5 mA
Rshort = 0Ω
VSTBY = 500 µA;
150
150
200
3.3
mA
I
TSEN
VSTBY thermal shutdown
Increase Ta until VSTBY
disabled
190
°C
VREGSW
Vo
Output voltage 3.3V
3.14
-40
3.46
40
V
(VREGSW)
IVSTBY = 50 mA
IVREGSW = 0.5 to 800 mA
Measure VSTBY – VREGSW
mV
VREGSW output tracking
voltage on VSTBY
VTRK
IVSTBY = 0.5 mA to 100 mA
IVREGSW = 0.5 to 800 mA
-50
50
mV
Measure VSTBY – VREGSW
ΔV
Line regulation
Load regulation
Vin1 = 9 to 18V; I = 800mA
IVREGSW = 1 to 800mA
-40
-50
10
40
10
mV
mV
ΔVi
-15
8/19
L5959
Electrical specification
Table 5.
Symbol
Electrical characteristics (continued)
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Parameter
Test Condition
IVREGSW = 400 mA;
Min.
Typ.
Max.
Unit
fo = 20 to 1 kHz;
50
70
dB
VBAT = 14 Vdc, 1.0 Vac(pp)
PSRR
Supply voltage ripple rejection
IVREGSW = 400 mA;
fo = 20 to 20 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
45
55
85
dB
µV
Weighted filter
fo = 20 Hz to 20 kHz
IVREGSW = 5 mA
VN
Output noise
200
Vdrop
Vdrop
Im
Drop out voltage
Drop out voltage
Current limit
IVREGSW = 800 mA
IVREGSW = 5 mA
Rshort = 0Ω
2.6
2.3
2.5
V
V
A
1
1.5
IVREGSW = 500 µA; Increase Ta
until VREGSW disabled
TSEN
VREGSW thermal shutdown
150
10
190
°C
tdon
tdoff
Turn-on delay;
Turn-off delay,
Ivregsw= 5mA
45
45
110
110
µs
µs
IVREGSW = 700 mA
V8P5 (VBAT=9.5V to 18 V)
Vo (V8P5) Output voltage 8.5V
8.3
-50
-30
8.5
3.0
3
8.7
50
20
V
ΔV
Line regulation
Load regulation
VBAT = 9.5 to 18V; I = 200mA
IV8P5 = 1 to 200mA
mV
mV
ΔVi
IV8P5 = 100 mA;
fo = 20 to 1 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
50
35
60
40
dB
dB
µV
PSRR
Supply voltage ripple rejection
IV8P5 = 100 mA;
fo = 20 to 20 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
Weighted filter
fo = 20 Hz to 20 kHz
VN
Output noise
190
450
IV8P5 = 5 mA
Vdrop
Im
Drop out voltage
Current limit
IV8P5 = 200mA
0.45
450
0.9
V
Rshort = 0Ω
275
150
10
700
mA
IV8P5 = 500 µA; Increase Ta
until V8P5 disabled
TSEN
V8P5 thermal shutdown
190
°C
tdon
tdoff
Turn-on delay;
Turn-off delay,
IV8P5 = 5mA
45
45
110
110
µs
µs
IV8P5 = 200 mA
V810 (8V) (VBAT = 9.2V to 18 V)
Vo (V810) Output voltage 8.0V
7.6
-50
8.0
3
8.4
50
V
VBAT = 9.2 to 18V;
I = 1000mA
ΔV
Line regulation
mV
9/19
Electrical specification
L5959
Table 5.
Electrical characteristics (continued)
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ΔVi
Load regulation
IV810 = 0.5 to 1000 mA
-100
-20
10
mV
IV810 = 500 mA;
fo = 20 to 1 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
50
30
55
35
dB
dB
µV
PSRR
Supply voltage ripple rejection
IV810 = 500 mA;
fo = 20 to 20 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
Weighted filter
fo = 20 Hz to 20 kHz
IV810 = 5 mA
VN
Output noise
175
450
Vdrop
Im
Drop out voltage
Current limit
IV810(8V) = 1000mA (1)
0.45
2.3
0.9
3.5
V
A
Rshort = 0Ω
1.5
150
10
IV810(8V) = 500 µA; Increase Ta
until V810(8V) disabled
TSEN
V810(8v) thermal shutdown
190
°C
tdon
tdoff
Turn-on delay;
Turn-off delay,
IV810(8V) = 5mA
45
45
110
110
µs
µs
IV810(8V) = 1000 mA
V810 (10V) (VBAT=11.2V to 18 V)
Vo (V810) Output Voltage 10.0V
9.5
-50
10.0
2.5
10.5
50
V
VBAT = 11.2 to 18V; I =
1000mA
ΔV
Line regulation
Load regulation
mV
mV
ΔVi
IV810 = 0.5 to 1000 mA
-100
-25
10
IV810 = 500 mA;
fo = 20 to 1 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
50
30
55
35
dB
dB
µV
PSRR
Supply voltage ripple rejection
IV810 = 500 mA;
fo = 20 to 20 kHz;
VBAT = 14 Vdc, 1.0 Vac(pp)
Weighted filter
fo = 20 Hz to 20 kHz
IV810 = 5 mA
VN
Output noise
175
450
Vdrop
Im
Drop out voltage
Current limit
IV810(10V) = 1000mA (1)
0.4
2.3
0.9
3.5
V
A
Rshort = 0Ω
1.5
150
10
IV810(8V) = 500 µA; Increase Ta
until V810(10V) disabled
TSEN
V810(10V) thermal shutdown
190
°C
tdon
tdoff
Turn-on delay;
Turn-off delay,
IV810(8V) = 5mA
45
45
110
110
µs
µs
IV810(8V) = 1000 mA
HIGH SIDE DRIVER1
Idc = 100mA
0.25
0.50
0.6
1.2
V
V
VdropSW Drop voltage HDS1
Idc = 200mA, t=5S
10/19
L5959
Electrical specification
Table 5.
Electrical characteristics (continued)
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Symbol
Parameter
Test Condition
VHSD1=0V
VHSD1=VBAT
HSD1 = 0 to 100 mA;
Min.
Typ.
Max.
Unit
ISTG
ISTB
HSD1 short to ground current
HSD1 short to VBAT current
240
300
2
400
10
mA
mA
I
ΔIQ(VBAT)
HSD1 bias current change
HSD1 thermal shutdown
Measure change in VBAT
current
0.15
10
mA
°C
IHSD1 = 500 µA; Increase Ta
until HSD1 disabled
TSEN
150
10
190
tdon
tdoff
Turn-on delay;
Turn-off delay,
IHSD1= 10mA
50
70
110
110
µs
µs
IHSD1= 100 mA
10% to 90%,
IHSD1 = 10mA
tr
Rise time
35
75
µs
HIGH SIDE DRIVER2
Idc = 300mA
0.2
0.3
0.6
1.2
1
V
V
VdropSW Drop voltage HDS2
Idc =450mA, t=5S
VHSD2=0V
ISTG
ISTB
HSD2 short to ground current
0.55
0.75
3.5
A
HSD2 short to VBAT current
VHSD2=VBAT
10
mA
IHSD2 = 0 to 300 mA;
ΔIQ(VBAT)
HSD2 bias current change
Measure change in VBAT
current
0.15
10
mA
°C
IHSD2 = 500 µA; Increase Ta
until HSD2 disabled
TSEN
HSD2 thermal shutdown
150
10
190
tdon
tdoff
Turn-on delay;
Turn-off delay,
IHSD2= 10mA
45
70
110
110
µs
µs
IHSD2= 300 mA
10% to 90%,
IHSD2 = 10mA
tr
Rise time
30
75
µs
RST (open collector output)
0.93 * 0.95 * 0.97 *
VSTBY VSTBY VSTBY
Force VSTBY low until RST*
asserted
VTH
VSTBY reset threshold
V
Hysteresis of reset on rising
VSTBY
VHYS
10
50
200
mV
10% to 90%,
RRST= 47 kΩ,
CRST = 50 pF
trRST
Rise time
Fall time
20
30
µs
ns
90% to 10%,RRST= 47 kΩ,
CRST = 50 pF
tfRST
300
1000
V
_RSTDLY RSTDLY input voltage threshold Verify RST is de asserted
2.5
6
2.75
8.5
3.5
12
V
IH
ISRC
RSTDLY current
RSTDLY = 0 VDC
µA
11/19
Electrical specification
L5959
Unit
Table 5.
Electrical characteristics (continued)
(V = 14.4V; T
= 25°C; unless otherwise specified)
S
amb
Symbol
Parameter
Test Condition
CRSTDLY = 0.1 µF
Min.
Typ.
Max.
tpor
RST POR delay time
20
5
30
50
20
ms
µs
Tglitch
Glitch rejection filter time
12.5
ENABLE INPUT (VREGSW, V8P5, V810, HSD1, HSD2)
Threshold recognized as high
level
VIH
2.0
V
V
Threshold recognized as low
level
VIL
0.8
VHYSEN
ILKGEN
Hysteresis of enable
0.15
10
0.35
30
V
Enable input pull-down current
VEN = VIL(mIN) to VSTBY
50
µA
1. Drop condition means that the supply voltage drop down to 100 mV from the regulated output and the regulator is sourcing
its maximal load.
2. Stability Request is design info, not tested.
12/19
L5959
Timing diagrams
4
Timing diagrams
Figure 3.
Timing diagram of regulators and HSD
DUMP
27.4V
26.6V
18V
9V
VBAT
3.3V
VSTBY
EN
VREGSW
V8P5
000
111
000
111
3.3V
8.5V
8V
V810
18V
9V
HSD1
HSD2
10V
9V
AC00329
Figure 4.
STCAP and RST diagram
VBAT
14V
STCAP
VSTBY
3.3V
3.18V
3.13V
t
3.3V
2.7V
RSTDLY
RST
t
t
AC00330
13/19
Timing diagrams
Figure 5.
L5959
VBATVW (over/under voltage warning)
DUMP
26.6V
27.4V
7.4V
18V
VBAT 14.4V
7.67V
3.3V
VBATVW
3.3V
VSTBY
3.3V
VREGSW
8.5V
V8P5
8 V
V810
27.4V
HSD1 18V
14.4V
27.4V
HSD2 18V
14.4V
000
111
EN
AC00331
14/19
L5959
Timing diagrams
Figure 6.
Independent thermal shutdown
14.4V
VBAT
THERMAL
SHUTDOWN
(of VSTBY)
ON T = 160
VSTBY
THERMAL
SHUTDOWN
(of VREGSW)
ON T = 160
VREGSW
THERMAL
SHUTDOWN
(of V8P5)
ON T = 160
V8P5
THERMAL
SHUTDOWN
(of V810)
ON T = 160
V810
THERMAL
SHUTDOWN
(of HSD1)
ON T = 160
HSD1
THERMAL
SHUTDOWN
(of HSD2)
ON T = 160
HSD2
EN
111
AC00332
15/19
Timing diagrams
Figure 7.
L5959
RST glitch rejection
< Tglitch
> Tglitch
3.3V
VSTBY
5V
Tglitch
TPOR
RST
AC00333
Figure 8.
Enable on/off delay
Tdon
Tdoff
90%
VERGSW
(V810, V8PS, HSDI, HSD2)
10%
EN
000
111
000
AC00334
16/19
L5959
Package information
5
Package information
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
Figure 9.
Multiwatt15 (vertical) mechanical data and package dimensions
mm
inch
DIM.
MIN. TYP. MAX. MIN.
TYP. MAX.
0.197
OUTLINE AND
MECHANICAL DATA
A5
B
2.65
0.104
C
1.6
0.063
D
1
0.039
E
0.49
0.66
1.02
0.55 0.019
0.75 0.026
0.022
F
0.030
G
1.27
1.52 0.040 0.050 0.060
G1
H1
H2
L
17.53 17.78 18.03 0.690 0.700 0.710
19.6
0.772
20.2
0.795
21.9
21.7
22.2
22.1
22.5 0.862 0.874 0.886
22.5 0.854 0.87 0.886
L1
L2
L3
L4
L7
M
17.65
18.1 0.695
0.713
17.25 17.5 17.75 0.679 0.689 0.699
10.3
2.65
4.25
4.73
1.9
10.7
10.9 0.406 0.421 0.429
2.9 0.104 0.114
4.55
5.08
4.85 0.167 0.179 0.191
5.43 0.186 0.200 0.214
M1
S
2.6
2.6
0.075
0.075
0.102
0.102
0.152
Multiwatt15 (Vertical)
S1
Dia1
1.9
3.65
3.85 0.144
0016036 J
17/19
Revision history
L5959
6
Revision history
Table 6.
Date
Document revision history
Revision
Changes
26-Jun-2006
28-Aug-2007
1
2
Initial release.
Minor changes, improved quality of the drawings.
18/19
L5959
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