L80N4LLF3
更新时间:2024-09-18 06:07:32
描述:N-channel 40V - 0.0042ohm - 80A - PowerFLAT (6x5) STripFET Power MOSFET for DC-DC conversion
L80N4LLF3 概述
N-channel 40V - 0.0042ohm - 80A - PowerFLAT (6x5) STripFET Power MOSFET for DC-DC conversion N沟道40V - 0.0042ohm - 80A - PowerFLAT (引脚6x5 )的STripFET功率MOSFET用于DC-DC转换
L80N4LLF3 数据手册
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PDF下载STL80N4LLF3
N-channel 40V - 0.0042Ω - 80A - PowerFLAT™ (6x5)
STripFET™ Power MOSFET for DC-DC conversion
General features
Type
VDSS
RDS(on)
ID
STL80N4LLF3
40V
<0.005Ω
20A (1)
1. When mounted on FR-4 board of 1 inch² , 2oz Cu,
t<10 sec
■ Improved die-to-footprint ratio
■ Very low profile package (1mm Max)
■ Very low thermal resistance
■ Conduction losses reduced
■ Switching losses reduced
PowerFLAT™( 6x5 )
Description
Internal schematic diagram
This series of product utilizes the latest advanced
design rules of ST’s proprietary STripFET™
Technology. The resulting Transistor is optimized
for low on-Resistance and minimal gate charge.
The chip-scaled PowerFLAT™ package allows a
significant board space saving, still boosting the
performance.
Applications
■ Switching application
Order codes
Part number
Marking
Package
Packaging
STL80N4LLF3
L80N4LLF3
PowerFLAT™ (6x5)
Tape & reel
November 2006
Rev 7
1/12
www.st.com
12
Contents
STL80N4LLF3
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
STL80N4LLF3
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
40
16
18
80
Unit
VDS
VGS
Drain-source voltage (VGS = 0)
Gate- source voltage
V
V
(1)
VGS
Gate- source voltage
V
(2)
ID
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC = 100°C
Drain current (continuous) at TC = 25°C
Drain current (pulsed)
A
(2)
ID
50
20
A
(3)
ID
A
(4)
IDM
80
A
(2)
PTOT
Total dissipation at TC = 25°C
Total dissipation at TC = 25°C
Derating factor (3)
80
W
W
W/°C
(3)
PTOT
4
0.03
Tstg
Tj
Storage temperature
-55 to 150
°C
Operating junction temperature
1. Guaranteed for test time < 15ms
2. The value is rated according Rthj-c
3. When mounted on FR-4 board of 1 inch² , 2oz Cu, t < 10 sec
4. Pulse width limited by safe operating area
Table 2.
Symbol
Thermal resistance
Parameter
Value
Unit
Rthj-c
Thermal resistance junction-case max
1.56
31.2
°C/W
°C/W
Rthj-pcb (1) Thermal operating junction-pcb max
1. When mounted on FR-4 board of 1 inch² , 2oz Cu, t<10 sec
3/12
Electrical characteristics
STL80N4LLF3
2
Electrical characteristics
(T
= 25°C unless otherwise specified)
CASE
Table 3.
Symbol
On/off states
Parameter
Test conditions
Min.
Typ.
Max. Unit
Drain-source
V(BR)DSS
ID = 250 µA, VGS = 0
40
V
breakdown voltage
Zero gate voltage
V
DS = Max rating
10
µA
µA
IDSS
drain current (VGS = 0)
VDS = Max rating@125 °C
100
Gate-body leakage
current (VDS = 0)
IGSS
VGS
=
16V
200 nA
V
VGS(th) Gate threshold voltage
VDS = VGS, ID = 250 µA
1
VGS = 10V, ID = 10 A
VGS = 4.5V, ID =10 A
0.0042 0.005
0.005 0.007
Ω
Ω
Static drain-source on
resistance
RDS(on)
Table 4.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
Input capacitance
Ciss
Coss
Crss
2530
574
29
pF
pF
pF
VDS = 25V, f = 1 MHz,
VGS = 0
Output capacitance
Reverse transfer
capacitance
f=1 MHz Gate DC Bias = 0
Test signal level = 20mV
open drain
RG
Gate input resistance
1
3
5
Ω
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 32V, ID = 20 A,
VGS = 4.5V
21.5
6.9
28
nC
nC
nC
(see Figure 13)
8.2
4/12
STL80N4LLF3
Electrical characteristics
Min Typ Max Unit
Table 5.
Switching times
Parameter
Symbol
Test conditions
td(on)
tr
td(off)
tr
Turn-on delay time
Rise time
17
25
62
9
ns
ns
ns
ns
VDD = 20V, ID = 10A,
RG= 4.7ΩVGS = 10V
(see Figure 15)
Turn-off delay time
Fall time
Table 6.
Symbol
Source drain diode
Parameter
Test conditions
Min Typ. Max Unit
ISD
Source-drain current
20
80
A
A
(1)
ISDM
Source-drain current (pulsed)
(2)
VSD
Forward on voltage
ISD = 20 A, VGS = 0
1.2
V
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 20A,VDD = 20V
di/dt = 100A/µs
43
64
3
ns
nC
A
Qrr
IRRM
Tj = 150°C(see Figure 14)
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300µs, duty cycle 1.5%
5/12
Electrical characteristics
STL80N4LLF3
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characterisics
Figure 4. Transfer characteristics
Figure 5. Normalized B
vs temperature
Figure 6. Static drain-source on resistance
VDSS
6/12
STL80N4LLF3
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs
vs temperature
temperature
Figure 11. Source-drain diode forward
characteristics
7/12
Test circuit
STL80N4LLF3
3
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
switching and diode recovery times
Figure 15. Unclamped inductive load test
circuit
Figure 16. Unclamped inductive waveform
Figure 17. Switching time waveform
8/12
STL80N4LLF3
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/12
Package mechanical data
STL80N4LLF3
PowerFLAT™ (6x5) MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
0.83
0.02
0.20
0.40
5.00
4.75
4.20
6.00
5.75
3.48
2.63
1.27
0.80
MAX.
0.93
0.05
MIN.
MAX.
0.036
A
A1
A3
b
0.80
0.031
0.032
0.0007
0.007
0.015
0.196
0.187
0.165
0.236
0.226
0.137
0.103
0.050
0.031
0.0019
0.35
4.15
0.47
4.25
0.013
0.163
0.135
0.027
0.018
0.167
D
D1
D2
E
E1
E2
E4
e
3.43
2.58
3.53
2.68
0.139
0.105
L
0.70
0.90
0.035
10/12
STL80N4LLF3
Revision history
5
Revision history
Table 7.
Date
Revision history
Revision
Changes
13-May-2005
20-Jun-2005
22-Jun-2005
04-Jan-2006
06-Jun-2006
04-Sep-2006
22-Nov-2006
1
2
3
4
5
6
7
First release.
Updated mechanical data
New RG value on Table 6
New footprint
Complete version
New template, no content change
Corrected part number
11/12
STL80N4LLF3
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