LCP02-150M [STMICROELECTRONICS]
PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR RINGING SLICS; 可编程瞬态电压抑制器振铃SLIC组件
| 型号： | LCP02-150M |
| 厂家： | 
ST |
| 描述： | PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR RINGING SLICS |
| 文件： | 总9页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
LCP02-150M
PROGRAMMABLE TRANSIENT VOLTAGE
SUPPRESSOR FOR RINGING SLICS
A.S.D.™
FEATURES
■
■
■
■
■
■
■
Protection IC recommended for ringing SLICs.
Wide firing voltage range: from -110V to +95V.
Low gate triggering current
Peak pulse current: IPP = 100A (10/1000µs) .
Holding current: IH = 150mA min.
High power dissipation capability
UL497B approved (file E136224)
MAIN APPLICATIONS
PowerS0-10™
■
Dual battery supply voltage SLICs
- negative battery supply configuration
- negative & positive battery supply configuration
■
■
■
■
■
■
■
■
■
Central Office (CO)
FUNCTIONAL DIAGRAM
Private Branch Exchange (PBX)
Digital Loop Carrier (DLC)
Asymmetrical Digital Subscriber Line (ADSL)
Fiber in the Loop (FITL)
Wireless Local Loop (WLL)
Hybrid Fiber Coax (HFC)
ISDN Terminal Adapter
TIP
Gp
Gn
Cable modem
GND
DESCRIPTION
The LCP02-150M has been developed to protect
SLICs operating on both negative and positive
supplies, as well as on high voltage SLICs. It
provides crowbar mode protection for both TIP and
RING lines. Surge suppression is assumed for
each wire by two thyristor structures, one
dedicated to positive surges, the second one to
negative surges. Both positive and negative
threshold levels are programmable by two gates
(Gn and Gp). The use of transistors decreases the
battery currents during surge suppression.
RING
PIN-OUT CONFIGURATION
GND
Gp
TIP
TIP
TIP
TIP
Gn
The LCP02-150M has high Bellcore Core, ITU-T
and FCC Part 68 lightning surge ratings, ensuring
rugged performance in the field.
RING
RING
RING
RING
The choice of the PowerSo-10TM package is
driven by its high power dissipation capability.
In addition, the LCP02-150M is also specified to
assist a designer to comply with UL1950, IEC950
and CSA C22.2. It is UL 497B approved (file
E136224), and has UL94-V0 resin approved
GND
TM: ASD is trademarks of STMicroelectronics.
May 2003 - Ed: 4B
1/9
LCP02-150M
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
Symbol
IGP
Parameter
IH
Positive gate triggering current
Negative gate triggering current
Holding current
IGN
IH
VGN VRM
IRM
IRG
Reverse leakage current GATE /
LINE
IRM
VRM VGP
IRM
VRM
VDGL
Reverse leakage current
IH
Reverse voltage LINE/ GND
Dynamic switching voltage GATE
/ LINE
VGATE
VRG
C
GATE / GND voltage
Reverse voltage GATE / LINE
Capacitance LINE / GND
COMPLIES WITH FOLLOWING STANDARDS
Peak surge
voltage
(V)
Voltage
Required
Current Minimum serial
waveform peak current waveform resistor to meet
(µs)
(A)
(µs)
standard ( )
6000
1500
10/700
10/700
150
37.5
5/310
5/310
-
-
ITU-T K20
6000
1500
10/700
10/700
150
37.5
5/310
5/310
-
-
ITU-T K21
VDE0433
VDE0878
2000
2000
10/700
1.2/50
50
50
5/310
1/20
-
-
level 4
level 4
10/700
1.2/50
100
100
5/310
8/20
-
-
IEC61000-4-5
FCC Part 68
lightning surge type A
1500
800
10/160
10/560
200
100
10/160
10/560
-
-
FCC Part 68
lightning surge type B
1000
9/720
25
5/320
-
BELLCORE
GR-1089-CORE
First level
2500
1000
2/10
10/1000
500
100
2/10
10/1000
-
-
BELLCORE
GR-1089-CORE
Second level
5000
2/10
500
2/10
-
2/9
LCP02-150M
ABSOLUTE RATINGS (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
IPP
Peak pulse current
10/1000µs
8/20µs
10/560µs
5/310µs
10/160µs
1/20µs
100
250
120
150
200
250
500
A
2/10µs
ITSM
Non repetitive surge peak on-state current
(sinusoidal)
t = 0.2 s
t = 1s
t = 15 min
13
10
3.5
A
V
VGN max Maximum negative battery voltage range
VGP max Maximum positive battery voltage range
∆ Vbat max Total battery supply voltage
See fig.1
-110 to 0
0 to +95
190
Top
Tstg
TL
Operating temperature range (see note 1)
Storage temperature range
-20 to +85
°C
- 55 to + 150
260
°C
°C
Maximum lead temperature for soldering during 10s
Note 1: Within the Top range, the LCP02-150M keeps on operating. The impacts of the ambient temperature are given by derating curves.
Fig. 1: Test circuit
TIP
Gp from +0V to +95V
∆ Vbat ≤ 190V
Gn from -110V to +0V
RING
Gn connected to negative supply voltage
Gp connected to positive supply voltage
∆ Vbat: differential voltage between VGn and VGp
THERMAL RESISTANCE
Symbol
Parameter
Value
Unit
Rth (j-a) Junction to ambient
60
°C/W
3/9
LCP02-150M
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
1 - PARAMETERS RELATED TO THE NEGATIVE SUPPRESSOR
Symbol
Test conditions
Min.
Max. Unit
IGn
VGn/GND = -60V
Measured at 50Hz
5
mA
IH-
Go-No Go test, VGn = -60V
Tj = 25°C, VGn/line = -190V
150
mA
µA
IRGL-
VDGL-
5
VGn/GND = -60V
10/1000µs 1kV RP = 25Ω IPP = 30A
10/700µs 2kV RP = 25Ω IPP = 30A
1.2/50µs 2kV RP = 25Ω IPP = 30A
10
6
12
V
2 - PARAMETERS RELATED TO THE POSITIVE SUPPRESSOR
Symbol
Test conditions
Min.
Max. Unit
IGp
10
mA
VGp/GND = 60V
Measured at 50Hz
IRGL+
5
µA
Tj = 25°C, VGp/line = +190V
VDGL+
VGp/GND = +60V
12
8
18
10/1000µs 1kV RP = 25Ω IPP = 30A
10/700µs 2kV RP = 25Ω IPP = 30A
1.2/50µs 2kV RP = 25Ω IPP = 30A
V
3 - PARAMETERS RELATED TO LINE/GND
Symbol
Test conditions
Typ. Max. Unit
IR
Tj = 25°C, VLINE = +90V, VGP/LINE = +1V
Tj = 25°C, VLINE = -105V, VGN/LINE = -1V
5
5
µA
Coff
VR = -3V, F =1MHz, VGp = 60V, VGn = -60V
150
pF
4/9
LCP02-150M
Fig. 2: Non repetitive surge peak on state current
versus overload duration (Tj initial = 25°C).
Fig. 3: Relative variation of holding current versus
junction temperature.
I
(A)
TSM
I (T )/I [T =25°C]
25
20
15
10
5
H
j
H
j
F=50Hz
Tj initial=25C
2
1.5
1
0.5
0
T(°C)
t(s)
0
-20
0
20
40
60
80
100
0.01
0.1
1
10
100
1000
Fig. 4: Variation of junction capacitance versus re-
verse voltage applied (typical calues) with:
VGN = -90V and VGP = +90V.
C(pF)
200
180
160
140
120
100
Vline (V)
80
1
10
100
Line -
Line +
5/9
LCP02-150M
TECHNICAL INFORMATION
Fig. 5: LCP02 concept behavior.
Rs1
L 1
TIP
V Tip
Igp
T2
Ign
T1
Th1
Th2
Gn
Gp
-Vbat
+Vb
GND
Cp
Cn
Rs2
RING
GND
L 2
V Ring
Figure 5 shows the classical protection circuit using the LCP02-150M crowbar concept. This topology has
been developped to protect the new two-battery voltage SLICs. It allows both positive and negative firing
thresholds to be programmed. The LCP02-150M has two gates (Gn and Gp). Gn is biased to negative bat-
tery voltage -Vbat, while Gp is biased to the positive battery voltage +Vb.
When a negative surge occurs on one wire (L1 for example), a current Ign flows through the base of the
transistor T1 and then injects a current in the gate of the thyristor Th1 which fires. The entire surge current
flows through the ground. After the surge, when the current flowing through Th1 becomes less negative
than the negative holding current, Th1 switches off. This holding current IH- is temperature dependant as
per figure 2.
When a positive surge occurs on one wire (L1 for example), a current Igp flows through the base of the
transistor T2 and then injects a current in the gate of the thyristor Th2 which fires. The entire surge current
flows through the ground. After the surge, when the current flowing through Th2 becomes less positive
than the positive holding current Ih+, Th2 switches off. This holding current IH+ is temperature dependant
and is equal to 30mA at 25°C.
The capacitors Cn and Cp are used to speed up the crowbar structure firing during the fast surge rise or
falling edges. This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs dur-
ing fast surges. Please note that these capacitors are generally available around the SLIC. To be efficient
they have to be as close as possible to the LCP02-150M gate pins (Gn and Gp) and to the reference
ground track (or plan). The optimized value for Cn and Cp is 220nF.
The series resistors Rs1 and Rs2 represent the fuse, fuse resistors or the PTCs which are needed to with-
stand the power contact or the power induction tests imposed by the country standards. Taking this factor
into account, the actual lightning surge current flowing through the LCP02-150M is equal to :
I surge = Vsurge / (Rg + Rs)
With
V surge = peak surge voltage imposed by the standard.
Rg = series resistor of the surge generator
Rs = series resistor of the line card (e.g. PTC)
The LCP02-150M topology is particularly optimized for the new telecom applications such as cable mo-
dem, fiber in the loop, WLL systems, and decentralized central office for example. The schematics of figures
6 and 7 give the 2 most frequent topologies used for these emergent applications.
6/9
LCP02-150M
Fig. 6: Protection of SLIC with positive and negative battery voltages.
Line card
-Vbat
TIP
Rs (*)
Gn
TIP
Gp
220nF
GND
LCP02
Line
SLIC
220nF
RING
Rs (*)
RING
+Vb
Rs (*) = PTC or Resistor fuse
Fig. 7: Protection of high voltage SLIC
Line card
-Vbat
TIP
Rs (*)
Gn
TIP
LCP02
RING
Gp
220nF
GND
Line
SLIC
Rs (*)
RING
Rs (*) = PTC or Resistor fuse
Figure 6 shows the classical protection topology for SLIC using both positive and negative battery volt-
ages. With such a protection the SLIC is protected against surge over +Vb and lower than -Vbat. In this
case, +Vb can be programmed up to +95V while -Vbat can be programmed down to -110V. Please note
that the differential voltage does not exceed ∆Vbat max at 190V.
Figure 7 gives the protection topology for the new SLIC using high negative voltage down to -110V.
7/9
LCP02-150M
PACKAGE MECHANICAL DATA
PowerSO-10™ (Plastic)
DIMENSIONS
Millimeters Inches
B
REF.
Min.
Max.
Min.
Max.
0.10 A B
10
1
6
A
A1
B
C
D
3.35
0.00
0.40
0.35
9.40
7.40
9.30
7.20
7.20
6.10
5.90
3.65
0.10
0.60
0.55
9.60
7.60
9.50
7.40
7.60
6.35
6.10
0.131
0.00
0.0157 0.0236
0.0137 0.0217
0.143
0.0039
E3 E1
E
E2
H
5
SEATING
PLANE
0.370
0.291
0.366
0.283
0.283
0.240
0.232
0.05 Typ.
0.0492 0.0531
0.543 0.567
0.019 Typ.
0.378
0.299
0.374
0.291
0.299
0.250
0.240
A
e
B
DETAIL "A"
C
D1
E
0.25 M
Q
D
D1
h
F
E1
E2
E3
E4
e
F
H
h
A
SEATING
PLANE
A1
A1
L
1.27 Typ.
1.25
13.80
DETAIL "A"
1.35
14.40
a
E4
0.5 Typ.
L
Q
a
1.20
0°
1.80
1.70 Typ
0.0472 0.0708
0.067 Typ.
8°
0°
8°
FOOTPRINT DIMENSIONS (in millimeters)
0.54 - 0.60
1.27
0.67 - 0.73
9.5
8/9
LCP02-150M
ORDER CODE
Ordering Type
LCP02-150M
Marking
Package
Weight
Base qty
50
Delivery mode
Tube
LCP02-150M
PowerSO-10
1.02 g
LCP02-150M-TR
600
Tape & Reel
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All rights reserved.
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9/9
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