LDS3985PM285R
更新时间：2024-09-18 06:08:05
描述：ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR
概述
数据手册LDS3985PM285R 概述
ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR 超低压降低噪声BICMOS 300毫安V.REG 。适用于非常低的ESR输出电容
LDS3985PM285R 数据手册
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SERIES
ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG.
FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR
■
■
INPUT VOLTAGE FROM 2.5V TO 6V
STABLE WITH LOW ESR CERAMIC
CAPACITORS
■
■
ULTRA LOW DROPOUT VOLTAGE (150mV
TYP. AT 300mA LOAD, 0.4mV TYP. AT 1mA
LOAD)
VERY LOW QUIESCENT CURRENT (85µA
TYP. AT NO LOAD, 200µA TYP. AT 300mA
LOAD; MAX 1.5µA IN OFF MODE)
GUARANTEED OUTPUT CURRENT UP TO
300mA
WIDE RANGE OF OUTPUT VOLTAGE:
1.25V; 1.35; 1.5V; 1.8V; 2V; 2.1V; 2.2V; 2.5V;
2.6V; 2.7V; 2.8V; 2.85V; 2.9V; 3V; 3.1V; 3.2V;
3.3V; 4.7V
DFN6
SOT23-5L
■
■
It is stable with ceramic and high quality tantalum
capacitor. The ultra low drop-voltage, low
quiescent current and low noise makes it suitable
for low power applications and in battery powered
systems. Regulator ground current increases only
slightly in dropout, further prolonging the battery
life. Shutdown Logic Control function is available,
this means that when the device is used as local
regulator, it is possible to put a part of the board in
standby, decreasing the total power consumption.
Typical applications are in mobile phone and
similar battery powered wireless systems,
portable information appliances.
■
■
FAST TURN-ON TIME: TYP. 240µs
[C =2.2µF, C
= 33nF AND I =1mA]
O
BYP
O
LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN
INTERNAL CURRENT AND THERMAL LIMIT
■
■
OUTPUT LOW NOISE VOLTAGE 30µV
OVER 10Hz to 100KHz
RMS
■
■
S.V.R. OF 55dB AT 1KHz, 50dB AT 10KHz
TEMPERATURE RANGE: -40°C TO 125°C
DESCRIPTION
The LDS3985 provides up to 300mA, from 2.5V to
6V input voltage.
Figure 1: Schematic Diagram
Rev. 1
1/13
December 2004
LDS3985 SERIES
Table 1: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
DC Input Voltage
-0.3 to 6 (*)
V
V
V
I
V
DC Output Voltage
-0.3 to V +0.3
O
I
V
INHIBIT Input Voltage
Output Current
-0.3 to V +0.3
INH
I
I
Internally limited
Internally limited
-65 to 150
O
P
Power Dissipation
D
T
Storage Temperature Range
Operating Junction Temperature Range
°C
°C
STG
T
-40 to 125
OP
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms.
Table 2: Thermal Data
Symbol
Parameter
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
SOT23-5L
DFN6
Unit
R
81
10
55
°C/W
°C/W
thj-case
R
255
thj-amb
Table 3: Order Codes
SOT23-5L
DFN6
OUTPUT VOLTAGES
LDS3985M125R (*)
LDS3985M135R (*)
LDS3985M15R (*)
LDS3985M18R
LDS3985PM12R (*)
LDS3985PM13R (*)
LDS3985PM15R (*)
LDS3985PM18R
1.25 V
1.35 V
1.5 V
1.8 V
2.0 V
2.1 V
2.2 V
2.5 V
2.6 V
2.7 V
2.8 V
2.85 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
4.7 V
4.8 V
4.9 V
5.0 V
LDS3985M20R (*)
LDS3985M21R (*)
LDS3985M22R (*)
LDS3985M25R
LDS3985PM20R (*)
LDS3985PM21R (*)
LDS3985PM22R (*)
LDS3985PM25R
LDS3985M26R (*)
LDS3985M27R (*)
LDS3985M28R
LDS3985PM26R (*)
LDS3985PM27R (*)
LDS3985PM28R
LDS3985M285R (*)
LDS3985M29R
LDS3985PM285R (*)
LDS3985PM29R (*)
LDS3985PM30R (*)
LDS3985PM31R (*)
LDS3985PM32R (*)
LDS3985PM33R
LDS3985M30R (*)
LDS3985M31R (*)
LDS3985M32R (*)
LDS3985M33R
LDS3985M47R (*)
LDS3985M48R (*)
LDS3985M49R (*)
LDS3985M50R (*)
LDS3985PM47R (*)
LDS3985PM48R (*)
LDS3985PM49R (*)
LDS3985PM50R (*)
(*) Available on request.
2/13
LDS3985 SERIES
Figure 2: Connection Diagram (top view for SOT, top through view for DFN6)
SOT23-5L
DFN6
Table 4: Pin Description
Pin N°
SOT23-5L
Pin N°
DFN6
Symbol
Name and Function
1
1
V
Input Voltage of the LDO
Common Ground
I
2
3
5
6
GND
V
Inhibit Input Voltage: ON MODE when V
≥ 1.2V, OFF MODE when V
≤
INH
INH
INH
0.4V (Do not leave floating, not internally pulled down/up)
4
4
BYPASS
Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise
voltage
5
-
3
2
V
Output Voltage of the LDO
Not Connect.
O
N.C.
Figure 3: Typical Application Circuit
3/13
LDS3985 SERIES
Table 5: Electrical Characteristics For LDS3985 (T = 25°C, V = V
+0.5V, C = 1µF, C = 2.2µF
j
I
O(NOM)
I
O
C
= 33nF, I = 1mA, V = 1.4V, unless otherwise specified)
INH
BYP
O
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
6
Unit
V
V
Operating Input Voltage
Output Voltage < 2.5V
2.5
-50
-75
-2
I
V
I
= 1 mA
O
50
mV
O
T = -40 to 125°C
75
J
V
Output Voltage ≥ 2.5V
I
= 1 mA
2
% of
O
O
V
O(NOM)
T = -40 to 125°C
-3
3
J
∆V
Line Regulation (Note 1)
V = V
+ 0.5 to 6 VT = -40 to 125°C
-0.1
-0.19
0.1
0.19
0.01
%/V
O
I
O(NOM)
J
V
= 4.7 to 5V
O
∆V
∆V
∆V
Load Regulation
Load Regulation
I
= 1 mA to 300mA
V
V
≤ 2.5V
≥ 2.5V
0.005
%/mA
%/mA
O
O
O
O
O
O
T = -40 to 125°C
J
I
= 1 mA to 300mA
0.0008 0.004
5
O
T = -40 to 125°C
J
Output AC Line Regulation V = V
+ 1 V, I = 300mA,
mV
PP
I
O(NOM)
O
(Note 2)
t = t = 30µs
R
O
O
O
O
F
I
Quiescent Current
ON MODE: V
I
I
I
I
= 0
85
µA
Q
= 1.24V
INH
= 0
T = -40 to 125°C
150
200
300
J
= 0 to 300mA
= 0 to 300mA
T = -40 to 125°C
J
OFF MODE: V
= 0.4V
0.003
1.5
INH
T = -40 to 125°C
J
V
Dropout Voltage (Note 3)
I
I
I
I
I
I
= 1mA
0.4
mV
DROP
O
O
O
O
O
O
= 1mA
T = -40 to 125°C
2
J
= 150mA
= 150mA
= 300mA
= 300mA
60
T = -40 to 125°C
100
150
250
600
J
T = -40 to 125°C
J
I
Short Circuit Current
R = 0
mA
dB
SC
L
SVR Supply Voltage Rejection V = V
+0.25V ±
f = 1KHz
55
50
I
O(NOM)
V
= 0.1V, I = 50mA
O
f = 10KHz
RIPPLE
For V
< 2.5V, V =2.55V
I
O(NOM)
I
Peak Output Current
V
≥ V - 5%
O(NOM)
300
1.4
550
0.4
mA
V
O(PK)
O
V
Inhibit Input Logic Low
Inhibit Input Logic High
Inhibit Input Current
V = 2.5V to 6V
T = -40 to 125°C
J
INH
I
I
V
B
= 0.4V
V = 6V
±1
30
nA
INH
INH
I
eN
Output Noise Voltage
Turn On Time (Note 4)
Thermal Shutdown
Output Capacitor
= 10 Hz to 100 KHz
C
= 2.2 µF
µV
RMS
W
O
t
C
= 33 nF
BYP
240
160
µs
ON
T
Note 5
°C
SHDN
C
Capacitance (Note 6)
ESR
2.2
5
22
µF
O
5000
mΩ
Note 1: For V
Note 2: For V
< 2V V = 2.5V
I
O(NOM)
=1.25V V = 2.5V
O(NOM)
I
Note 3: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specifi-
cation does not apply for input voltages below 2.5V.
Note 4: Turn -on time is time measured between the enable input just exceeding V
of its nominal value
High Value and the output voltage just reaching 95%
INH
Note 5: Typical thermal protection hysteresis is 20°C
4/13
LDS3985 SERIES
TYPICAL PERFORMANCE CHARACTERISTICS (T = 25°C, V = V
+0.5V, C = 1µF, C = 2,2µF,
I O
j
I
O(NOM)
C
= 33nF, I = 1mA, V
= 1.4V, unless otherwise specified)
INH
BYP
O
Figure 4: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 8: Shutdown Voltage vs Temperature
Figure 6: Output Voltage vs Temperature
Figure 9: Line Regulation vs Temperature
5/13
LDS3985 SERIES
Figure 10: Line Regulation vs Temperature
Figure 13: Quiescent Current vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 14: Quiescent Current vs Temperature
Figure 12: Quiescent Current vs Temperature
Figure 15: Supply Voltage Rejection vs
Frequency
6/13
LDS3985 SERIES
Figure 16: Dropout Voltage vs Temperature
Figure 18: Inhibit Transient
V = 5V, I = 1mA, V
= 0 to 1.2V, C = C = 1µF (cer),
I O
I
O
INH
C
= 10nF, T = T = 1µs
R F
BYP
Figure 17: Dropout Voltage vs Output Current
7/13
LDS3985 SERIES
SOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
MAX.
1.45
0.10
1.30
0.50
0.20
3.00
1.75
MIN.
35.4
0.0
TYP.
MAX.
57.1
3.9
A
A1
A2
b
0.90
0.00
0.90
0.35
0.09
2.80
1.50
35.4
13.7
3.5
51.2
19.7
7.8
C
D
E
110.2
59.0
118.1
68.8
e
0.95
37.4
H
L
2.60
0.10
3.00
0.60
102.3
3.9
118.1
23.6
.
7049676C
8/13
LDS3985 SERIES
DFN6 (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
A1
A2
A3
b
0.80
0
1.00
0.05
0.75
31.5
0.0
39.4
2.0
0.65
25.6
29.5
0.20
3.00
3.00
0.95
0.24
7.9
118.1
118.1
37.4
9.4
0.33
2.90
1.92
2.90
1.11
0.43
3.10
2.12
3.10
1.31
13.0
114.2
75.6
16.9
122.0
83.5
D
D2
E
114.2
43.7
122.0
51.6
E2
e
L
0.20
0.20
0.45
0.13
7.9
7.9
17.7
5.1
L1
L2
K
7387339A
9/13
LDS3985 SERIES
Tape & Reel SOT23-xL MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
180
MIN.
MAX.
7.086
0.519
A
C
12.8
20.2
60
13.0
13.2
0.504
0.795
2.362
0.512
D
N
T
14.4
3.33
3.27
1.47
4.1
0.567
0.131
0.128
0.0.58
0.161
0.161
Ao
Bo
Ko
Po
P
3.13
3.07
1.27
3.9
3.23
3.17
1.37
4.0
0.123
0.120
0.050
0.153
0.153
0.127
0.124
0.054
0.157
0.157
3.9
4.0
4.1
10/13
LDS3985 SERIES
Tape & Reel QFNxx/DFNxx (3x3) MECHANICAL DATA
mm.
TYP
inch
DIM.
MIN.
MAX.
330
MIN.
TYP.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
18.4
0.724
Ao
Bo
Ko
Po
P
3.3
3.3
1.1
4
0.130
0.130
0.043
0.157
0.315
8
11/13
LDS3985 SERIES
Table 6: Revision History
Date
Revision
Description of Changes
02-Dic-2004
1
First Release.
12/13
LDS3985 SERIES
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
13/13
LDS3985PM285R 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| LDS3985PM28R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM29R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM30R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM31R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM32R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM33R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM47R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM48R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM49R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
| LDS3985PM50R | STMICROELECTRONICS | ULTRA LOW DROP-LOW NOISE BICMOS 300mA V.REG. FOR USE WITH VERY LOW ESR OUTPUT CAPACITOR | 获取价格 |
|
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