M27C256B-20F1 [STMICROELECTRONICS]
32KX8 UVPROM, 150ns, CDIP28, 0.280 INCH, LEAD FREE, CERAMIC, WINDOWED, FRIT SEALED, DIP-28;
| 型号： | M27C256B-20F1 |
| 厂家： | 
ST |
| 描述： | 32KX8 UVPROM, 150ns, CDIP28, 0.280 INCH, LEAD FREE, CERAMIC, WINDOWED, FRIT SEALED, DIP-28 可编程只读存储器 CD |
| 文件： | 总24页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27C256B
256 Kbit (32Kb × 8) UV EPROM and OTP EPROM
Feature summary
■ 5V ± 10% supply voltage in Read operation
■ Access time: 45ns
28
■ Low power consumption:
– Active Current 30mA at 5MHz
– Standby Current 100µA
1
FDIP28W (F)
■ Programming voltage: 12.75V ± 0.25V
■ Programming time: 100µs/Word
■ Electronic signature
– Manufacturer Code: 20h
– Device Code: 8Dh
28
1
■ ECOPACK® packages available
PDIP28 (B)
PLCC32 (C)
May 2006
Rev 2
1/24
www.st.com
1
Contents
M27C256B
Contents
1
2
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PRESTO II programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Program inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.10 Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3
4
5
6
7
2/24
M27C256B
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Read mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Programming mode DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Read mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Read mode AC characteristics 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Programming mode AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"),
package mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PDIP28 - 28 pin Plastic DIP, 600 mils width, package mechanical data . . . . . . . . . . . . . . 20
PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package
Table 13.
Table 14.
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 15.
Table 16.
3/24
List of figures
M27C256B
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
LCC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Programming flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AC testing input output waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
AC testing load circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Read mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Programming and Verify modes AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window, package outline. . . . . . . . . . . . . 19
Figure 10. PDIP28 - 28 pin Plastic DIP, 600 mils width, package outline . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package outline. . . . . . . . . . . 21
4/24
M27C256B
Summary description
1
Summary description
The M27C256B is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for microprocessor systems and is
organized as 32,768 by 8 bits.
The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the
user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C256B is offered in PDIP28 and PLCC32 packages.
In order to meet environmental requirements, ST offers the M27C256B in ECOPACK®
packages.
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 1.
Logic diagram
V
V
PP
CC
15
8
A0-A14
Q0-Q7
E
M27C256B
G
V
SS
AI00755B
5/24
Summary description
M27C256B
Table 1.
Signal names
A0-A14
Address Inputs
Data Outputs
Chip Enable
Q0-Q7
E
G
Output Enable
Program Supply
Supply Voltage
Ground
VPP
VCC
VSS
NC
DU
Not Connected Internally
Don’t Use
Figure 2.
DIP connections
V
1
2
3
4
5
6
7
8
9
28
V
CC
PP
A12
A7
A6
A5
A4
A3
A2
A1
27 A14
26 A13
25 A8
24 A9
23 A11
22
G
M27C256B
21 A10
20
E
A0 10
Q0 11
Q1 12
Q2 13
19 Q7
18 Q6
17 Q5
16 Q4
15 Q3
V
14
SS
AI00756
6/24
M27C256B
Summary description
Figure 3.
LCC connections
1 32
M27C256B
17
A6
A5
A4
A3
A2
A1
A0
NC
Q0
A8
A9
A11
NC
G
9
25
A10
E
Q7
Q6
AI00757
7/24
Device operation
M27C256B
2
Device operation
The operating modes of the M27C256B are listed in the Operating Modes. A single power
supply is required in the read mode. All inputs are TTL levels except for V and 12V on A9
PP
for Electronic Signature.
2.1
Read mode
The M27C256B has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
) is equal to the delay from E to output (t
). Data is
AVQV
ELQV
available at the output after delay of t
from the falling edge of G, assuming that E has
GLQV
been low and the addresses have been stable for at least t
-t
.
AVQV GLQV
2.2
2.3
Standby mode
The M27C256B has a standby mode which reduces the supply current from 30mA to
100µA. The M27C256B is placed in the standby mode by applying a CMOS high signal to
the E input. When in the standby mode, the outputs are in a high impedance state,
independent of the G input.
Two-line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
■
■
the lowest possible memory power dissipation,
complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is desired from a particular memory device.
8/24
M27C256B
Device operation
2.4
System considerations
The power switching characteristics of Advance CMOS EPROMs require careful decoupling
of the devices. The supply current, I , has three segments that are of interest to the system
CC
designer: the standby current level, the active current level, and transient current peaks that
are produced by the falling and rising edges of E. The magnitude of this transient current
peaks is dependent on the capacitive and inductive loading of the device at the output. The
associated transient voltage peaks can be suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommended that a 0.1µF
ceramic capacitor be used on every device between V and V . This should be a high
CC
SS
frequency capacitor of low inherent inductance and should be placed as close to the device
as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between V and
CC
V
for every eight devices. The bulk capacitor should be located near the power supply
SS
connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
2.5
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C256B are in the
"1" state. Data is introduced by selectively programming "0"s into the desired bit locations.
Although only "0"s will be programmed, both "1"s and "0"s can be present in the data word.
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C256B is in the programming mode when V input is at 12.75V, G is at V and E is
PP
IH
pulsed to V . The data to be programmed is applied to 8 bits in parallel to the data output
IL
pins. The levels required for the address and data inputs are TTL. V is specified to be
CC
6.25V ± 0.25 V.
2.6
PRESTO II programming algorithm
PRESTO II Programming Algorithm allows to program the whole array with a guaranteed
margin, in a typical time of 3.5 seconds. Programming with PRESTO II involves the
application of a sequence of 100µs program pulses to each byte until a correct verify occurs
(see Figure 4.). During programming and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that each cell is programmed with enough
margin. No overprogram pulse is applied since the verify in MARGIN MODE provides
necessary margin to each programmed cell.
9/24
Device operation
M27C256B
Figure 4.
Programming flowchart
V
= 6.25V, V = 12.75V
PP
CC
n = 0
E = 100µs Pulse
NO
NO
++n
VERIFY
YES
++ Addr
= 25
YES
Last
Addr
NO
FAIL
YES
CHECK ALL BYTES
1st: V
2nd: V
= 6V
= 4.2V
CC
CC
AI00760B
2.7
Program inhibit
Programming of multiple M27C256Bs in parallel with different data is also easily
accomplished. Except for E, all like inputs including G of the parallel M27C256B may be
common. A TTL low level pulse applied to a M27C256B's E input, with V at 12.75V, will
PP
program that M27C256B. A high level E input inhibits the other M27C256Bs from being
programmed.
2.8
2.9
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were
correctly programmed. The verify is accomplished with G at V , E at V , V at 12.75V and
IL
IH PP
V
at 6.25V.
CC
Electronic signature
The Electronic Signature (ES) mode allows the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C
ambient temperature range that is required when programming the M27C256B. To activate
the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of
the M27C256B, with V = V = 5V. Two identifier bytes may then be sequenced from the
CC
PP
device outputs by toggling address line A0 from V to V . All other address lines must be
IL
IH
held at V during Electronic Signature mode. Byte 0 (A0 = V ) represents the manufacturer
IL
IL
code and byte 1 (A0 = V ) the device identifier code. For the STMicroelectronics
IH
M27C256B, these two identifier bytes are given in Table 3 and can be read-out on outputs
Q7 to Q0.
10/24
M27C256B
Device operation
2.10
Erasure operation (applies for UV EPROM)
The erasure characteristics of the M27C256B is such that erasure begins when the cells are
exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å
range. Research shows that constant exposure to room level fluorescent lighting could
erase a typical M27C256B in about 3 years, while it would take approximately 1 week to
cause erasure when exposed to direct sunlight. If the M27C256B is to be exposed to these
types of lighting conditions for extended periods of time, it is suggested that opaque labels
be put over the M27C256B window to prevent unintentional erasure. The recommended
erasure procedure for the M27C256B is exposure to short wave ultraviolet light which has
wavelength 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure
2
should be a minimum of 15 W-sec/cm . The erasure time with this dosage is approximately
2
15 to 20 minutes using an ultraviolet lamp with 12000 µW/cm power rating. The M27C256B
should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.
(1)
Table 2.
Operating modes
Mode
E
G
A9
VPP
Q7-Q0
Read
VIL
VIL
VIL
VIH
VIH
VIL
VIH
X
X
X
VCC
VCC
VPP
VPP
VPP
VCC
VCC
Data Out
Hi-Z
Output Disable
Program
V
IL Pulse
X
Data In
Data Out
Hi-Z
Verify
VIH
X
Program Inhibit
Standby
VIH
X
VIH
X
Hi-Z
Electronic Signature
VIL
VIL
VID
Codes
1. X = VIH or VIL, VID = 12V ± 0.5V.
Table 3.
Electronic signature
Identifier
A0
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0 Hex Data
Manufacturer’s
Code
VIL
VIH
0
1
0
0
1
0
0
0
0
1
0
1
0
0
0
1
20h
Device Code
8Dh
11/24
Maximum rating
M27C256B
3
Maximum rating
Stressing the device above the rating listed in the Absolute Maximum Ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
TA
Ambient Operating Temperature(1)
Temperature Under Bias
Storage Temperature
–40 to 125
–50 to 125
–65 to 150
–2 to 7
°C
°C
°C
V
TBIAS
TSTG
(2)
VIO
Input or Output Voltage (except A9)
Supply Voltage
VCC
–2 to 7
V
(2)
VA9
A9 Voltage
–2 to 13.5
–2 to 14
V
VPP
Program Supply Voltage
V
1. Depends on range.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than
20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less
than 20ns.
12/24
M27C256B
DC and AC parameters
4
DC and AC parameters
This section summarizes the operating and measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC Characteristic tables that
follow are derived from tests performed under the Measurement Conditions summarized in
the relevant tables. Designers should check that the operating conditions in their circuit
match the measurement conditions when relying on the quoted parameters.
Table 5.
AC measurement conditions
High Speed
Standard
Input Rise and Fall Times
Input Pulse Voltages
≤10ns
≤20ns
0 to 3V
0.4V to 2.4V
Input and Output Timing Ref.
Voltages
1.5V
0.8V and 2V
Figure 5.
AC testing input output waveform
High Speed
3V
1.5V
0V
Standard
2.4V
2.0V
0.8V
0.4V
AI01822
13/24
DC and AC parameters
Figure 6.
M27C256B
AC testing load circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
OUT
C
L
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01823B
(1) (2)
Table 6.
Symbol
Capacitance
Parameter
Input Capacitance
Output Capacitance
Test Condition
Min
Max
Unit
CIN
VIN = 0V
6
pF
pF
COUT
VOUT = 0V
12
1. Sampled only, not 100% tested.
2. (TA = 25 °C, f = 1 MHz)
(1) (2)
Table 7.
Symbol
Read mode DC characteristics
Parameter
Test Condition
Min
Max
±10
Unit
ILI
Input Leakage Current
Output Leakage Current
0V ≤VIN ≤VCC
µA
µA
ILO
0V ≤VOUT ≤VCC
±10
30
E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz
ICC
ICC1
ICC2
Supply Current
mA
mA
µA
Supply Current (Standby) TTL
E = VIH
E > VCC – 0.2V
VPP = VCC
1
Supply Current (Standby)
CMOS
100
IPP
VIL
Program Current
100
0.8
µA
V
Input Low Voltage
–0.3
2
(3)
VIH
Input High Voltage
VCC + 1
0.4
V
VOL
VOH
Output Low Voltage
Output High Voltage TTL
Output High Voltage CMOS
IOL = 2.1mA
IOH = –1mA
V
3.6
V
I
OH = –100µA
VCC – 0.7V
V
1.
TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
3. Maximum DC voltage on Output is VCC +0.5V.
.
14/24
M27C256B
DC and AC parameters
(1) (2)
Table 8.
Symbol
Programming mode DC characteristics
Parameter
Test Condition
IL ≤VIN ≤VIH
Min
Max
Unit
ILI
ICC
IPP
Input Leakage Current
Supply Current
V
±10
50
µA
mA
mA
V
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
E = VIL
50
VIL
–0.3
2
0.8
VIH
VOL
VOH
VID
VCC + 0.5
0.4
V
IOL = 2.1mA
IOH = –1mA
V
3.6
V
11.5
12.5
V
1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
15/24
DC and AC parameters
M27C256B
Figure 7.
Read mode AC waveforms
VALID
tAVQV
VALID
A0-A14
tAXQX
E
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q7
AI00758B
)
(1) (2)
Table 9.
Read mode AC characteristics
M27C256B
-60 -70
Min Max Min Max Min Max Min Max
Test
Parameter
Symbol Alt
-45(3)
-80
Unit
Condition
Address Valid to
Output Valid
E = VIL,
G = VIL
tAVQV tACC
45
45
25
25
25
60
60
30
30
30
70
70
35
30
30
80
80
40
30
30
ns
ns
ns
ns
ns
Chip Enable Low
to Output Valid
tELQV
tGLQV
tCE
tOE
tDF
tDF
G = VIL
E = VIL
G = VIL
E = VIL
Output Enable Low
to Output Valid
Chip Enable High
to Output Hi-Z
(4)
tEHQZ
0
0
0
0
0
0
0
0
Output Enable
High to Output Hi-Z
(4)
tGHQZ
Address Transition
tOH to Output
Transition
E = VIL,
G = VIL
tAXQX
0
0
0
0
ns
1. TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
3. Speed obtained with High Speed AC measurement conditions.
4. Sampled only, not 100% tested.
.
16/24
M27C256B
DC and AC parameters
)
(1) (2)
Table 10. Read mode AC characteristics 2
M27C256B
-10 -12
Min Max Min Max Min Max Min Max
Test
Condition
Symbol Alt
Parameter
-90
-15/-20/-25 Unit
Address Valid to
Output Valid
E = VIL,
G = VIL
tAVQV tACC
90
90
100
100
120
120
150 ns
150 ns
Chip Enable Low
to Output Valid
tELQV
tCE
G = VIL
E = VIL
G = VIL
E = VIL
Output Enable
tOE Low to Output
Valid
tGLQV
40
30
30
50
30
30
60
40
40
65
50
50
ns
ns
ns
Chip Enable High
tDF
(3)
tEHQZ
0
0
0
0
0
0
0
0
to Output Hi-Z
Output Enable
tDF High to Output
Hi-Z
(3)
tGHQZ
Address
tOH Transition to
Output Transition
E = VIL,
G = VIL
tAXQX
0
0
0
0
ns
1. TA = 0 to 70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
3. Sampled only, not 100% tested.
.
17/24
DC and AC parameters
M27C256B
Figure 8.
Programming and Verify modes AC waveforms
VALID
A0-A14
tAVEL
DATA IN
tQVEL
Q0-Q7
DATA OUT
tEHQX
V
PP
tVPHEL
tVCHEL
tGLQV
tGHQZ
V
CC
tGHAX
E
tELEH
tQXGL
G
PROGRAM
VERIFY
AI00759
(1) (2)
Table 11. Programming mode AC characteristics
Test
Condition
Symbol
Alt
Parameter
Min
Max Unit
tAVEL
tQVEL
tVPHEL
tVCHEL
tELEH
tEHQX
tQXGL
tGLQV
tGHQZ
tGHAX
tAS Address Valid to Chip Enable Low
tDS Input Valid to Chip Enable Low
2
2
µs
µs
µs
µs
tVPS VPP High to Chip Enable Low
2
tVCS VCC High to Chip Enable Low
2
tPW Chip Enable Program Pulse Width
tDH Chip Enable High to Input Transition
tOES Input Transition to Output Enable Low
tOE Output Enable Low to Output Valid
tDFP Output Enable High to Output Hi-Z
tAH Output Enable High to Address Transition
95
2
105
µs
µs
µs
ns
ns
ns
2
100
130
0
0
1. TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V.
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
18/24
M27C256B
Package mechanical
5
Package mechanical
Figure 9.
FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window, package outline
A2
A3
A1
A
L
α
B1
B
e
C
eA
eB
D2
D
S
N
1
E1
E
FDIPW-a
1. Drawing is not to scale.
Table 12. FDIP28WB - 28 pin Ceramic Frit-seal DIP, with window (round 0.280"),
package mechanical data
millimeters
Min
inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
A3
B
5.72
1.40
4.57
4.50
0.56
–
0.225
0.055
0.180
0.177
0.022
–
0.51
3.91
3.89
0.41
–
0.020
0.154
0.153
0.016
–
B1
C
1.45
0.057
0.23
36.50
–
0.30
37.34
–
0.009
1.437
–
0.012
1.470
–
D
D2
E
33.02
15.24
1.300
0.600
–
–
–
–
E1
e
13.06
–
13.36
–
0.514
–
0.526
–
2.54
0.100
0.590
eA
eB
L
14.99
–
–
–
–
16.18
3.18
1.52
–
18.03
4.10
2.49
–
0.637
0.125
0.060
–
0.710
0.161
0.098
–
S
7.11
0.280
α
4°
11°
4°
11°
N
28
28
19/24
Package mechanical
M27C256B
Figure 10. PDIP28 - 28 pin Plastic DIP, 600 mils width, package outline
A2
A
L
A1
e1
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
1. Drawing is not to scale.
Table 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, package mechanical data
millimeters
Min
inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
B
4.445
0.630
3.810
0.450
1.270
0.1750
0.0248
0.1500
0.0177
0.0500
3.050
4.570
0.1201
0.1799
B1
C
0.230
36.580
–
0.310
37.080
–
0.0091
1.4402
–
0.0122
1.4598
–
D
36.830
33.020
15.240
13.720
2.540
1.4500
1.3000
0.6000
0.5402
0.1000
0.5906
D2
E
E1
e1
eA
eB
L
12.700
–
14.480
–
0.5000
–
0.5701
–
15.000
14.800
15.200
15.200
16.680
0.5827
0.5984
0.5984
0.6567
3.300
0.1299
S
1.78
0°
2.08
10°
0.070
0°
0.082
10°
α
N
28
28
20/24
M27C256B
Package mechanical
Figure 11. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package
outline
D
A1
A2
D1
1
N
B1
e
E2
E2
E3
E1 E
F
B
0.51 (.020)
1.14 (.045)
D3
A
R
CP
D2
D2
PLCC-A
1. Drawing is not to scale.
Table 14. PLCC32 - 32 pin Rectangular Plastic Leaded Chip Carrier, package
mechanical data
millimeters
Min
inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
B
3.17
1.53
0.38
0.33
0.66
3.56
2.41
–
0.125
0.060
0.015
0.013
0.026
0.140
0.095
–
0.53
0.81
0.10
12.57
11.51
5.66
–
0.021
0.032
0.004
0.495
0.453
0.223
–
B1
CP
D
12.32
11.35
4.78
–
0.485
0.447
0.188
–
D1
D2
D3
E
7.62
0.300
14.86
13.89
6.05
–
15.11
14.05
6.93
–
0.585
0.547
0.238
–
0.595
0.553
0.273
–
E1
E2
E3
e
10.16
1.27
0.400
0.050
–
–
–
–
F
0.00
–
0.13
–
0.000
–
0.005
–
R
0.89
0.035
N
32
32
21/24
Part numbering
M27C256B
6
Part numbering
Table 15. Ordering information scheme
Example:
M27C256B
-70
X
C
1
TR
Device Type
M27
Supply Voltage
C = 5V
Device Function
256B = 256 Kbit (32Kb x 8)
Speed
-45 (1)= 45 ns
-60 = 60 ns
-70 = 70 ns
-80 = 80 ns
-90 = 90 ns
-10 = 100 ns
-12 = 120 ns
-15 = 150 ns
-20 = 200 ns
-25 = 250 ns
VCC Tolerance
blank = ± 10%
X = ± 5%
Package
F = FDIP28W
B = PDIP28
C = PLCC32
Temperature Range
1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C
Options
TR = Tape & Reel Packing
1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc) or for further information on any aspect
of this device, please contact the STMicroelectronics Sales Office nearest to you.
22/24
M27C256B
Revision history
7
Revision history
Table 16. Document revision history
Date
Version
Revision Details
July 1998
1.0
1.1
1.2
1.3
First Issue
20-Sep-2000
29-Nov-2000
02-Apr-2001
AN620 Reference removed
PLCC codification changed (Table 15.)
FDIP28W mechanical dimensions changed (Table 12.)
Package mechanical data clarified for PDIP28 (Table 13.),
PLCC32 (Table 14., Figure 11.) and TSOP28 (Table 15., Figure 13.)
29-Aug-2002
1.4
Document converted to new template (sections added, information
moved).
TSOP28 package removed. Packages are ECOPACK® compliant. X
option removed from Table 15: Ordering information scheme.
18-May-2006
2
23/24
M27C256B
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24/24
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