M27C320-120N6 [STMICROELECTRONICS]
2MX16 OTPROM, 120ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP-48;
| 型号： | M27C320-120N6 |
| 厂家： | 
ST |
| 描述： | 2MX16 OTPROM, 120ns, PDSO48, 12 X 20 MM, PLASTIC, TSOP-48 可编程只读存储器 OTP只读存储器 光电二极管 内存集成电路 |
| 文件： | 总15页 (文件大小：142K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27C320
32 Mbit (4Mb x8 or 2Mb x16) OTP EPROM
■ 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
■ ACCESS TIME: 80ns
■ BYTE-WIDE or WORD-WIDE
CONFIGURABLE
44
■ 32 Mbit MASK ROM REPLACEMENT
■ LOW POWER CONSUMPTION
– Active Current 70mA at 8MHz
– Stand-by Current 100mA
1
SO44 (M)
TSOP48 (N)
12 x 20 mm
■ PROGRAMMING VOLTAGE: 12V ± 0.25V
■ PROGRAMMING TIME: 50µs/word
■ ELECTRONIC SIGNATURE:
– Manufacturer Code 20h
Figure 1. Logic Diagram
– Device Code: 32h
DESCRIPTION
The M27C320 is a 32 Mbit EPROM offered in the
OTP range (one time programmable). It is ideally
suited for microprocessor systems requiring large
data or program storage. It is organised as either
4 MWords of 8 bit or 2 MWords of 16 bit. The pin-
out is compatible with the 32 Mbit Mask ROM.
V
CC
The M27C320 is offered in SO44 and TSOP48
(12 x 20 mm) packages.
21
Q15A–1
A0-A20
E
15
Q0-Q14
BYTE
M27C320
GV
PP
V
SS
AI02152
November 2000
1/15
M27C320
Figure 2A. SO Connections
Figure 2B. TSOP Connections
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
1
48
V
V
SS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
SS
2
Q15A–1
Q7
3
4
A9
Q14
Q6
5
A10
A11
A12
A13
A14
A15
A16
BYTE
6
Q13
Q5
7
8
Q12
Q4
9
A8
10
11
12
13
14
15
16
17
18
19
20
21
22
A19
V
V
V
CC
CC
SS
V
12
13
37
36
M27C320
SS
M27C320
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
V
V
SS
Q15A–1
SS
Q11
GV
PP
Q0
Q3
Q7
Q10
Q2
Q8
Q1
Q9
Q2
Q14
Q6
Q9
Q13
Q5
Q1
Q8
Q10
Q3
Q12
Q4
Q0
GV
PP
Q11
V
CC
V
V
SS
SS
AI02153
24
25
AI02154
Table 1. Signal Names
DEVICE OPERATION
The operating modes of the M27C320 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
A0-A20
Q0-Q7
Q8-Q14
Q15A–1
E
Address Inputs
Data Outputs
Data Outputs
compatible except for V and 12V on A9 for the
PP
Electronic Signature.
Read Mode
The M27C320 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
Data Output / Address Input
Chip Enable
GV
Output Enable / Program Supply
Byte-Wide Select
PP
signal level on the BYTE pin. When BYTE is at V
IH
the Word-wide organisation is selected and the
Q15A–1 pin is used for Q15 Data Output. When
BYTE
V
Supply Voltage
CC
the BYTE pin is at V the Byte-wide organisation
IL
is selected and the Q15A–1 pin is used for the Ad-
dress Input A–1. When the memory is logically re-
garded as 16 bit wide, but read in the Byte-wide
V
Ground
SS
NC
Not Connected Internally
organisation, then with A–1 at V the lower 8 bits
IL
of the 16 bit data are selected and with A–1 at V
the upper 8 bits of the 16 bit data are selected.
IH
2/15
M27C320
(1)
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
°C
°C
°C
V
(3)
T
A
–40 to 125
–50 to 125
–65 to 150
–2 to 7
Ambient Operating Temperature
T
Temperature Under Bias
BIAS
T
STG
Storage Temperature
(2)
Input or Output Voltage (except A9)
V
IO
V
Supply Voltage
–2 to 7
–2 to 13.5
–2 to 14
V
V
V
CC
(2)
A9 Voltage
V
A9
V
Program Supply Voltage
PP
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
+0.5V with possible overshoot to V +2V for a period less than 20ns.
CC
CC
Table 3. Operating Modes
Mode
GV
E
BYTE
A9
X
Q15A–1
Q14-Q8
Data Out
Hi-Z
Q7-Q0
Data Out
Data Out
Data Out
Hi-Z
PP
V
V
IL
V
IH
Read Word-wide
Read Byte-wide Upper
Read Byte-wide Lower
Output Disable
Program
Data Out
IL
V
V
V
V
V
V
V
V
V
IH
X
IL
IL
IL
IL
IL
IL
IL
V
IL
X
Hi-Z
X
X
Hi-Z
Data In
Hi-Z
Hi-Z
IH
PP
PP
V
Pulse
V
V
V
X
Data In
Hi-Z
Data In
Hi-Z
IL
IH
IH
V
V
Program Inhibit
Standby
X
IH
V
X
X
X
Hi-Z
Hi-Z
Hi-Z
IH
V
IL
V
IL
V
IH
V
ID
Electronic Signature
Code
Codes
Codes
Note: X = V or V , V = 12V ± 0.5V.
IH IL ID
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
Q7
0
Q6
0
Q5
Q4
0
Q3
Q2
0
Q1
0
Q0
0
Hex Data
20h
V
IL
1
1
0
0
V
0
0
1
0
1
0
32h
IH
Note: Outputs Q15-Q8 are set to '0'.
3/15
M27C320
Table 5. AC Measurement Conditions
High Speed
≤ 10ns
Standard
≤ 20ns
Input Rise and Fall Times
Input Pulse Voltages
0 to 3V
1.5V
0.4V to 2.4V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
C
L
2.4V
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
(1)
Table 6. Capacitance
Symbol
(T = 25 °C, f = 1 MHz)
A
Parameter
Input Capacitance
Output Capacitance
Test Condition
Min
Max
10
Unit
pF
C
V
= 0V
= 0V
IN
IN
C
OUT
V
OUT
12
pF
Note: 1. Sampled only, not 100% tested.
The M27C320 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte-wide organisation must be selected.
output after a delay of t
of G, assuming that E has been low and the ad-
dresses have been stable for at least t
Standby Mode
from the falling edge
GLQV
-t
.
AVQV GLQV
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
The M27C320 has standby mode which reduces
the supply current from 50mA to 100µA. The
M27C320 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
dress access time (t
) is equal to the delay
). Data is available at the
AVQV
from E to output (t
ELQV
4/15
M27C320
(1)
Table 7. Read Mode DC Characteristics
(T = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; V = 5V ± 10%)
A
CC
Symbol
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
Min
Max
±1
Unit
µA
I
0V ≤ V ≤ V
LI
IN
CC
I
LO
0V ≤ V
≤ V
OUT CC
±10
µA
E = V , G = V , I
= 0mA,
IL
IL OUT
70
50
mA
mA
f = 8MHz
I
Supply Current
CC
E = V , G = V , I
= 0mA,
IL OUT
IL
f = 5MHz
I
I
1
2
E = V
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
1
mA
µA
µA
V
CC
IH
E > V
– 0.2V
CC
100
10
CC
I
V
= V
PP CC
PP
V
Input Low Voltage
–0.3
2
0.8
IL
(2)
V
+ 1
Input High Voltage
V
V
V
V
CC
IH
V
V
I
= 2.1mA
Output Low Voltage
Output High Voltage TTL
0.4
OL
OL
I
= –400µA
OH
2.4
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Maximum DC voltage on Output is V +0.5V.
CC
Two Line Output Control
System Considerations
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E.
The magnitude of the transient current peaks is
dependent on the capacitive and inductive loading
of the device outputs. The associated transient
voltage peaks can be suppressed by complying
with the two line output control and by properly se-
lected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor is used on every
device between V
and V . This should be a
CC
SS
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7µF electrolytic capacitor
should be used between V
and V
for every
CC
SS
eight devices. This capacitor should be mounted
near the power supply connection point. The pur-
pose of this capacitor is to overcome the voltage
drop caused by the inductive effects of PCB trac-
es.
5/15
M27C320
(1)
Table 8. Read Mode AC Characteristics
(T = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; V = 5V ± 10%)
A
CC
M27C320
-100
Unit
(3)
Symbol
Alt
Parameter
Test Condition
-120
-80
Min Max Min
Max
100
100
100
Min Max
Address Valid to Output
Valid
t
t
E = V , G = V
80
80
80
120
120
120
ns
ns
ns
AVQV
ACC
IL
IL
t
t
ST
E = V , G = V
BYTE High to Output Valid
BHQV
IL
IL
Chip Enable Low to Output
Valid
t
t
G = V
ELQV
CE
IL
Output Enable Low to
Output Valid
t
t
E = V
40
40
50
40
40
60
50
ns
ns
ns
GLQV
OE
IL
(2)
t
E = V , G = V
BYTE Low to Output Hi-Z
t
STD
IL
IL
BLQZ
Chip Enable High to Output
Hi-Z
(2)
t
G = V
0
0
5
5
40
40
0
0
5
5
0
0
5
5
50
50
t
DF
IL
EHQZ
Output Enable High to
Output Hi-Z
(2)
t
E = V
40
ns
ns
ns
t
DF
IL
GHQZ
Address Transition to
Output Transition
t
t
E = V , G = V
AXQX
OH
IL
IL
BYTE Low to Output
Transition
t
t
E = V , G = V
BLQX
OH
IL
IL
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V
PP.
CC
PP
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Figure 5. Word-Wide Read Mode AC Waveforms
VALID
VALID
A0-A20
tAVQV
tAXQX
E
tEHQZ
tGHQZ
tGLQV
GV
PP
tELQV
Hi-Z
Q0-Q15
AI02207
Note: BYTE = V
.
IH
6/15
M27C320
Figure 6. Byte-Wide Read Mode AC Waveforms
VALID
VALID
A0-A20
tAVQV
tAXQX
E
tEHQZ
tGHQZ
tGLQV
GV
PP
tELQV
Hi-Z
Q0-Q7
AI02218
Note: BYTE = V
.
IL
Figure 7. BYTE Transition AC Waveforms
A0-A20
VALID
A–1
VALID
tAVQV
tAXQX
BYTE
tBHQV
Q0-Q7
tBLQX
Q8-Q15
tBLQZ
DATA OUT
Hi-Z
DATA OUT
AI02219
Note: E = V ; GV = V .
IL
PP
IL
7/15
M27C320
(1)
Table 9. Programming Mode DC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12V ± 0.25V)
A
CC
PP
Symbol
Parameter
Test Condition
Min
Max
±10
50
Unit
µA
mA
mA
V
I
V
≤ V ≤ V
Input Leakage Current
Supply Current
LI
IL
IN
IH
I
CC
I
PP
E = V
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
50
IL
V
–0.3
2.4
0.8
IL
V
IH
V
+ 0.5
CC
V
V
OL
I
= 2.1mA
OL
0.4
V
V
OH
I
= –2.5mA
3.5
V
OH
V
ID
11.5
12.5
V
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
(1)
Table 10. MARGIN MODE AC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12V ± 0.25V)
A
CC
PP
Symbol
Alt
Parameter
Test Condition
Min
2
Max
Unit
t
t
t
V
High to V High
A9 PP
µs
µs
µs
µs
µs
µs
µs
A9HVPH
AS9
t
V
High to Chip Enable Low
PP
2
VPHEL
VPS
AS10
AS10
AH10
t
t
t
t
V
A10
High to Chip Enable High (Set)
Low to Chip Enable High (Reset)
1
A10HEH
t
V
A10
1
A10LEH
t
Chip Enable Transition to V
Transition
1
EXA10X
A10
t
t
Chip Enable Transition to V Transition
PP
2
EXVPX
VPH
t
t
V
Transition to V Transition
PP A9
2
VPXA9X
AH9
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
Programming
M27C320 is in the programming mode when V
PP
input is at 12.5V, G is at V and E is pulsed to V .
IH
IL
When delivered, all bits of the M27C320 are in the
’1’ state. Data is introduced by selectively pro-
gramming ’0’s into the desired bit locations. Al-
though only ’0’s will be programmed, both ’1’s and
’0’s can be present in the data word. The
The data to be programmed is applied to 16 bits in
parallel to the data output pins. The levels required
for the address and data inputs are TTL. V
is
CC
specified to be 6.25V ± 0.25V.
8/15
M27C320
(1)
Table 11. Programming Mode AC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12V ± 0.25V)
A
CC
PP
Symbol
Alt
Parameter
Test Condition
Min
1
Max
Unit
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
t
t
AS
Address Valid to Chip Enable Low
AVEL
t
t
Input Valid to Chip Enable Low
1
QVEL
DS
t
t
V
V
V
High to Chip Enable Low
High to Chip Enable Low
Rise Time
2
VCHEL
VCS
CC
PP
PP
t
t
1
VPHEL
OES
t
t
PRT
50
45
2
VPLVPH
t
t
PW
Chip Enable Program Pulse Width (Initial)
Chip Enable High to Input Transition
55
ELEH
t
t
DH
EHQX
t
t
Chip Enable High to V Transition
2
EHVPX
OEH
PP
t
t
VR
V
Low to Chip Enable Low
PP
1
VPLEL
t
t
DV
Chip Enable Low to Output Valid
Chip Enable High to Output Hi-Z
Chip Enable High to Address Transition
1
ELQV
(2)
t
0
0
130
ns
ns
t
DFP
EHQZ
t
t
AH
EHAX
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
Figure 8. MARGIN MODE AC Waveforms
V
CC
A8
A9
tA9HVPH
tVPXA9X
GV
E
PP
tVPHEL
tEXVPX
tA10HEH
tEXA10X
A10 Set
A10 Reset
tA10LEH
AI00736B
Note: A8 High level = 5V; A9 High level = 12V.
9/15
M27C320
Figure 9. Programming and Verify Modes AC Waveforms
VALID
A0-A20
Q0-Q15
tAVEL
tQVEL
tEHAX
tEHQZ
DATA IN
DATA OUT
tEHQX
V
CC
tVCHEL
tVPHEL
tEHVPX
tELQV
GV
PP
tVPLEL
E
tELEH
PROGRAM
VERIFY
AI02205
Note: BYTE = V ; GV High level = 12V.
IH
PP
Figure 10. Programming Flowchart
PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 100 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 10). During
programing and verify operation a MARGIN
MODE circuit must be activated to guarantee that
each cell is programed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides the necessary margin to
each programmed cell.
V
= 6.25V, V
= 12V
PP
CC
SET MARGIN MODE
n = 0
E = 50µs Pulse
NO
NO
++n
= 25
VERIFY
++ Addr
Program Inhibit
Programming of multiple M27C320s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C320 may be common. A TTL low level pulse
YES
YES
Last
NO
FAIL
Addr
applied to a M27C320's E input and V at 12V,
PP
YES
will program that M27C320. A high level E input in-
hibits the other M27C320s from being pro-
grammed.
RESET MARGIN MODE
Program Verify
CHECK ALL WORDS
BYTE = V
IH
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
1st: V
= 6V
CC
CC
2nd: V
= 4.2V
AI02220
at V . Data should be verified with t
after the
IL
ELQV
falling edge of E.
10/15
M27C320
Electronic Signature
11.5V to 12.5V on address line A9 of the
M27C320, with V = V
= 5V. Two identifier
PP
CC
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C320. To activate the ES
mode, the programming equipment must force
bytes may then be sequenced from the device out-
puts by toggling address line A0 from V to V . All
IL
IH
other address lines must be held at V during
IL
Electronic Signature mode.
Byte 0 (A0 = V ) represents the manufacturer
IL
code and byte 1 (A0 = V ) the device identifier
IH
code. For the STMicroelectronics M27C320, these
two identifier bytes are given in Table 4 and can be
read-out on outputs Q7 to Q0.
11/15
M27C320
Table 12. Ordering Information Scheme
Example:
M27C320
-80
M
1
Device Type
M27
Supply Voltage
C = 5V ±10%
Device Function
320 = 32 Mbit (4Mb x 8 or 2Mb x 16)
Speed
(1)
-80
= 80 ns
-100 = 100 ns
-120 = 120 ns
Package
M = SO44
N = TSOP48: 12 x 20 mm
Temperature Range
1 = 0 to 70 °C
6 = –40 to 85 °C
3 = –40 to 125 °C
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.
Table 13. Revision History
Date
Revision Details
September 1998 First Issue
09/20/00
AN620 Reference removed
From Preliminary Data to data Sheet
–40 to 85 °C and –40 to 125 °C temperature ranges added (Tables 7, 8 and 12)
80ns speed class in High Speed AC measurement conditions (Tables 8 and 12)
Note changed (Figures 6 and 9)
11/29/00
Programming Flowchart change (Figure 10)
Presto III Programming Algorithm paragraph changed
12/15
M27C320
Table 14. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data
mm
Min
2.42
0.22
2.25
inches
Min
Symb
Typ
Max
2.62
0.23
2.35
0.50
0.25
28.30
13.40
–
Typ
Max
0.103
0.010
0.093
0.020
0.010
1.114
0.528
–
A
A1
A2
B
0.095
0.009
0.089
C
0.10
28.10
13.20
–
0.004
1.106
0.520
–
D
E
e
1.27
0.050
H
15.90
–
16.10
–
0.626
–
0.634
–
L
0.80
3°
0.031
3°
α
–
–
–
–
N
44
44
CP
0.10
0.004
Figure 11. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Outline
A2
A
C
B
CP
e
D
N
1
E
H
A1
α
L
SO-b
Drawing is not to scale.
13/15
M27C320
Table 15. TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20 mm, Package Mechanical Data
mm
Min
inches
Min
Symb
Typ
Max
1.20
0.15
1.05
0.27
0.21
20.20
18.50
12.10
-
Typ
Max
0.047
0.006
0.041
0.011
0.008
0.795
0.728
0.476
-
A
A1
A2
B
0.05
0.95
0.17
0.10
19.80
18.30
11.90
-
0.002
0.037
0.007
0.004
0.780
0.720
0.469
-
C
D
D1
E
e
0.50
0.020
L
0.50
0°
0.70
5°
0.020
0°
0.028
5°
α
N
48
48
CP
0.10
0.004
Figure 12. TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20 mm, Package Outline
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-a
Drawing is not to scale.
A1
α
L
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M27C320
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