M27C400-55XF6 [STMICROELECTRONICS]
256KX16 UVPROM, 55ns, CDIP40, FRIT SEALED, WINDOWED, CERAMIC, DIP-40;型号: | M27C400-55XF6 |
厂家: | ST |
描述: | 256KX16 UVPROM, 55ns, CDIP40, FRIT SEALED, WINDOWED, CERAMIC, DIP-40 可编程只读存储器 电动程控只读存储器 CD 内存集成电路 |
文件: | 总14页 (文件大小:132K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
M27C400
4 Mbit (512Kb x8 or 256Kb x16) UV EPROM and OTP EPROM
■ 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
■ ACCESS TIME: 55ns
■ BYTE-WIDE or WORD-WIDE
CONFIGURABLE
■ 4 Mbit MASK ROM REPLACEMENT
40
40
■ LOW POWER CONSUMPTION
– Active Current 70mA at 8MHz
– Stand-by Current 100µA
1
1
FDIP40W (F)
PDIP40 (B)
■ PROGRAMMING VOLTAGE: 12.5V ± 0.25V
■ PROGRAMMING TIME: 50µs/word
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
Figure 1. Logic Diagram
– Device Code: B8h
DESCRIPTION
The M27C400 is an 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large data or program
storage. It is organised as either 512 Kwords of 8
bit or 256 Kwords of 16 bit. The pin-out is compat-
ible with the most common 4 Mbit Mask ROM.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which aws the user to ex-
pose the chip to ultraviolet ht to erase the bit pat-
tern.
A new pattern can then be written rapidly to the de-
vice by following the programming procedure.
For applicaons where the content is programmed
only otime and erasure is not required, the
M27C400 is offered in PDIP40 package.
V
CC
18
Q15A–1
A0-A17
15
Q0-Q14
E
M27C400
G
BYTEV
PP
V
SS
AI01634
September 2000
1/14
M27C400
Figure 2. DIP Connections
Table 1. Signal Names
A0-A17
Q0-Q7
Q8-Q14
Q15A–1
E
Address Inputs
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
1
40 A8
Data Outputs
2
39 A9
3
38 A10
37 A11
36 A12
35 A13
34 A14
33 A15
32 A16
31 BYTEV
Data Outputs
4
Data Output / Address Input
Chip Enable
5
6
7
8
G
Output Enable
9
BYTEV
Byte Mode / Program Supply
Supply Voltage
10
11
12
PP
PP
M27C400
V
30
V
SS
SS
G
V
CC
SS
29 Q15A–1
Q0 13
Q8 14
Q1 15
Q9 16
Q2 17
Q10 18
Q3 19
Q11 20
28 Q7
V
Ground
27 Q14
26 Q6
25 Q13
24 Q5
logically regarded as 16 bit wide, but read in the
Byte-wide organisation, then with A–1 at V the
lower 8 bits of the 16 bit data are selected and with
IL
23 Q12
22 Q4
A–1 at V the upper 8 bits of the 16 bit data are
IH
selected.
21
V
CC
The M27C400 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. In addition the Word-wide or
Byte- wide organisation must be selected.
AI01635
Chip Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
DEVICE OPERATION
The operating modes of the M27C400 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V and 12V on A9 for the
Electronic Signature.
PP
dress access time (t
) is equal to the delay
). Data is available at the
AVQV
from E to output (t
ELQV
output after a delay of t
from the falling edge
Read Mode
GLQV
of G, assuming that E has been low and the ad-
The M27C400 has two organisations, Word-wide
and Byte-wide. The organisation is selected by the
dresses have been stable for at least t
-t
.
AVQV GLQV
signal level on the BYTEV pin. When BYTEV
Standby Mode
PP
PP
is at V the Word-wide organisation is selected
and the Q15A–1 pin is used for Q15 Data Output.
IH
The M27C400 has a standby mode which reduces
the supply current from 50mA to 100µA. The
M27C400 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
When the BYTEV pin is at V the Byte-wide or-
PP
IL
ganisation is selected and the Q15A–1 pin is used
for the Address Input A–1. When the memory is
2/14
M27C400
(1)
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
°C
°C
°C
V
(3)
T
A
–40 to 125
–50 to 125
–65 to 150
–2 to 7
Ambient Operating Temperature
T
Temperature Under Bias
BIAS
T
STG
Storage Temperature
(2)
Input or Output Voltage (except A9)
V
IO
V
Supply Voltage
–2 to 7
–2 to 13.5
–2 to 14
V
V
V
CC
(2)
A9 Voltage
V
A9
V
Program Supply Voltage
PP
Note: 1. Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
+0.5V with possible overshoot to V +2V for a period less than 20ns.
CC
CC
Table 3. Operating Modes
Mode
BYTEV
E
G
A9
X
Q7-Q0
Data Out
Data Out
Data Out
Hi-Z
Q14-Q8
Data Out
Hi-Z
Q15A–1
PP
V
V
V
IH
Read Word-wide
Data Out
IL
IL
IL
IL
IL
IL
IL
V
V
V
V
V
V
V
IL
V
Read Byte-wide Upper
Read Byte-wide Lower
Output Disable
X
IH
V
IL
V
IL
X
Hi-Z
X
X
Hi-Z
Hi-Z
Data In
Data Out
Hi-Z
IH
IH
V
Pulse
V
V
PP
Program
X
Data In
Data Out
Hi-Z
Data In
Data Out
Hi-Z
IL
V
V
V
V
PP
Verify
X
IH
IH
IH
IL
V
V
V
PP
Program Inhibit
Standby
X
IH
X
X
X
Hi-Z
Hi-Z
Hi-Z
V
IL
V
V
IH
V
Electronic Signature
Codes
Codes
Code
IL
ID
Note: X = V or V , V = 12V ± 0.5V.
IH IL ID
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
Q7
0
Q6
0
Q5
1
Q4
0
Q3
0
Q2
0
Q1
Q0
Hex Data
20h
V
IL
0
1
0
0
V
1
0
1
1
0
0
B8h
IH
Note: Outputs Q15-Q8 are set to '0'.
3/14
M27C400
Table 5. AC Measurement Conditions
High Speed
≤ 10ns
Standard
≤ 20ns
Input Rise and Fall Times
Input Pulse Voltages
0 to 3V
1.5V
0.4V to 2.4V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 3. Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
3V
1N914
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
2.4V
C
L
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
(1)
Table 6. Capacitance
Symbol
(T = 25 °C, f = 1 MHz)
A
Parameter
Test Condition
Min
Max
10
Unit
pF
Input Capacitance (except BYTEV
)
PP
V
= 0V
= 0V
= 0V
IN
IN
C
IN
Input Capacitance (BYTEV
Output Capacitance
)
V
120
12
pF
PP
C
OUT
V
OUT
pF
Note: 1. Sampled only, not 100% tested.
Two Line Output Control
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Because EPROMs are usually used in larger
memory arrays, this product features a 2-line con-
trol function which accommodates the use of mul-
tiple memory connection. The two-line control
function allows:
a. the lowest possible memory power dissipation
b. complete assurance that output bus contention
will not occur.
4/14
M27C400
(1)
Table 7. Read Mode DC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V
)
A
CC
PP
CC
Symbol
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
Min
Max
±1
Unit
µA
I
0V ≤ V ≤ V
LI
IN
CC
I
LO
0V ≤ V
≤ V
OUT CC
±10
µA
E = V , G = V ,
IL
IL
70
50
mA
mA
I
I
= 0mA, f = 8MHz
OUT
I
Supply Current
CC
E = V , G = V ,
IL
IL
= 0mA, f = 5MHz
OUT
I
E = V
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
1
mA
µA
µA
V
CC1
IH
I
E > V – 0.2V
CC
100
10
CC2
I
PP
V
= V
PP CC
V
IL
Input Low Voltage
–0.3
2
0.8
(2)
V
+ 1
Input High Voltage
V
V
V
V
CC
IH
V
I
= 2.1mA
Output Low Voltage
Output High Voltage TTL
0.4
OL
OL
V
I
= –400µA
2.4
OH
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Maximum DC voltage on Output is V +0.5V.
CC
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
capacitor should be mounted near the power sup-
ply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the in-
ductive effects of PCB traces.
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca-
pacitive and inductive loading of the device out-
puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C400 are in the '1'
state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposition to ultravio-
let light (UV EPROM). The M27C400 is in the pro-
gramming mode when V input is at 12.5V, G is
PP
ic capacitor is used on every device between V
CC
at V and E is pulsed to V . The data to be pro-
IH
IL
and V . This should be a high frequency type of
SS
grammed is applied to 16 bits in parallel to the data
output pins. The levels required for the address
and data inputs are TTL. V
6.25V ± 0.25V.
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used be-
is specified to be
CC
tween V
and V for every eight devices. This
CC
SS
5/14
M27C400
(1)
Table 8A. Read Mode AC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V )
A
CC
PP
CC
M27C400
(3)
Symbol
Alt
Parameter
Test Condition
-70
Min Max Min Max
Unit
-55
t
t
t
E = V , G = V
Address Valid to Output Valid
BYTE High to Output Valid
55
55
55
30
70
70
70
35
ns
ns
ns
ns
AVQV
ACC
IL
IL
IL
t
E = V , G = V
BHQV
ST
IL
t
t
G = V
Chip Enable Low to Output Valid
Output Enable Low to Output Valid
ELQV
CE
IL
t
t
E = V
GLQV
OE
IL
(2)
(2)
(2)
t
E = V , G = V
BYTE Low to Output Hi-Z
30
30
30
30
30
30
ns
ns
t
t
STD
IL
IL
BLQZ
t
G = V
Chip Enable High to Output Hi-Z
0
0
DF
IL
EHQZ
t
E = V
Output Enable High to Output Hi-Z
Address Transition to Output Transition
BYTE Low to Output Transition
0
5
5
0
5
5
ns
ns
ns
t
DF
IL
GHQZ
t
t
E = V , G = V
AXQX
OH
OH
IL
IL
IL
t
t
E = V , G = V
BLQX
IL
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V
PP
CC
PP
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed measurement conditions.
(1)
Table 8B. Read Mode AC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V )
A
CC
PP
CC
M27C400
-80 -100
Min Max Min Max
Symbol
Alt
Parameter
Test Condition
Unit
t
t
t
E = V , G = V
Address Valid to Output Valid
BYTE High to Output Valid
80
80
80
40
40
100
100
100
50
ns
ns
ns
ns
ns
AVQV
ACC
IL
IL
IL
t
ST
E = V , G = V
BHQV
IL
t
t
G = V
Chip Enable Low to Output Valid
Output Enable Low to Output Valid
BYTE Low to Output Hi-Z
ELQV
CE
IL
t
t
E = V
GLQV
OE
IL
(2)
(2)
(2)
t
E = V , G = V
50
t
STD
IL
IL
BLQZ
t
DF
G = V
Chip Enable High to Output Hi-Z
Output Enable High to Output Hi-Z
0
0
40
40
0
0
50
50
ns
ns
t
IL
EHQZ
t
DF
E = V
t
IL
GHQZ
t
t
E = V , G = V
Address Transition to Output Transition
BYTE Low to Output Transition
5
5
5
5
ns
ns
AXQX
OH
OH
IL
IL
IL
t
t
E = V , G = V
BLQX
IL
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V
PP
CC
PP
2. Sampled only, not 100% tested.
6/14
M27C400
Figure 5. Word-Wide Read Mode AC Waveforms
VALID
VALID
A0-A17
tAVQV
tAXQX
E
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q15
AI01636
Note: BYTEV = V
.
IH
PP
Figure 6. Byte-Wide Read Mode AC Waveforms
VALID
tAVQV
A–1,A0-A17
E
VALID
tAXQX
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q7
AI01637
Note: BYTEV = V
PP
IL.
7/14
M27C400
Figure 7. BYTE Transition AC Waveforms
A0-A17
VALID
A–1
VALID
tAVQV
tAXQX
BYTEV
PP
tBHQV
Q0-Q7
tBLQX
Q8-Q15
tBLQZ
DATA OUT
DATA OUT
Hi-Z
AI01638B
Note: Chip Enable (E) and Output Enable (G) = V .
IL
(1)
Table 9. Programming Mode DC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12.5V ± 0.25V)
A
CC
PP
Symbol
Parameter
Test Condition
Min
Max
±1
Unit
µA
mA
mA
V
I
0 ≤ V ≤ V
Input Leakage Current
Supply Current
LI
IN
CC
I
50
CC
I
PP
E = V
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
50
IL
V
–0.3
2.4
0.8
IL
V
IH
V
+ 0.5
CC
V
V
OL
I
= 2.1mA
OL
0.4
V
V
OH
I
= –2.5mA
3.5
V
OH
V
ID
11.5
12.5
V
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
8/14
M27C400
(1)
Table 10. Programming Mode AC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12.5V ± 0.25V)
A
CC
PP
Symbol
Alt
Parameter
Test Condition
Min
2
Max
Unit
µs
µs
µs
µs
µs
µs
µs
ns
t
t
AS
Address Valid to Chip Enable Low
AVEL
t
t
Input Valid to Chip Enable Low
2
QVEL
DS
t
t
V
V
High to Address Valid
High to Address Valid
2
VPHAV
VPS
PP
t
t
2
VCHAV
VCS
CC
t
t
PW
Chip Enable Program Pulse Width
Chip Enable High to Input Transition
Input Transition to Output Enable Low
Output Enable Low to Output Valid
Output Enable High to Output Hi-Z
45
2
55
ELEH
t
t
DH
EHQX
t
t
OES
2
QXGL
t
t
120
130
GLQV
OE
(2)
t
0
0
ns
ns
t
DFP
GHQZ
Output Enable High to Address
Transition
t
t
AH
GHAX
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
Figure 8. Programming and Verify Modes AC Waveforms
A0-A17
Q0-Q15
VALID
tAVEL
DATA IN
tQVEL
DATA OUT
tEHQX
BYTEV
PP
tVPHAV
tVCHAV
tGLQV
tGHQZ
tGHAX
V
E
CC
tELEH
tQXGL
G
PROGRAM
VERIFY
AI01639
9/14
M27C400
Figure 9. Programming Flowchart
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
at V and G at V , V
6.25V.
at 12.5V and V
at
IH
IL
PP
CC
V
= 6.25V, V
= 12.5V
PP
CC
Electronic Signature
n = 0
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C400. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
E = 50µs Pulse
NO
NO
++n
= 25
VERIFY
YES
++ Addr
YES
Last
NO
FAIL
Addr
M27C400, with V = V = 5V. Two identifier
PP
CC
bytes may then be sequenced from the device out-
puts by toggling address line A0 from V to V . All
YES
IL
IH
other address lines must be held at V during
Electronic Signature mode.
IL
CHECK ALL WORDS
BYTEV
1st: V
2nd: V
=V
IH
PP
CC
= 6V
Byte 0 (A0 = V ) represents the manufacturer
IL
= 4.2V
CC
code and byte 1 (A0 = V ) the device identifier
IH
code. For the STMicroelectronics M27C400, these
two identifier bytes are given in Table 4 and can be
read-out on outputs Q7 to Q0.
AI01044B
ERASURE OPERATION (applies to UV EPROM)
PRESTO III Programming Algorithm
The erasure characteristics of the M27C400 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo-
rescent lighting could erase a typical M27C400 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C400 is to be exposed to these
types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
the M27C400 window to prevent unintentional era-
sure. The recommended erasure procedure for
M27C400 is exposure to short wave ultraviolet
light which has a wavelength of 2537 Å. The inte-
grated dose (i.e. UV intensity x exposure time) for
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 26 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 9). During
programing and verify operation a MARGIN
MODE circuit is automatically activated to guaran-
tee that each cell is programed with enough mar-
gin. No overpromise pulse is applied since the
verify in MARGIN MODE provides the necessary
margin to each programmed cell.
Program Inhibit
Programming of multiple M27C400s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C400 may be common. A TTL low level pulse
applied to a M27C400's E input and V at 12.5V,
2
PP
erasure should be a minimum of 30 W-sec/cm .
The erasure time with this dosage is approximate-
will program that M27C400. A high level E input in-
hibits the other M27C400s from being pro-
grammed.
ly 30 to 40 minutes using an ultraviolet lamp with
2
12000 µW/cm power rating. The M27C400
should be placed within 2.5cm (1 inch) of the lamp
tubes during the erasure. Some lamps have a filter
on their tubes which should be removed before
erasure.
10/14
M27C400
Table 11. Ordering Information Scheme
Example:
M27C400
-70
X
F
1
TR
Device Type
M27
Supply Voltage
C = 5V
Device Function
400 = 4 Mbit (512Kb x8 or 256Kb x16)
Speed
(1)
-55
= 55 ns
-70 = 70 ns
-80 = 80 ns
-100 = 100 ns
V
Tolerance
CC
blank = ± 10%
X = ± 5%
Package
F = FDIP40W
B = PDIP40
Temperature Range
1 = 0 to 70 °C
6 = –40 to 85 °C
Options
TR = Tape & Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.
Table 12. Revision History
Date
August 1999
09/22/00
Revision Details
First Issue
AN620 Reference removed
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M27C400
Table 13. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Mechanical Data
mm
inches
Symb
Typ
Min
Max
5.72
1.40
4.57
4.50
0.56
–
Typ
Min
Max
0.225
0.055
0.180
0.177
0.022
–
A
A1
A2
A3
B
0.51
3.91
3.89
0.41
–
0.020
0.154
0.153
0.016
–
B1
C
1.45
0.057
0.23
51.79
–
0.30
52.60
–
0.009
2.039
–
0.012
2.071
–
D
D2
E
48.26
15.24
1.900
0.600
–
–
–
–
E1
e
13.06
–
13.36
–
0.514
–
0.526
–
2.54
0.100
0.590
ea.
be
L
14.99
–
–
–
–
16.18
3.18
1.52
–
18.03
–
0.637
0.125
0.060
–
0.710
–
S
2.49
–
0.098
–
8.13
0.320
α
4°
11°
4°
11°
N
40
40
Figure 10. FDIP40W - 40 lead Ceramic Frit-seal DIP with window, Package Outline
A2
A3
A1
A
L
α
B1
B
e
C
eA
eB
D2
D
S
N
1
E1
E
FDIPW-a
Drawing is not to scale.
12/14
M27C400
Table 14. PDIP40 - 40 pin Plastic DIP, 600 mils width, Package Mechanical Data
mm
Min
–
inches
Min
Symb
Typ
4.45
0.64
Max
–
Typ
Max
–
A
A1
A2
B
0.175
0.025
–
0.38
3.56
0.38
1.14
0.20
51.78
–
–
0.015
0.140
0.015
0.045
0.008
2.039
–
–
3.91
0.53
1.78
0.31
52.58
–
0.154
0.021
0.070
0.012
2.070
–
B1
C
D
D2
E
48.26
1.900
14.80
13.46
–
16.26
13.99
–
0.583
0.530
–
0.640
0.551
–
E1
e1
ea.
be
L
2.54
0.100
0.600
15.24
–
–
–
15.24
3.05
1.52
0°
17.78
3.81
2.29
15°
0.600
0.120
0.060
0°
0.700
0.150
0.090
15°
S
α
N
40
40
Figure 11. PDIP40 - 40 lead Plastic DIP, 600 mils width, Package Outline
A2
A
L
A1
e1
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
Drawing is not to scale.
13/14
M27C400
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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