M27C405-80K6TR [STMICROELECTRONICS]
4 Mbit 512Kb x 8 OTP EPROM; 4兆位512KB ×8 OTP EPROM
| 型号： | M27C405-80K6TR |
| 厂家： | 
ST |
| 描述： | 4 Mbit 512Kb x 8 OTP EPROM |
| 文件： | 总15页 (文件大小：101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27C405
4 Mbit (512Kb x 8) OTP EPROM
5V ± 10% SUPPLYVOLTAGEin READ
OPERATION
PIN COMPATIBLE with the 4 Mbit,
SINGLE VOLTAGEFLASH MEMORY
FASTACCESS TIME: 70ns
32
LOW POWER CONSUMPTION:
– Active Current 30mA at 5MHz
– StandbyCurrent 100µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIMES
1
PDIP32 (B)
PLCC32 (K)
– Typical 48sec. (PRESTO II Algorithm)
– Typical 27sec. (On-Board Programming)
ELECTRONIC SIGNATURE
– ManufacturerCode: 20h
– Device Code: B4
TSOP32 (N)
8 x 20mm
DESCRIPTION
Figure 1. Logic Diagram
The M27C405 is a 4 Mbit EPROM offered in the
OTP (one time programmable) range. It is ideally
suited for microprocessor systems requiring large
programs, in the application where the contents is
stable and needsto be programmedonlyone time
and is organised as 524,288 by 8 bits.
The M27C405 is pin compatible with the industry
standard 4 Mbit, single voltage Flash memory. It
canbe consideredas aFlash LowCostsolutionfor
productionquantities.
V
V
PP
CC
19
8
A0-A18
Q0-Q7
The M27C405 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
E
M27C405
Table 1. Signal Names
G
A0-A18
Q0-Q7
E
Address Inputs
Data Outputs
Chip Enable
Output Enable
Program Supply
Supply Voltage
Ground
V
G
SS
AI01601
VPP
VCC
VSS
March 1999
1/15
M27C405
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
A18
A16
A15
A12
A7
1
2
3
4
5
6
7
8
9
32
31
V
V
CC
PP
30 A17
29 A14
28 A13
27 A8
1 32
A7
A14
A13
A8
A6
A5
A4
A6
A5
26 A9
A9
A4
25 A11
M27C405
A3
A2
A1
A0
Q0
9
M27C405
25 A11
A3
24
23 A10
22
G
G
A2 10
A1 11
A0 12
Q0 13
Q1 14
Q2 15
A10
E
E
21 Q7
20 Q6
19 Q5
18 Q4
17 Q3
Q7
17
V
16
SS
AI01603
AI01602
DEVICE OPERATION
Figure 2C. TSOP Pin Connections
Themodesof operationsof theM27C405are listed
in the OperatingModes table. A single power sup-
plyis requiredin the read mode. All inputsare TTL
levels except for Vpp and 12V on A9 for Electronic
Signature.
A11
A9
1
32
G
Read Mode
A10
E
The M27C405 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
OutputEnable(G) is the outputcontrol and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV)is equalto thedelayfrom Etooutput(tELQV).
Datais availableat theoutputafter a delayof tGLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
A8
A13
A14
A17
Q7
Q6
Q5
Q4
Q3
V
PP
V
8
9
M27C405
(Normal)
25
24
CC
A18
A16
A15
A12
A7
V
SS
Q2
Q1
Q0
A0
A1
A2
A3
at least tAVQV-tGLQV
.
Standby Mode
A6
TheM27C405has a standby mode which reduces
the active current from 30mA to 100µA. The
M27C405 is placed in the standby mode by apply-
inga CMOShigh signalto the E input. When in the
standbymode, the outputsarein ahigh impedance
state, independentof the G input.
A5
A4
16
17
AI01604
2/15
M27C405
Table 2. Absolute Maximum Ratings(1)
Symbol
TA
Parameter
Ambient Operating Temperature (3)
Temperature Under Bias
Storage Temperature
Value
–40 to 125
–50 to 125
–65 to 150
–2 to 7
Unit
°C
TBIAS
TSTG
°C
C
°
(2)
VIO
Input or Output Voltages (except A9)
Supply Voltage
V
V
V
V
VCC
–2 to 7
(2)
VA9
A9 Voltage
–2 to 13.5
–2 to 14
VPP
Program Supply Voltage
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”
may cause permanent damage to the device. These are stress ratingsonly and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
3. Depends on range.
Table 3. Operating Modes
Mode
E
VIL
G
A9
X
VPP
VCC or VSS
VCC or VSS
VPP
Q0 - Q7
Data Out
Hi-Z
Read
VIL
VIH
VIH
VIL
VIH
X
Output Disable
Program
VIL
X
V
IL Pulse
VIH
X
Data In
Data Out
Hi-Z
Verify
X
VPP
Program Inhibit
Standby
VIH
X
VPP
VIH
X
VCC or VSS
VCC
Hi-Z
Electronic Signature
VIL
VIL
VID
Codes
Note: X = VIH or VIL, VID = 12V ± 0.5V
Table 4. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
VIL
VIH
Q7
0
Q6
0
Q5
Q4
0
Q3
Q2
0
Q1
0
Q0
0
Hex Data
1
1
0
0
20h
B4h
1
0
1
1
0
0
Two Line Output Control
Forthe mostefficientuse of thesetwo controllines,
E should be decoded and used as the primary
device selecting function,while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus. This ensures that all deselectedmem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
BecauseOTP EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodatesthe use of mul-
tiple memory connection. The two line control
functionallows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
3/15
M27C405
Table 5. AC Measurement Conditions
High Speed
10ns
Standard
20ns
Input Rise and Fall Times
≤
≤
Input Pulse Voltages
0 to 3V
1.5V
0.4V to 2.4V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
C
L
2.4V
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
Table 6. Capacitance(1) (TA = 25 °C, f = 1 MHz )
Symbol
CIN
Parameter
Input Capacitance
Output Capacitance
Test Condition
VIN = 0V
Min
Max
6
Unit
pF
COUT
VOUT = 0V
12
pF
Note: 1. Sampled only, not 100% tested.
4/15
M27C405
Table 7. Read Mode DC Characteristics(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%;VPP = VCC
)
Symbol
ILI
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
Min
Max
Unit
0V ≤ VIN ≤ VCC
±10
µA
ILO
0V
V
OUT
V
CC
10
±
A
µ
≤
≤
E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz
ICC
Supply Current
30
mA
ICC1
ICC2
IPP
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
E = VIH
E > VCC – 0.2V
VPP = VCC
1
100
10
mA
µA
A
µ
VIL
Input Low Voltage
–0.3
2
0.8
V
(2)
VIH
Input High Voltage
VCC + 1
0.4
V
V
V
V
VOL
VOH
Output Low Voltage
IOL = 2.1mA
Output High Voltage TTL
Output High Voltage CMOS
IOH = –400 A
2.4
µ
IOH = –100 A
VCC – 0.7V
µ
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Table 8A. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%;VPP = VCC
)
M27C405
-80
Symbol
Alt
Parameter
Test Condition
Unit
-70 (3)
-90
Min
Max
Min
Max
Min
Max
Address Validto
Output Valid
tAVQV
tELQV
tGLQV
tACC
tCE
tOE
tDF
E = VIL, G = VIL
G = VIL
70
70
35
30
30
80
80
40
30
30
90
90
40
30
30
ns
ns
ns
ns
ns
ns
Chip Enable Low to
Output Valid
Output Enable Low
to Output Valid
E = VIL
Chip Enable High to
Output Hi-Z
(2)
tEHQZ
G = VIL
0
0
0
0
0
0
0
0
0
Output Enable High
to Output Hi-Z
(2)
tGHQZ
tDF
E = VIL
Address Transition to
Output Transition
tAXQX
tOH
E = VIL, G = VIL
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. In case of 70ns speed see High Speed AC Measurement conditions.
5/15
M27C405
Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%;VPP = VCC
)
M27C405
-120
Symbol
Alt
Parameter
Test Condition
Unit
-100
-150
Min
Max
Min
Max
Min
Max
Address Valid to
Output Valid
tAVQV
tELQV
tGLQV
tACC
tCE
tOE
tDF
E = VIL, G = VIL
G = VIL
100
120
120
60
150
ns
ns
ns
ns
ns
ns
Chip Enable Low to
Output Valid
100
50
150
60
Output Enable Low
to Output Valid
E = VIL
Chip Enable High to
Output Hi-Z
(2)
tEHQZ
G = VIL
0
0
0
30
0
0
0
40
0
0
0
50
Output Enable High
to Output Hi-Z
(2)
tGHQZ
tDF
E = VIL
30
40
50
Address Transitionto
Output Transition
tAXQX
tOH
E = VIL, G = VIL
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Figure 5. Read Mode AC Waveforms
VALID
tAVQV
VALID
A0-A18
E
tAXQX
tEHQZ
tGHQZ
tGLQV
G
tELQV
Hi-Z
Q0-Q7
AI00724B
6/15
M27C405
Table 9. ProgrammingMode DC Characteristics (1)
(TA = 25 °C; VCC = 6.25V ± 0.25V;VPP = 12.75V ± 0.25V)
Symbol
ILI
Parameter
Input Leakage Current
Supply Current
Test Condition
Min
Max
10
Unit
0
V
IN
V
CC
A
µ
≤
≤
±
ICC
50
mA
mA
V
IPP
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
E = VIL
50
0.8
VIL
–0.3
2
VIH
VCC + 0.5
0.4
V
VOL
VOH
VID
IOL = 2.1mA
IOH = –400 A
V
2.4
V
µ
11.5
12.5
Max
105
V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
.
Table 10. ProgrammingMode AC Characteristics(1)
(TA = 25 °C; VCC = 6.25V ± 0.25V;VPP = 12.75V ± 0.25V)
Symbol
tAVEL
Alt
tAS
Parameter
Test Condition
Min
2
Unit
Address Valid to Chip Enable Low
Input Valid to Chip Enable Low
VPP High to Chip Enable Low
VCC High to Chip Enable Low
s
s
s
s
µ
µ
µ
µ
tQVEL
tDS
2
tVPHEL
tVCHEL
tVPS
tVCS
tPW
2
2
Chip Enable Program Pulse
Width
tELEH
tEHQX
tQXGL
tGLQV
tGHQZ
tGHAX
95
2
s
s
s
µ
µ
µ
Chip Enable High to Input
Transition
tDH
Input Transition to Output Enable
Low
tOES
2
Output Enable Low to Output
Valid
tOE
100
130
ns
ns
ns
Output Enable High to Output
Hi-Z
tDFP
0
Output Enable High to Address
Transition
tAH
0
.
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP
2. Sampled only, not 100% tested.
7/15
M27C405
Figure 6. Programmingand Verify Modes AC Waveforms
VALID
A0-A18
tAVPL
Q0-Q7
DATA IN
DATA OUT
tQVEL
tVPHEL
tVCHEL
tEHQX
V
PP
tGLQV
tGHQZ
tGHAX
V
CC
E
tELEH
tQXGL
G
PROGRAM
VERIFY
AI00725
System Considerations
4.7µF bulk electrolytic capacitor should be used
betweenVCC and VSS forevery eight devices.The
bulk capacitor should be located near the power
supply connection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effectsof PCBtraces.
The power switching characteristics of Advanced
CMOS OTP EPROMs require careful decoupling of
the devices. The supply current, ICC, has three
segments that are of interest to the system de-
signer: thestandbycurrentlevel, theactivecurrent
level, and transient current peaks that are pro-
duced by the falling and rising edges of E. The
magnitude of the transient current peaks is de-
pendenton the capacitiveand inductiveloading of
the device at the output.
Programming
When delivered, all bits of the M27C405 are in the
’1’state. Datais introducedbyselectivelyprogram-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’sand ’0’s can
be present in the data word. The M27C405 is in
the programming mode when VPP input is at
12.75V,G is atVIH and E is pulsed to VIL. The data
to be programmedis applied to 8 bits in parallelto
the data output pins. The levels required for the
address and data inputs are TTL. VCC is specified
to be 6.25V ± 0.25V.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1µF ceramic
capacitor be used on every device between VCC
andVSS. Thisshouldbe a highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
8/15
M27C405
Figure 7. ProgrammingFlowchart
Figure 8. On-Board Programming Flowchart
V
= 12.75V
PP
V
= 6.25V, V = 12.75V
PP
CC
SET MARGIN MODE
n = 0
n = 0
E = 100µs Pulse
E = 10µs Pulse
NO
NO
NO
++n
= 25
VERIFY
YES
++ Addr
NO
++n
= 25
VERIFY
++ Addr
?
YES
YES
YES
Last
Addr
NO
E = 10µs Pulse
FAIL
FAIL
YES
Last
NO
Addr
CHECK ALL BYTES
1st: V
2nd: V
= 6V
= 4.2V
CC
CC
YES
CHECK ALL BYTES
= V
AI00760B
V
PP
CC
AI01349
PRESTO II Programming Algorithm
Program Verify
PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typicaltime of52.5 seconds.Program-
ming with PRESTO II consists of applying a se-
quenceof 100µs programpulses to each byteuntil
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation,a MARGIN MODE
circuitis automaticallyactivated in orderto guaran-
tee that each cell is programmed with enough
margin. No overprogrampulse is appliedsincethe
verify in MARGIN MODE provides the necessary
margin to each programmed cell.
A verify (read) should be performed on the pro-
grammedbits to determinethat theywere correctly
programmed. Theverify is accomplishedwith G at
VIL , E at VIH, VPP at 12.75Vand VCC at 6.25V.
On-Board Programming
Programming the M27C405 may be performed
directly in the application circuit, however this re-
quires modification to the PRESTO II Algorithm
(see Figure 8). For in-circuit programming VCC is
determinedby theuser and normallyis compatible
withother componentsusing thesame supply volt-
age.It is recommendedthat the maximum value of
VCC which remains compatible with the circuit is
used.
Program Inhibit
Programmingof multipleM27C405sin parallelwith
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M27C405 may be common. A TTL low level pulse
appliedto aM27C405’sEinput,with VPP at12.75V,
will program that M27C405. A high level E input
inhibits the other M27C405s from being pro-
grammed.
Typically VCC=5.5V for programming systems us-
ing VCC=5V is recommended. The value of VCC
does not affect the programming, it gives a higher
test capability in VERIFY mode.
VPP must be kept at 12.75 volts to maintain and
enable the programming.
9/15
M27C405
Warning: compatibility with FLASH Memory
Electronic Signature
The Electronic Signature (ES) mode allows the
readingout of a binarycode from an OTPEPROM
that will identify its manufacturer and type. this
mode is intended for use by programming equip-
ment to automatically match the device to be pro-
grammed with its corresponding programming
algorithm.Thismodeis functionalin the25°C ± 5°C
ambient temperature range that is required when
programming the M27C405. To activate the ES
mode, the programming equipment must force
11.5Vto 12.5Von addresslineA9 of theM27C405
withVPP=VCC=5V.Twoidentifierbytes maythen be
sequenced from the device outputs by toggling
address line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
Compatibility issues may arise when replacingthe
compatibleSingle Supply4 Megabit FLASH Mem-
ory (the M29F040) by the M27C405.
The VPP pin of the M27C405 corresponds to the
”W”pinofthe M29F040.TheM27C405VPP pincan
withstand voltages up to 12.75V,while the ”W” pin
ofthe M29F040is anormalcontrolsignalinputand
may be damaged if a high voltage is applied;
special precautionsmust be taken when program-
ming in-circuit.
However if an already programmed M27C405 is
used,this can be directly put in placeof theFLASH
Memoryas theVPP input,whennotinprogramming
mode, is set to VCC or VSS.
ture mode. Byte 0 (A0=V ) represents the manu-
IL
Changes to PRESTO II. The duration of the pro-
gramming pulse is reduced to 20µs, making the
programming time of the M27C405 comparable
with the counterpart FLASH Memory.
facturer code and byte 1 (A0=V ) the device
IH
identifier code. For the STMicroelectronics
M27C405, these two identifier bytes are given in
Table 4 and can be read-outon outputsQ0 to Q7.
10/15
M27C405
ORDERING INFORMATION SCHEME
Example: M27C405
-80 K 1 TR
Speed
-70 (1) 70 ns
Package
Temperature Range
Option
B
K
N
PDIP32
PLCC32
1
6
0 to 70 C
TR
Tape & Reel
Packing
°
-80 80 ns
-90 90 ns
–40 to 85 C
°
TSOP32
8 x 20mm
-100 100 ns
-120 120 ns
-150 150 ns
Note: 1. High Speed, see AC Characteristics section for further information.
For a list ofavailableoptions(Speed, Package,etc...)or forfurtherinformation onany aspect ofthis device,
please contact the STMicroelectronicsSales Office nearest to you.
11/15
M27C405
PDIP32 - 32 pin Plastic DIP, 600 mils width
mm
Min
–
inches
Symb
Typ
Max
5.08
–
Typ
Min
–
Max
0.200
–
A
A1
A2
B
0.38
3.56
0.38
–
0.015
0.140
0.015
–
4.06
0.51
–
0.160
0.020
–
B1
C
1.52
0.060
0.20
41.78
–
0.30
42.04
–
0.008
1.645
–
0.012
1.655
–
D
D2
E
38.10
15.24
1.500
0.600
–
–
–
–
E1
e1
eA
eB
L
13.59
–
13.84
–
0.535
–
0.545
–
2.54
0.100
0.600
15.24
–
–
–
15.24
3.18
1.78
0°
17.–78
3.43
2.03
10°
0.600
0.125
0.070
0°
0.700
0.135
0.080
10°
S
α
N
32
32
A2
A
A1
e1
L
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
Drawing is not to scale.
12/15
M27C405
PLCC32 - 32 lead Plastic Leaded Chip Carrier, rectangular
mm
Min
2.54
1.52
–
inches
Min
0.100
0.060
–
Symb
Typ
Max
3.56
2.41
0.38
0.53
0.81
12.57
11.56
10.92
15.11
14.10
13.46
–
Typ
Max
0.140
0.095
0.015
0.021
0.032
0.495
0.455
0.430
0.595
0.555
0.530
–
A
A1
A2
B
0.33
0.66
12.32
11.35
9.91
14.86
13.89
12.45
–
0.013
0.026
0.485
0.447
0.390
0.585
0.547
0.490
–
B1
D
D1
D2
E
E1
E2
e
1.27
0.89
0.050
0.035
F
0.00
–
0.25
–
0.000
–
0.010
–
R
N
32
32
Nd
Ne
CP
7
7
9
9
0.10
0.004
D
A1
D1
A2
1 N
B1
e
Ne
E1 E
D2/E2
F
B
0.51 (.020)
1.14 (.045)
Nd
A
R
CP
PLCC
Drawing is not to scale.
13/15
M27C405
TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20mm
mm
Min
inches
Min
Symb
Typ
Max
1.20
0.15
1.05
0.27
0.21
20.20
18.50
8.10
-
Typ
Max
0.047
0.007
0.041
0.011
0.008
0.795
0.728
0.319
-
A
A1
A2
B
0.05
0.95
0.15
0.10
19.80
18.30
7.90
-
0.002
0.037
0.006
0.004
0.780
0.720
0.311
-
C
D
D1
E
e
0.50
0.020
L
0.50
0.70
0.020
0.028
0
°
5
°
0
°
5
°
α
N
32
32
CP
0.10
0.004
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-a
A1
α
L
Drawing is not to scale.
14/15
M27C405
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringementof patents or other rights of thirdparties which may result from its use. No licenseis granted
by implicationor otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics - AllRights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
15/15
相关型号：
©2020 ICPDF网 联系我们和版权申明