M27C512-20B1X [STMICROELECTRONICS]
512 Kbit 64Kb x8 UV EPROM and OTP EPROM; 512 Kbit的64Kb的X8 UV EPROM和OTP EPROM
| 型号： | M27C512-20B1X |
| 厂家： | 
ST |
| 描述： | 512 Kbit 64Kb x8 UV EPROM and OTP EPROM |
| 文件： | 总22页 (文件大小：399K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M27C512
512 Kbit (64K x8) UV EPROM and OTP EPROM
FEATURES SUMMARY
■
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
Figure 1. Packages
■
■
ACCESS TIME: 45ns
LOW POWER “CMOS” CONSUMPTION:
–
–
Active Current 30mA
Standby Current 100µA
28
■
■
■
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIMES of AROUND 6sec.
ELECTRONIC SIGNATURE
1
FDIP28W (F)
–
–
Manufacturer Code: 20h
Device Code: 3Dh
■
PACKAGES
Lead-Free Versions
–
28
1
PDIP28 (B)
PLCC32 (C)
TSOP28 (N)
8 x 13.4 mm
November 2004
1/22
M27C512
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 4. LCC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DEVICE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Operating Modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Electronic Signature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Programming Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
PRESTO IIB Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Verify. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ERASURE OPERATION (APPLIES FOR UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Testing Input Output Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. Read Mode AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Margin Mode AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10.Margin Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 12. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11.Programming and Verify Modes AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/22
M27C512
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12.FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline. . . . . . . . . . . . 16
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data . . . . 16
Figure 13.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . 17
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . 17
Figure 14.PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . 18
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data . . . . . . . . . . 18
Figure 15.TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline . . . . . . . . 19
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data 19
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 17. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 18. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3/22
M27C512
SUMMARY DESCRIPTION
The M27C512 is a 512 Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applica-
tions where fast turn-around and pattern experi-
mentation are important requirements and is
organized as 65536 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
Figure 2. Logic Diagram
V
CC
16
8
A0-A15
E
Q0-Q7
For applications where the content is programmed
only one time and erasure is not required, the
M27C512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
M27C512
GV
PP
In addition to the standard versions, the packages
are also available in Lead-free versions, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
V
SS
AI00761B
Table 1. Signal Names
A0-A15
Q0-Q7
E
Address Inputs
Data Outputs
Chip Enable
GV
Output Enable / Program Supply
Supply Voltage
PP
V
CC
V
SS
Ground
NC
DU
Not Connected Internally
Don’t Use
4/22
M27C512
Figure 3. DIP Connections
Figure 5. TSOP Connections
A15
A12
A7
1
2
3
4
5
6
7
8
9
28
V
CC
27 A14
26 A13
25 A8
24 A9
23 A11
GV
22
21
A10
E
PP
A11
A9
A6
Q7
Q6
Q5
Q4
Q3
A5
A8
A4
A13
A14
A3
22 GV
PP
21 A10
20
M27C512
A2
V
28
1
15
14
CC
M27C512
A1
E
A15
V
SS
A0 10
Q0 11
Q1 12
Q2 13
19 Q7
18 Q6
17 Q5
16 Q4
15 Q3
A12
A7
A6
A5
A4
A3
Q2
Q1
Q0
A0
A1
A2
V
14
SS
AI00762
7
8
AI00764B
Figure 4. LCC Connections
1 32
A6
A8
A5
A4
A3
A9
A11
NC
A2
A1
A0
NC
Q0
9
M27C512
25 GV
PP
A10
E
Q7
Q6
17
AI00763
5/22
M27C512
DEVICE OPERATION
The modes of operations of the M27C512 are list-
ed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPP and 12V on A9 for
Electronic Signature.
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV
.
Read Mode
Standby Mode
The M27C512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
The M27C512 has a standby mode which reduces
the active current from 30mA to 100µA The
M27C512 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the GVPP input.
Table 2. Operating Modes
GV
Mode
E
A9
X
Q7-Q0
Data Out
Hi-Z
PP
V
V
IL
Read
IL
IL
V
V
V
Output Disable
Program
X
IH
V
Pulse
X
Data In
Hi-Z
IL
PP
PP
V
IH
V
Program Inhibit
Standby
X
V
IH
X
X
Hi-Z
V
V
IL
V
ID
Electronic Signature
Codes
IL
Note: X = V or V , V = 12V ± 0.5V.
IH IL ID
Table 3. Electronic Signature
Identifier
Manufacturer’s Code
Device Code
A0
Q7
0
Q6
Q5
1
Q4
0
Q3
Q2
0
Q1
Q0
0
Hex Data
V
0
0
0
1
0
0
20h
3Dh
IL
V
IH
0
1
1
1
1
Two Line Output Control
when data is required from a particular memory
device.
System Considerations
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power
dissipation,
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
b. complete assurance that output bus
contention will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
6/22
M27C512
tion, a 4.7µF bulk electrolytic capacitor should be
used between VCC and VSS for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Nevertheless to achieve compatibility with all pro-
gramming equipments, PRESTO Programming
Algorithm can be used as well.
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 6.5 seconds. This can
be achieved with STMicroelectronics M27C512
due to several design innovations described in the
M27C512 datasheet to improve programming effi-
ciency and to provide adequate margin for reliabil-
ity. Before starting the programming the internal
MARGIN MODE circuit is set in order to guarantee
that each cell is programmed with enough margin.
Then a sequence of 100µs program pulses are ap-
plied to each byte until a correct verify occurs. No
overprogram pulses are applied since the verify in
MARGIN MODE provides the necessary margin.
Figure 6. Programming Flowchart
V
= 6.25V, V = 12.75V
PP
CC
SET MARGIN MODE
n = 0
E = 100µs Pulse
Program Inhibit
NO
Programming of multiple M27C512s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GVPP of the par-
allel M27C512 may be common. A TTL low level
pulse applied to a M27C512's E input, with VPP at
12.75V, will program that M27C512. A high level E
input inhibits the other M27C512s from being pro-
grammed.
NO
++n
= 25
VERIFY
++ Addr
YES
YES
Last
Addr
NO
FAIL
Program Verify
YES
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL. Data should be verified with tELQV after the
falling edge of E.
RESET MARGIN MODE
CHECK ALL BYTES
1st: V
2nd: V
= 6V
= 4.2V
CC
CC
Electronic Signature
AI00738B
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C512. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C512. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dress line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode. Byte 0 (A0 = VIL) represents the man-
ufacturer code and byte 1 (A0 = VIH) the device
identifier code. For the STMicroelectronics
M27C512, these two identifier bytes are given in
Table 3. and can be read-out on outputs Q7 to Q0.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C512 are in the '1'
state. Data is introduced by selectively program-
ming '0's into the desired bit locations. Although
only '0's will be programmed, both '1's and '0's can
be present in the data word. The only way to
change a '0' to a '1' is by die exposure to ultraviolet
light (UV EPROM). The M27C512 is in the pro-
gramming mode when VPP input is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data in-
puts are TTL. VCC is specified to be 6.25V ±
0.25V. The M27C512 can use PRESTO IIB Pro-
gramming Algorithm that drastically reduces the
programming time (typically less than 6 seconds).
7/22
M27C512
ERASURE OPERATION (APPLIES FOR UV EPROM)
The erasure characteristics of the M27C512 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range.
Research shows that constant exposure to room
level fluorescent lighting could erase a typical
M27C512 in about 3 years, while it would take ap-
proximately 1 week to cause erasure when ex-
posed to direct sunlight. If the M27C512 is to be
exposed to these types of lighting conditions for
extended periods of time, it is suggested that
opaque labels be put over the M27C512 window to
prevent unintentional erasure. The recommended
erasure procedure for the M27C512 is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 15 W-sec/cm2. The erasure time with this dos-
age is approximately 15 to 20 minutes using an ul-
traviolet lamp with 12000 µW/cm2 power rating.
The M27C512 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
8/22
M27C512
MAXIMUM RATING
Stressing the device outside the ratings listed in
Table 4. may cause permanent damage to the de-
vice. These are stress ratings only, and operation
of the device at these, or any other conditions out-
side those indicated in the Operating sections of
this specification, is not implied. Exposure to Ab-
solute Maximum Rating conditions for extended
periods may affect device reliability. Refer also to
the STMicroelectronics SURE Program and other
relevant quality documents.
Table 4. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
°C
(3)
T
A
–40 to 125
–50 to 125
–65 to 150
(note 1)
Ambient Operating Temperature
T
Temperature Under Bias
°C
BIAS
T
Storage Temperature
°C
STG
T
Lead Temperature during Soldering
°C
LEAD
(2)
Input or Output Voltage (except A9)
Supply Voltage
–2 to 7
–2 to 7
V
V
V
V
V
IO
V
CC
(2)
A9 Voltage
–2 to 13.5
V
A9
V
Program Supply Voltage
–2 to 14
PP
®
Note: 1. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assermbly), the ST ECOPACK 7191395 specification,
and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
+0.5V with possible overshoot to V +2V for a period less than 20ns.
CC
CC
9/22
M27C512
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, and the DC and AC charac-
teristics of the device. The parameters in the DC
and AC Characteristic tables that follow are de-
rived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parame-
ters.
Table 5. AC Measurement Conditions
High Speed
Standard
≤ 20ns
Input Rise and Fall Times
≤ 10ns
0 to 3V
1.5V
Input Pulse Voltages
0.4V to 2.4V
0.8V and 2V
Input and Output Timing Ref. Voltages
Figure 7. Testing Input Output Waveform
Figure 8. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
C
L
2.4V
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
Table 6. Capacitance
(1,2)
Symbol
Min
Max
6
Unit
pF
Parameter
Input Capacitance
Output Capacitance
Test Condition
C
V
IN
= 0V
= 0V
IN
C
V
OUT
12
pF
OUT
Note: 1. T = 25°C, f = 1MHz
A
2. Sampled only, not 100% tested.
10/22
M27C512
Table 7. Read Mode DC Characteristics
(1)
Symbol
Min
Max
±10
±10
Unit
µA
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
I
LI
0V ≤ V ≤ V
IN
CC
I
LO
0V ≤ V
≤ V
µA
OUT CC
E = V , G = V ,
IL
IL
I
Supply Current
30
mA
CC
I
= 0mA, f = 5MHz
OUT
I
E = V
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
1
mA
µA
µA
V
CC1
IH
I
E > V – 0.2V
CC
100
10
CC2
I
PP
V
= V
PP CC
V
Input Low Voltage
–0.3
2
0.8
IL
(2)
V
+ 1
Input High Voltage
V
V
V
V
V
IH
CC
V
I
= 2.1mA
= –1mA
Output Low Voltage
0.4
OL
OL
I
Output High Voltage TTL
Output High Voltage CMOS
3.6
OH
V
OH
I
= –100µA
V
– 0.7V
CC
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V
.
CC
PP
PP
2. Maximum DC voltage on Output is V +0.5V.
CC
Table 8. Read Mode AC Characteristics
M27C512
(1)
(3)
Symbol Alt
Parameter
-60
-70
-80
Unit
Test Condition
-45
Min Max Min Max Min Max Min Max
Address Valid to
Output Valid
t
t
t
t
E = V , G = V
45
45
25
25
25
60
60
30
25
25
70
70
35
30
30
80
80
40
30
30
ns
ns
ns
ns
ns
ns
AVQV
ACC
IL
IL
Chip Enable Low to
Output Valid
t
G = V
ELQV
CE
IL
Output Enable Low
to Output Valid
t
E = V
IL
GLQV
OE
Chip Enable High
to Output Hi-Z
(2)
t
t
t
G = V
0
0
0
0
0
0
0
0
0
0
0
0
t
DF
DF
IL
EHQZ
Output Enable
High to Output Hi-Z
(2)
E = V
t
IL
GHQZ
Address Transition
to Output Transition
t
E = V , G = V
IL IL
AXQX
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
11/22
M27C512
Table 9. Read Mode AC Characteristics
M27C512
-10
Min Max Min Max Min Max Min Max
(1)
Symbol Alt
Parameter
-12
-15/-20/-25 Unit
Test Condition
-90
Address Valid to
Output Valid
t
t
t
t
E = V , G = V
90
90
40
30
30
100
100
40
120
120
50
150
150
60
ns
ns
ns
ns
ns
ns
AVQV
ACC
IL
IL
Chip Enable Low to
Output Valid
t
G = V
ELQV
CE
IL
Output Enable Low
to Output Valid
t
E = V
IL
GLQV
OE
Chip Enable High
to Output Hi-Z
(2)
t
t
t
G = V
0
0
0
0
0
0
30
0
0
0
40
0
0
0
50
t
DF
DF
IL
EHQZ
Output Enable
High to Output Hi-Z
(2)
E = V
30
40
50
t
IL
GHQZ
Address Transition
to Output Transition
t
E = V , G = V
IL IL
AXQX
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
Figure 9. Read Mode AC Waveforms
VALID
tGLQV
VALID
A0-A15
tAVQV
tAXQX
E
tEHQZ
tGHQZ
G
tELQV
Hi-Z
Q0-Q7
AI00735B
12/22
M27C512
Table 10. Programming Mode DC Characteristics
(1,2)
Symbol
Min
Max
±10
50
Unit
µA
mA
mA
V
Parameter
Input Leakage Current
Supply Current
Test Condition
I
LI
V
IL
≤ V ≤ V
IN
IH
I
CC
I
PP
E = V
Program Current
50
IL
V
IL
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
–0.3
2
0.8
V
IH
V
+ 0.5
V
CC
V
I
= 2.1mA
= –1mA
0.4
V
OL
OL
V
I
OH
3.6
V
OH
V
ID
11.5
12.5
V
Note: 1. T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V
A
CC
PP
2. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
13/22
M27C512
Table 11. Margin Mode AC Characteristics
(1,2)
Symbol
Alt
Parameter
Min
2
Max
Unit
µs
Test Condition
t
t
V
High to V High
A9 PP
A9HVPH
AS9
t
t
V High to Chip Enable Low
PP
2
µs
VPHEL
VPS
t
t
t
t
V
High to Chip Enable High (Set)
Low to Chip Enable High (Reset)
1
µs
A10HEH
AS10
A10
t
V
A10
1
µs
A10LEH
AS10
t
Chip Enable Transition to V
Transition
1
µs
EXA10X
AH10
A10
t
t
Chip Enable Transition to V Transition
PP
2
µs
EXVPX
VPH
t
t
V Transition to V Transition
PP A9
2
µs
VPXA9X
AH9
Note: 1. T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V
A
CC
PP
2. V must be applied simultaneously with or before V and removed simultaneously or after V
PP.
CC
PP
Figure 10. Margin Mode AC Waveforms
V
CC
A8
A9
tA9HVPH
tVPXA9X
GV
E
PP
tVPHEL
tEXVPX
tA10HEH
tEXA10X
A10 Set
A10 Reset
tA10LEH
AI00736B
Note: A8 High level = 5V; A9 High level = 12V.
14/22
M27C512
Table 12. Programming Mode AC Characteristics
(1,2)
Symbol
Alt
Min
2
Max
Unit
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
Parameter
Test Condition
t
t
AS
Address Valid to Chip Enable Low
Input Valid to Chip Enable Low
AVEL
t
t
2
QVEL
DS
t
t
V
V
V
High to Chip Enable Low
High to Chip Enable Low
Rise Time
2
VCHEL
VCS
OES
CC
PP
PP
t
t
2
VPHEL
t
t
50
95
2
VPLVPH
PRT
t
t
Chip Enable Program Pulse Width (Initial)
Chip Enable High to Input Transition
105
ELEH
PW
t
t
DH
EHQX
t
t
Chip Enable High to V Transition
2
EHVPX
OEH
PP
t
t
V
PP
Low to Chip Enable Low
2
VPLEL
VR
t
t
Chip Enable Low to Output Valid
Chip Enable High to Output Hi-Z
Chip Enable High to Address Transition
1
ELQV
DV
(3)
t
0
0
130
t
DFP
EHQZ
t
t
ns
EHAX
AH
Note: 1. T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V
A
CC
PP
2. V must be applied simultaneously with or before V and removed simultaneously or after V .
CC
PP
PP
3. Sampled only, not 100% tested.
Figure 11. Programming and Verify Modes AC Waveforms
A0-A15
Q0-Q7
VALID
tAVEL
tQVEL
tEHAX
DATA IN
DATA OUT
tEHQX
tEHQZ
V
CC
tELQV
tVCHEL
tVPHEL
tEHVPX
GV
PP
tVPLEL
E
tELEH
PROGRAM
VERIFY
AI00737
15/22
M27C512
PACKAGE MECHANICAL
Figure 12. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline
A2
A3
A1
A
L
α
B1
B
e
C
eA
eB
D2
D
S
N
1
E1
E
FDIPW-a
Note: Drawing is not to scale.
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
5.72
1.40
4.57
4.50
0.56
–
Typ
Max
0.225
0.055
0.180
0.177
0.022
–
A
A1
A2
A3
B
0.51
3.91
3.89
0.41
–
0.020
0.154
0.153
0.016
–
B1
C
1.45
0.057
0.23
36.50
–
0.30
37.34
–
0.009
1.437
–
0.012
1.470
–
D
D2
E
33.02
15.24
1.300
0.600
–
–
–
–
E1
e
13.06
–
13.36
–
0.514
–
0.526
–
2.54
0.100
0.590
eA
eB
L
14.99
–
–
–
–
16.18
3.18
1.52
–
18.03
4.10
2.49
–
0.637
0.125
0.060
–
0.710
0.161
0.098
–
S
7.11
0.280
α
4°
11°
4°
11°
N
28
28
16/22
M27C512
Figure 13. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline
A2
A
L
A1
e1
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
Note: Drawing is not to scale.
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
B
4.445
0.630
3.810
0.450
1.270
0.1750
0.0248
0.1500
0.0177
0.0500
3.050
4.570
0.1201
0.1799
B1
C
0.230
36.580
–
0.310
37.080
–
0.0091
1.4402
–
0.0122
1.4598
–
D
36.830
33.020
15.240
13.720
2.540
1.4500
1.3000
0.6000
0.5402
0.1000
0.5906
D2
E
E1
e1
eA
eB
L
12.700
–
14.480
–
0.5000
–
0.5701
–
15.000
14.800
15.200
15.200
16.680
0.5827
0.5984
0.5984
0.6567
3.300
0.1299
S
1.78
0°
2.08
10°
0.070
0°
0.082
10°
α
N
28
28
17/22
M27C512
Figure 14. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline
D
A1
A2
D1
1 N
B1
e
E2
E2
E3
E1 E
F
B
0.51 (.020)
1.14 (.045)
D3
A
R
CP
D2
D2
PLCC-A
Note: Drawing is not to scale.
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
3.56
2.41
–
Typ
Max
A
A1
A2
B
3.18
0.125
0.060
0.015
0.013
0.026
0.140
0.095
–
1.53
0.38
0.33
0.53
0.81
0.10
12.57
11.51
5.66
–
0.021
0.032
0.004
0.495
0.453
0.223
–
B1
CP
D
0.66
12.32
11.35
4.78
–
0.485
0.447
0.188
–
D1
D2
D3
E
7.62
0.300
14.86
13.89
6.05
–
15.11
14.05
6.93
–
0.585
0.547
0.238
–
0.595
0.553
0.273
–
E1
E2
E3
e
10.16
1.27
0.400
0.050
–
–
–
–
F
0.00
–
0.13
–
0.000
–
0.005
–
R
0.89
0.035
N
32
32
18/22
M27C512
Figure 15. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-a
A1
α
L
Note: Drawing is not to scale
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
1.250
0.200
1.150
0.270
0.210
0.100
13.600
11.900
–
Typ
Max
0.0492
0.0079
0.0453
0.0106
0.0083
0.0039
0.5354
0.4685
–
A
A1
A2
B
0.950
0.170
0.100
0.0374
0.0067
0.0039
C
CP
D
13.200
11.700
–
0.5197
0.4606
–
D1
e
0.550
0.0217
E
7.900
0.500
0°
8.100
0.700
5°
0.3110
0.0197
0°
0.3189
0.0276
5°
L
α
N
28
28
19/22
M27C512
PART NUMBERING
Table 17. Ordering Information Scheme
Example:
M27C512
-70
X
C
1
TR
Device Type
M27
Supply Voltage
C = 5V
Device Function
512 = 512 Kbit (64Kb x8)
Speed
(1)
-45
= 45 ns
-60 = 60 ns
-70 = 70 ns
-80 = 80 ns
-90 = 90 ns
-10 = 100 ns
-12 = 120 ns
-15 = 150 ns
-20 = 200 ns
-25 = 250 ns
V
CC
Tolerance
blank = ± 10%
X = ± 5%
Package
F = FDIP28W
B = PDIP28
C = PLCC32
N = TSOP28: 8 x 13.4 mm
Temperature Range
1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C
Options
Blank = Standard Packing
TR = Tape and Reel Packing
E = Lead-free and RoHS Package, Standard Packing
F = Lead-free and RoHS Package, Tape and Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (speed, package,
etc.) or for further information on any aspect of this
device, please contact your nearest ST Sales Of-
fice.
20/22
M27C512
REVISION HISTORY
Table 18. Revision History
Date
Version
1.0
Revision Details
November 1998
25-Sep-2000
02-Apr-2001
First Issue
1.1
AN620 Reference removed
1.2
FDIP28W mechanical dimensions changed (Table 13.)
Package mechanical data clarified for PDIP28 (Table 14.),
PLCC32 (Table 15., Figure 14.) and TSOP28 (Table 16., Figure 15.)
29-Aug-2002
08-Nov-2004
1.3
2.0
Details of ECOPACK lead-free package options added.
Additional Burn-in option removed
21/22
M27C512
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
22/22
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