M27C64A-25C1X [STMICROELECTRONICS]

64 Kbit 8Kb x 8 UV EPROM and OTP EPROM; 64 Kbit的是8K ×8 UV EPROM和OTP EPROM
M27C64A-25C1X
型号: M27C64A-25C1X
厂家: ST    ST
描述:

64 Kbit 8Kb x 8 UV EPROM and OTP EPROM
64 Kbit的是8K ×8 UV EPROM和OTP EPROM

存储 内存集成电路 可编程只读存储器 OTP只读存储器 电动程控只读存储器
文件: 总12页 (文件大小:108K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
M27C64A  
64 Kbit (8Kb x 8) UV EPROM and OTP EPROM  
5V ± 10% SUPPLY VOLTAGE in READ  
OPERATION  
FAST ACCESS TIME: 150ns  
LOW POWER “CMOS” CONSUMPTION:  
– Active Current 30mA  
– Standby Current 100µA  
28  
PROGRAMMING VOLTAGE: 12.5V ± 0.25V  
HIGH SPEED PROGRAMMING  
(less than 1 minute)  
1
PLCC32 (C)  
FDIP28W (F)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 9Bh  
– Device Code: 08h  
DESCRIPTION  
The M27C64A is a 64Kbit EPROM offered in the  
two ranges UV (ultra violet erase) and OTP (one  
time programmable). It is ideally suited for micro-  
processor systems requiring large programs and is  
organized as 8,192 by 8 bits.  
Figure 1. Logic Diagram  
The FDIP28W (window ceramic frit-seal package)  
has transparent lid which allows the user to expose  
the chip to ultraviolet light to erase the bit pattern.  
A new pattern can then be written to the device by  
following the programming procedure.  
V
V
PP  
CC  
For applications where the content is programmed  
only on time and erasure is not required, the  
M27C64A is offered in PLCC32 package.  
13  
8
A0-A12  
Q0-Q7  
P
M27C64A  
Table 1. Signal Names  
E
A0-A12  
Q0-Q7  
E
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program  
G
G
V
SS  
AI00834B  
P
VPP  
VCC  
VSS  
Program Supply  
Supply Voltage  
Ground  
March 1998  
1/12  
M27C64A  
Figure 2A. DIP Pin Connections  
Figure 2B. LCC Pin Connections  
V
1
2
3
4
5
6
7
8
9
28  
27  
V
P
PP  
CC  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
1 32  
26 NC  
25 A8  
24 A9  
23 A11  
A6  
A8  
A9  
A11  
NC  
G
A5  
A4  
A3  
22  
G
M27C64A  
A2  
A1  
A0  
NC  
Q0  
9
M27C64A  
25  
21 A10  
20  
A10  
E
E
A0 10  
Q0 11  
Q1 12  
Q2 13  
19 Q7  
18 Q6  
17 Q5  
16 Q4  
15 Q3  
Q7  
Q6  
17  
V
14  
SS  
AI00835  
AI00836  
Warning:  
Warning:  
NC = Not Connected, DU = Don’t Use  
NC = Not Connected  
Table 2. Absolute Maximum Ratings (1)  
Symbol  
TA  
Parameter  
Value  
–40 to 125  
–50 to 125  
–65 to 150  
–2 to 7  
Unit  
Ambient Operating Temperature (3)  
Temperature Under Bias  
Storage Temperature  
°C  
°C  
°C  
V
TBIAS  
TSTG  
(2)  
VIO  
Input or Output Voltages (except A9)  
Supply Voltage  
VCC  
–2 to 7  
V
(2)  
VA9  
A9 Voltage  
–2 to 13.5  
–2 to 14  
V
VPP  
Program Supply Voltage  
V
Notes:  
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"  
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other  
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum  
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other  
relevant quality documents.  
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC  
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.  
3. Depends on range.  
DEVICE OPERATION  
Read Mode  
The modes of operation of the M27C64A are listed  
in the Operating Modes table. A single power sup-  
ply is required in the read mode. All inputs are TTL  
levels except for VPP and 12V on A9 for Electronic  
Signature.  
The M27C64A has two control functions, both of  
which must be logically active in order to obtain  
data at the outputs. Chip Enable (E) is the power  
control and should be used for device selection.  
Output Enable (G) is the output control and should  
2/12  
M27C64A  
be used to gate data to the output pins, inde-  
pendent of device selection. Assuming that the  
addresses are stable, the address access time  
(tAVQV) is equal to the delay from E to output (tELQV).  
Data is available at the output after a delay of tGLQV  
from the falling edge of G, assuming that E has  
been low and the addresses have been stable for  
control bus. This ensures that all deselected mem-  
ory devices are in their low power standby mode  
and that the output pins are only active when data  
is required from a particular memory device.  
System Considerations  
The power switching characteristics of Advanced  
CMOS EPROMs require careful decoupling of the  
devices. The supply current, ICC, has three seg-  
ments that are of interest to the system designer:  
the standby current level, the active current level,  
and transient current peaks that are produced by  
the falling and rising edges of E. The magnitude of  
the transient current peaks is dependent on the  
capacitive and inductive loading of the device at the  
output.  
at least tAVQV-tGLQV  
.
Standby Mode  
The M27C64A has a standby mode which reduces  
µ
the active current from 30mA to 100 A. The  
M27C64A is placed in the standby mode by apply-  
ing a CMOS high signal to the E input. When in the  
standby mode, the outputs are in a high impedance  
state, independent of the G input.  
The associated transient voltage peaks can be  
suppressed by complying with the two line output  
control and by properly selected decoupling ca-  
Two Line Output Control  
Because EPROMs are usually used in larger mem-  
ory arrays, this product features a 2 line control  
function which accommodates the use of multiple  
memory connection. The two line control function  
allows:  
µ
pacitors. It is recommended that a 0.1 F ceramic  
capacitor be used on every device between VCC  
and VSS. This should be a high frequency capacitor  
of low inherent inductance and should be placed  
as close to the device as possible. In addition, a  
a. the lowest possible memory power dissipation,  
µ
4.7 F bulk electrolytic capacitor should be used  
b. complete assurance that output bus contention  
will not occur.  
between VCC and VSS for every eight devices. The  
bulk capacitor should be located near the power  
supply connection point. The purpose of the bulk  
capacitor is to overcome the voltage drop caused  
by the inductive effects of PCB traces.  
For the most efficient use of these two control lines,  
E should be decoded and used as the primary  
device selecting function, while G should be made  
a common connection to all devices in the array  
and connected to the READ line from the system  
Table 3. Operating Modes  
Mode  
E
G
VIL  
VIH  
VIH  
VIL  
X
P
VIH  
A9  
X
VPP  
VCC  
VCC  
VPP  
VPP  
VPP  
VCC  
VCC  
Q0 - Q7  
Data Out  
Hi-Z  
Read  
VIL  
VIL  
VIL  
VIL  
VIH  
VIH  
VIL  
Output Disable  
Program  
VIH  
X
VIL Pulse  
VIH  
X
Data In  
Data Out  
Hi-Z  
Verify  
X
Program Inhibit  
Standby  
X
X
X
X
X
Hi-Z  
Electronic Signature  
VIL  
VIH  
VID  
Codes  
Note  
±
: X = VIH or VIL, VID = 12V 0.5V  
Table 4. Electronic Signature  
Identifier  
Manufacturer’s Code  
Device Code  
A0  
VIL  
VIH  
Q7  
1
Q6  
0
Q5  
0
Q4  
1
Q3  
1
Q2  
Q1  
1
Q0  
1
Hex Data  
9Bh  
0
0
0
0
0
0
1
0
0
08h  
3/12  
M27C64A  
Programming  
E input inhibits the other M27C64A from being  
programmed.  
When delivered (and after each erasure for UV  
EPROM), all bits of the M27C64A are in the "1"  
state. Data is introduced by selectively program-  
ming "0"s into the desired bit locations. Although  
only "0"s will be programmed, both "1"s and "0"s  
can be present in the data word. The only way to  
change a "0" to a "1" is by die exposition to ultra-  
violet light (UV EPROM). The M27C64A is in the  
programming mode when Vpp input is at 12.5V, E  
is at VIL and P is pulsed to VIL. The data to be  
programmed is applied to 8 bits in parallel to the  
data output pins. The levels required for the ad-  
dress and data inputs are TTL. VCC is specified to  
Program Verify  
A verify (read) should be performed on the pro-  
grammed bits to determine that they were correctly  
programmed. The verify is accomplished with E  
and G at VIL, P at VIH, VPP at 12.5V and VCC at 6V.  
Electronic Signature  
The Electronic Signature (ES) mode allows the  
reading out of a binary code from an EPROM that  
will identify its manufacturer and type. This mode  
is intended for use by programming equipment to  
automatically match the device to be programmed  
with its corresponding programming algorithm. The  
±
be 6V 0.25V.  
°
± °  
ES mode is functional in the 25 C 5 C ambient  
temperature range that is required when program-  
ming the M27C64A. To activate the ES mode, the  
programming equipmentmust force 11.5Vto 12.5V  
on address line A9 of the M27C64A, with  
VPP=VCC=5V. Two identifier bytes may then be  
sequenced from the device outputs by toggling  
address line A0 from VIL to VIH. All other address  
lines must be held at VIL during Electronic Signa-  
ture mode.  
High Speed Programming  
The high speed programming algorithm, described  
in the flowchart, rapidly programs the M27C64A  
using an efficient and reliable method, particularly  
suited to the production programming environ-  
ment. An individual device will take around 1minute  
to program.  
Program Inhibit  
Programming of multiple M27C64A in parallel with  
different data is also easily accomplished. Except  
for E, all like inputs including G of the parallel  
M27C64A may be common. A TTL low level pulse  
applied to a M27C64A P input, with E low and VPP  
at 12.5V, will program that M27C64A. A high level  
Byte 0 (A0=VIL) represents the manufacturer code  
and byte 1 (A0=VIH) the device identifier code. For  
the STMicroelectronics M27C64A, these two iden-  
tifier bytes are given in Table 4 and can be read-out  
on outputs Q0 to Q7.  
4/12  
M27C64A  
AC MEASUREMENT CONDITIONS  
Figure 4. AC Testing Load Circuit  
Input Rise and Fall Times  
20ns  
1.3V  
Input Pulse Voltages  
0.4V to 2.4V  
0.8V to 2.0V  
Input and Output Timing Ref.  
Voltages  
1N914  
Note that Output Hi-Z is defined as the point where data  
is no longer driven.  
3.3k  
Figure 3. AC Testing Input Output Waveforms  
DEVICE  
UNDER  
TEST  
OUT  
C
= 100pF  
2.4V  
L
2.0V  
0.8V  
0.4V  
C
includes JIG capacitance  
L
AI00828  
AI00826  
Table 5. Capacitance (1)  
Symbol  
°
(TA = 25 C, f = 1 MHz )  
Parameter  
Test Condition  
VIN = 0V  
Min  
Max  
6
Unit  
pF  
CIN  
Input Capacitance  
Output Capacitance  
COUT  
VOUT = 0V  
12  
pF  
Note:  
1. Sampled only, not 100% tested.  
Figure 5. Read Mode AC Waveforms  
VALID  
tGLQV  
VALID  
A0-A12  
tAVQV  
tAXQX  
E
tEHQZ  
tGHQZ  
G
tELQV  
Hi-Z  
Q0-Q7  
AI00778B  
5/12  
M27C64A  
Table 6. Read Mode DC Characteristics (1)  
(TA = 0 to 70 C or –40 to 85 C: VCC = 5V 10%; VPP = VCC  
°
°
±
)
Symbol  
ILI  
Parameter  
Input Leakage Current  
Output Leakage Current  
Test Condition  
Min  
Max  
±10  
±10  
Unit  
µA  
0V VIN VCC  
ILO  
0V VOUT VCC  
µA  
E = VIL, G = VIL,  
IOUT = 0mA, f = 5MHz  
ICC  
Supply Current  
30  
mA  
ICC1  
ICC2  
IPP  
Supply Current (Standby) TTL  
Supply Current (Standby) CMOS  
Program Current  
E = VIH  
E > VCC – 0.2V  
VPP = VCC  
1
100  
mA  
µA  
µA  
V
100  
VIL  
Input Low Voltage  
–0.3  
2
0.8  
(2)  
VIH  
Input High Voltage  
VCC + 1  
0.4  
V
VOL  
VOH  
Output Low Voltage  
IOL = 2.1mA  
IOH = –400µA  
IOH = –100µA  
V
Output High Voltage TTL  
Output High Voltage CMOS  
2.4  
V
VCC – 0.7V  
V
Notes:  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.  
2. Maximum DC voltage on Output is VCC +0.5V.  
Table 7. Read Mode AC Characteristics (1)  
(TA = 0 to 70 C or –40 to 85 C: VCC = 5V 10%; VPP = VCC  
°
°
±
)
M27C64A  
-20 -25  
Symbol  
Alt  
Parameter  
Test Condition  
Unit  
-15  
-30  
Min Max Min Max Min Max Min Max  
Address Valid to  
Output Valid  
tAVQV  
tELQV  
tGLQV  
tACC  
tCE  
tOE  
tDF  
tDF  
tOH  
E = VIL, G = VIL  
G = VIL  
150  
150  
75  
200  
200  
80  
250  
250  
100  
60  
300  
300  
120  
105  
105  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Enable Low to  
Output Valid  
Output Enable Low  
to Output Valid  
E = VIL  
Chip Enable High to  
Output Hi-Z  
(2)  
tEHQZ  
G = VIL  
0
0
0
50  
0
0
0
50  
0
0
0
0
0
0
Output Enable High  
to Output Hi-Z  
(2)  
tGHQZ  
E = VIL  
50  
50  
60  
Address Transition to  
Output Transition  
tAXQX  
E = VIL, G = VIL  
Notes:  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.  
2. Sampled only, not 100% tested.  
6/12  
M27C64A  
Table 8. Programming Mode DC Characteristics (1)  
°
±
±
(TA = 25 C; VCC = 6V 0.25V; VPP = 12.5V 0.25V)  
Symbol  
ILI  
Parameter  
Input Leakage Current  
Supply Current  
Test Condition  
Min  
Max  
±10  
Unit  
µA  
mA  
mA  
V
V
IL VIN VIH  
ICC  
30  
IPP  
Program Current  
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage TTL  
A9 Voltage  
E = VIL  
30  
VIL  
–0.3  
2
0.8  
VIH  
VCC + 0.5  
0.4  
V
VOL  
VOH  
VID  
IOL = 2.1mA  
V
IOH = –400µA  
2.4  
V
11.5  
12.5  
.
V
Note:  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP  
Table 9. Programming Mode AC Characteristics (1)  
°
±
±
(TA = 25 C; VCC = 6V 0.25V; VPP = 12.5V 0.25V)  
Symbol  
tAVPL  
Alt  
tAS  
Parameter  
Test Condition  
Min  
2
Max  
Unit  
µs  
Address Valid to Program Low  
Input Valid to Program Low  
VPP High to Program Low  
VCC High to Program Low  
tQVPL  
tDS  
2
µs  
tVPHPL  
tVCHPL  
tVPS  
tVCS  
2
µs  
2
µs  
Chip Enable Low to  
Program Low  
tELPL  
tCES  
2
µs  
ms  
ms  
Program Pulse Width (Initial)  
0.95  
2.85  
1.05  
tPLPH  
tPW  
Program Pulse Width (Over  
Program)  
78.75  
Program High to Input  
Transition  
tPHQX  
tQXGL  
tGLQV  
tDH  
tOES  
tOE  
2
2
µs  
µs  
ns  
ns  
ns  
Input Transition to Output  
Enable Low  
Output Enable Low to  
Output Valid  
100  
130  
Output Enable High to  
Output Hi-Z  
(2)  
tGHQZ  
tDFP  
tAH  
0
0
Output Enable High to  
Address Transition  
tGHAX  
Notes:  
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.  
2. Sampled only, not 100% tested.  
7/12  
M27C64A  
Figure 6. Programming and Verify Modes AC Waveforms  
VALID  
A0-A12  
tAVPL  
Q0-Q7  
DATA IN  
DATA OUT  
tQVPL  
tVPHPL  
tVCHPL  
tELPL  
tPHQX  
V
PP  
tGLQV  
tGHQZ  
tGHAX  
V
CC  
E
P
tPLPH  
tQXGL  
G
PROGRAM  
VERIFY  
AI00779  
ERASURE OPERATION (applies to UV EPROM)  
Figure 7. Programming Flowchart  
The erasure characteristics of the M27C64A is  
such that erasure begins when the cells are ex-  
posed to light with wavelengths shorter than ap-  
proximately 4000 Å. It should be noted that sunlight  
and some type of fluorescent lamps have wave-  
lengths in the 3000-4000 Å range. Research  
shows that constant exposure to room level fluo-  
rescent lighting could erase a typical M27C64A in  
about 3 years, while it would take approximately 1  
week to cause erasure when exposed to direct  
sunlight. If the M27C64A is to be exposed to these  
types of lighting conditions for extended periods of  
time, it is suggested that opaque labels be put over  
the M27C64Awindow to prevent unintentional era-  
sure. The recommended erasure procedure for  
the M27C64A is exposure to short wave ultraviolet  
light which has a wavelength of 2537 Å. The inte-  
grated dose (i.e. UV intensity x exposure time) for  
erasure should be a minimum of 15 W-sec/cm2.  
The erasure time with this dosage is approximately  
15 to 20 minutes using an ultraviolet lamp with  
V
= 6V, V  
= 12.5V  
PP  
CC  
n = 1  
P = 1ms Pulse  
NO  
NO  
++n  
> 25  
VERIFY  
YES  
P = 3ms Pulse by n  
++ Addr  
YES  
FAIL  
Last  
Addr  
NO  
YES  
µ
2 power rating. The M27C64Ashould  
12000 W/cm  
CHECK ALL BYTES  
be placed within 2.5 cm (1 inch) of the lamp tubes  
during the erasure. Some lamps have a filter on  
their tubes which should be removed before erasure.  
1st: V  
2nd: V  
= 6V  
= 4.2V  
CC  
CC  
AI01167  
8/12  
M27C64A  
ORDERING INFORMATION SCHEME  
Example: M27C64A  
-15 C 1 TR  
Speed  
150 ns  
Package  
Temperature Range  
Option  
-15  
-20  
-25  
-30  
F
FDIP28W  
PLCC32  
1
6
0 to 70 °C  
X
Additional  
Burn-in  
200 ns  
250 ns  
300 ns  
C
–40 to 85 °C  
TR  
Tape & Reel  
Packing  
For a list of available options (Speed, Package, etc...) refer to the current Memory Shortform catalogue.  
For further information on any aspect of this device, please contact the STMicroelectronics Sales Office  
nearest to you.  
9/12  
M27C64A  
FDIP28W - 28 pin Ceramic Frit-seal DIP, with window  
mm  
Min  
inches  
Min  
Symb  
Typ  
Max  
5.72  
1.40  
4.57  
4.50  
0.56  
Typ  
Max  
0.225  
0.055  
0.180  
0.177  
0.022  
A
A1  
A2  
A3  
B
0.51  
3.91  
3.89  
0.41  
0.020  
0.154  
0.153  
0.016  
B1  
C
1.45  
0.057  
0.23  
36.50  
0.30  
37.34  
0.009  
1.437  
0.012  
1.470  
D
D2  
E
33.02  
15.24  
1.300  
0.600  
E1  
e
13.06  
13.36  
0.514  
0.526  
2.54  
0.100  
0.590  
eA  
eB  
L
14.99  
16.18  
3.18  
1.52  
18.03  
0.637  
0.125  
0.060  
0.710  
S
2.49  
0.098  
8.89  
0.350  
α
4°  
11°  
4°  
11°  
N
28  
28  
A2  
A3  
A1  
A
L
α
B1  
B
e
C
eA  
eB  
D2  
D
S
N
1
E1  
E
FDIPW-a  
Drawing is no to scale  
10/12  
M27C64A  
PLCC32 - 32 lead Plastic Leaded Chip Carrier - rectangular  
mm  
Min  
2.54  
1.52  
inches  
Min  
Symb  
Typ  
Max  
3.56  
2.41  
0.38  
0.53  
0.81  
12.57  
11.56  
10.92  
15.11  
14.10  
13.46  
Typ  
Max  
0.140  
0.095  
0.015  
0.021  
0.032  
0.495  
0.455  
0.430  
0.595  
0.555  
0.530  
A
A1  
A2  
B
0.100  
0.060  
0.33  
0.66  
12.32  
11.35  
9.91  
14.86  
13.89  
12.45  
0.013  
0.026  
0.485  
0.447  
0.390  
0.585  
0.547  
0.490  
B1  
D
D1  
D2  
E
E1  
E2  
e
1.27  
0.89  
0.050  
0.035  
F
0.00  
0.25  
0.000  
0.010  
R
N
32  
32  
Nd  
Ne  
CP  
7
7
9
9
0.10  
0.004  
D
A1  
D1  
A2  
1 N  
B1  
e
Ne  
E1 E  
D2/E2  
F
B
0.51 (.020)  
1.14 (.045)  
Nd  
A
R
CP  
PLCC  
Drawing is no to scale  
11/12  
M27C64A  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to  
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
© 1998 STMicroelectronics - All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
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Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.  
12/12  

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