M40Z300AVMH1E [STMICROELECTRONICS]
3V NVRAM Supervisor for Up to 8 LPSRAMs; 3V NVRAM监控多达8 LPSRAMs
| 型号： | M40Z300AVMH1E |
| 厂家： | 
ST |
| 描述： | 3V NVRAM Supervisor for Up to 8 LPSRAMs |
| 文件： | 总20页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M40Z300AV
3V NVRAM Supervisor for Up to 8 LPSRAMs
FEATURES SUMMARY
■
■
■
■
CONVERTS LOW POWER SRAM INTO
NVRAMs
PRECISION POWER MONITORING AND
POWER SWITCHING CIRCUITRY
AUTOMATIC WRITE-PROTECTION WHEN
Figure 1. 16-pin SOIC Package
16
1
V
CC
IS OUT-OF-TOLERANCE
SO16 (MQ)
TWO-INPUT DECODER ALLOWS
CONTROL FOR UP TO 8 SRAMs (with 2
devices active in parallel)
Figure 2. 28-pin SOIC Package*
■
SUPPLY VOLTAGE AND POWER-FAIL
DESELECT VOLTAGE:
SNAPHAT (SH)
Crystal/Battery
–
M40Z300AV:
= 3.0V to 3.6V
V
CC
THS = V : 2.8V ≤ V
≤ 3.0V
PFD
SS
■
RESET OUTPUT (RST) FOR POWER ON
RESET
■
■
BATTERY LOW PIN (BL)
LESS THAN 20ns CHIP ENABLE ACCESS
PROPAGATION DELAY
■
■
PACKAGING INCLUDES A 16-LEAD SOIC
OR A 28-LEAD SOIC AND SNAPHAT TOP
(to be ordered separately)
SOIC PACKAGE PROVIDES DIRECT
CONNECTION FOR A SNAPHAT TOP
WHICH CONTAINS THE BATTERY
®
28
1
SOH28 (MH)
March 2004
1/20
M40Z300AV
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. 28-pin SOIC Package*. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. 28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. M40Z300AV 16-pin SOIC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Two to Four Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 7. Address-Decode Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Data Retention Lifetime Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power-on Reset Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Battery Low Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
V
CC
Noise And Negative Going Transients. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 8. Supply Voltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 9. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 5. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10.Power Down Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11.Power Up Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 7. Power Down/Up Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12.SOH28 – 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline. 14
Table 8. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data 14
Figure 13.SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline. . . . . . . . . . . . . . . 15
Table 9. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data . . . . . . . 15
Figure 14.SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline. . . . . . . . . . . . . . 16
Table 10. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data . . . . . . 16
Figure 15.SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Outline . . . . . . . . 17
Table 11. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data 17
2/20
M40Z300AV
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 12. Ordering Information Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. SNAPHAT® Battery Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3/20
M40Z300AV
DESCRIPTION
The M40Z300AV NVRAM SUPERVISOR is a self-
contained device which converts a standard low-
power SRAM into a non-volatile memory. A preci-
sion voltage reference and comparator monitors
of the SOIC package after the completion of the
surface mount process which greatly reduces the
board manufacturing process complexity of either
directly soldering or inserting a battery into a sol-
dered holder. Providing non-volatility becomes a
“SNAP.” The 16-pin SOIC provides battery pins for
an external user-supplied battery.
the V input for an out-of-tolerance condition.
CC
When an invalid V
condition occurs, the condi-
CC
tioned chip enable outputs (E1
to E4
) are
CON
CON
forced inactive to write-protect the stored data in
the SRAM. During a power failure, the SRAM is
Insertion of the SNAPHAT housing after reflow
prevents potential battery damage due to the high
temperatures required for device surface-mount-
ing. The SNAPHAT housing is also keyed to pre-
vent reverse insertion.
The 28-pin SOIC and battery packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28-lead SOIC, the bat-
tery/crystal package (e.g., SNAPHAT) part num-
switched from the V pin to the lithium cell within
CC
®
the SNAPHAT to provide the energy required for
data retention. On a subsequent power-up, the
SRAM remains write protected until a valid power
condition returns.
The 28-pin, 330mil SOIC provides sockets with
gold plated contacts for direct connection to a sep-
arate SNAPHAT housing containing the battery.
The SNAPHAT housing has gold plated pins
which mate with the sockets, ensuring reliable
connection. The housing is keyed to prevent im-
proper insertion. This unique design allows the
SNAPHAT battery package to be mounted on top
ber
is
“M4ZXX-BR00SH”
(see
Table
13., page 18).
Caution: Do not place the SNAPHAT battery top
in conductive foam, as this will drain the lithium
button-cell battery.
Figure 3. Logic Diagram
Table 1. Signal Names
(1)
(1)
Threshold Select Input
Chip Enable Input
THS
E
V
B+
CC
Conditioned Chip Enable
Output
(2)
E1
- E4
CON
V
CON
THS
OUT
E
B
A
BL
E1
E2
E3
E4
A, B
RST
Decoder Inputs
Reset Output (Open Drain)
CON
CON
CON
CON
M40Z300AV
Battery Low Output (Open
Drain)
BL
V
Supply Voltage Output
Supply Voltage
OUT
V
CC
RST
V
Ground
SS
B +
Positive Battery Pin
Negative Battery Pin
Not Connected Internally
(1)
V
SS
B–
(2)
B –
AI08893
NC
Note: 1. For 16-pin SOIC package only.
2. THS pin must be connected to V
Note: 1. THS pin must be connected to V
.
SS
.
SS
2. For M40Z300AV, B– must be connected to the negative
battery terminal only (not to Pin 8, V ).
SS
4/20
M40Z300AV
Figure 4. 28-pin SOIC Connections
Figure 5. M40Z300AV 16-pin SOIC
Connections
V
1
28
27
V
E
OUT
NC
CC
2
NC
RST
NC
A
3
26
NC
NC
NC
E1
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
OUT
NC
4
25
(1)
B–
E
5
24
RST
A
6
23
CON
E1
E2
E3
E4
B+
CON
CON
CON
CON
NC
B
7
22
E2
CON
B
8
21
NC
E3
BL
THS
NC
BL
9
20
CON
10
11
12
13
14
19
NC
NC
NC
E4
V
SS
NC
NC
THS
18
17
AI08895
16
CON
V
15
NC
SS
AI08894
Note: 1. For M40Z300AV, B– must be connected to the negative
battery terminal only (not to Pin 8, V ).
SS
Figure 6. Hardware Hookup
3.3V
VCC
VOUT
VCC
VCC
VCC
VCC
E2(1)
0.1µF
E2(1)
E2(1)
E2(1)
M40Z300AV
CMOS
SRAM
CMOS
SRAM
CMOS
SRAM
CMOS
SRAM
0.1µF
0.1µF
0.1µF
0.1µF
E
E
E
E
E1CON
E2CON
E3CON
E4CON
A
B
E
Threshold
THS(2)
RST
BL
To Microprocessor
VSS
To Battery Monitor Circuit
AI08896
Note: 1. If the second chip enable pin (E2) is unused, it should be tied to V
.
OUT
2. THS pin must be connected to V
.
SS
5/20
M40Z300AV
OPERATION
The M40Z300AV, as shown in Figure 6., page 5,
can control up to four (eight, if placed in parallel)
standard low-power SRAMs. These SRAMs must
be configured to have the chip enable input dis-
able all other input signals. Most slow, low-power
SRAMs are configured like this, however many
fast SRAMs are not. During normal operating con-
a WRITE cycle may corrupt data at the currently
addressed location, but does not jeopardize the
rest of the SRAM's contents. At voltages below
V
(min), the user can be assured the memory
PFD
will be write protected within the Write Protect
Time (t ) provided the V fall time exceeds t
F
WPT
CC
(see Figure 7., page 6).
ditions, the conditioned chip enable (E1
to
CON
As V continues to degrade, the internal switch
CC
E4
) output pins follow the chip enable (E) input
CON
disconnects V and connects the internal battery
CC
pin with timing shown in Figure 7., page 6 and Ta-
ble 7., page 13. An internal switch connects V
to V
. This occurs at the switchover voltage
OUT
CC
(V ). Below the V , the battery provides a volt-
SO
SO
to V
than 0.3V (I
. This switch has a voltage drop of less
OUT
age V
to the SRAM and can supply current
OHB
).
OUT1
I
(see Table 6., page 11).
OUT2
CC
When V
rises above V , V
is switched
CC
SO
OUT
back to the supply voltage. Outputs E1
to
CON
E4
are held inactive for t
(120ms maxi-
CON
CER
mum) after the power supply has reached V
independent of the E input, to allow for processor
stabilization (see Figure 11., page 12).
,
PFD
Two to Four Decode
The M40Z300AV includes a 2 input (A, B) decoder
which allows the control of up to 4 independent
SRAMs. The Truth Table for these inputs is shown
in Table 2.
write protecting the SRAM. A power failure during
Table 2. Truth Table
Inputs
Outputs
E1
E2
E3
E4
CON
E
H
L
L
L
L
B
X
L
A
X
L
CON
CON
CON
H
L
H
H
H
H
H
H
L
H
H
L
H
L
H
H
H
L
H
H
H
H
L
H
H
H
Figure 7. Address-Decode Time
A, B
tAS
E
tEDL
tEDH
E1
CON
- E4
CON
AI02551
Note: During system design, compliance with the SRAM timing parameters must comprehend the propagation delay between E1
-
CON
E4
.
CON
6/20
M40Z300AV
Data Retention Lifetime Calculation
Most low power SRAMs on the market today can
be used with the M40Z300AV NVRAM SUPERVI-
SOR. There are, however some criteria which
should be used in making the final choice of which
SRAM to use. The SRAM must be designed in a
way where the chip enable input disables all other
inputs to the SRAM. This allows inputs to the
M40Z300AV and SRAMs to be “Don't care” once
be chosen to control the rise time. This signal will
be valid for all voltage conditions, even when V
CC
equals V
.
SS
Once V
exceeds the power failure detect volt-
, an internal timer keeps RST low for
CC
age V
PFD
t
to allow the power supply to stabilize.
REC
Battery Low Pin
The M40Z300AV automatically performs battery
voltage monitoring upon power-up, and at factory-
programmed time intervals of at least 24 hours.
The Battery Low (BL) pin will be asserted if the
battery voltage is found to be less than approxi-
mately 2.5V. The BL pin will remain asserted until
completion of battery replacement and subse-
quent battery low monitoring tests, either during
the next power-up sequence or the next scheduled
24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below
2.5V and may not be able to maintain data integrity
in the SRAM. Data should be considered suspect,
and verified as correct. A fresh battery should be
installed.
V
falls below V
(min). The SRAM should also
CC
PFD
guarantee data retention down to V = 2.0V. The
CC
chip enable access time must be sufficient to meet
the system needs with the chip enable propaga-
tion delays included. If the SRAM includes a sec-
ond chip enable pin (E2), this pin should be tied to
V
.
OUT
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0V. Manufacturers gen-
erally specify a typical condition for room temper-
ature along with a worst case condition (generally
at elevated temperatures). The system level re-
quirements will determine the choice of which val-
ue to use.
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
The data retention current value of the SRAMs can
then be added to the I
value of the M40Z300AV
BAT
promised due to the fact that a nominal V
is
CC
to determine the total current requirements for
data retention. The available battery capacity for
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
®
the SNAPHAT of your choice can then be divided
®
battery should be replaced. The SNAPHAT top
by this current to determine the amount of data re-
tention available (see Table 13., page 18).
CAUTION: Take care to avoid inadvertent dis-
should be replaced with valid V
applied to the
CC
device.
The M40Z300AV only monitors the battery when a
nominal V is applied to the device. Thus appli-
charge through V
and E1
- E4
after
OUT
CON
CON
CC
battery has been attached.
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique. The BL pin is an open drain output and
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
Power-on Reset Output
All microprocessors have a reset input which forc-
es them to a known state when starting. The
M40Z300AV has a reset output (RST) pin which is
guaranteed to be low within t
of V
(see Ta-
an appropriate pull-up resistor to V
chosen to control the rise time.
should be
WPT
PFD
CC
ble 7., page 13). This signal is an open drain con-
figuration. An appropriate pull-up resistor should
7/20
M40Z300AV
V
Noise And Negative Going Transients
Figure 8. Supply Voltage Protection
CC
I
transients, including those produced by output
CC
switching, can produce voltage fluctuations, re-
sulting in spikes on the V bus. These transients
CC
can be reduced if capacitors are used to store en-
ergy which stabilizes the V
bus. The energy
CC
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1µF (as shown in Figure
8) is recommended in order to provide the needed
filtering.
V
CC
V
CC
0.1µF
DEVICE
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on V
that drive it to values
CC
V
SS
below V by as much as one volt. These negative
SS
spikes can cause data corruption in the SRAM
while in battery backup mode. To protect from
these voltage spikes, STMicroelectronics recom-
AI00622
mends connecting a schottky diode from V
to
CC
V
(cathode connected to V , anode to V ).
SS
CC SS
Schottky diode 1N5817 is recommended for
through hole and MBRS120T3 is recommended
for surface mount.
8/20
M40Z300AV
MAXIMUM RATING
Stressing the device above the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the device at
these or any other conditions above those indicat-
ed in the Operating sections of this specification is
not implied. Exposure to Absolute Maximum Rat-
ing conditions for extended periods may affect de-
vice
reliability.
Refer
also
to
the
STMicroelectronics SURE Program and other rel-
evant quality documents.
Table 3. Absolute Maximum Ratings
Symbol
Parameter
Value
0 to 70
Unit
°C
Grade 1
Grade 6
T
A
Ambient Operating Temperature
–40 to 85
–40 to 85
–55 to 125
°C
®
°C
SNAPHAT
SOIC
T
Storage Temperature
STG
°C
(1,2,3)
Lead Solder Temperature for 10 seconds
260
°C
T
SLD
–0.3 to V
+ 0.3
V
Input or Output Voltage
Supply Voltage
V
V
IO
CC
V
–0.3 to 4.6
CC
I
Output Current
20
1
mA
W
O
P
Power Dissipation
D
Note: 1. Reflow at peak temperature of 215°C to 225°C for < 60 seconds (total thermal budget not to exceed 180°C for between 90 to 120
seconds).
2. For SO package, standard lead finish: Reflow at peak temperature of 225°C (total thermal budget not to exceed 180°C for between
90 to 150 seconds).
3. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C
for greater than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
9/20
M40Z300AV
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 4. DC and AC Measurement Conditions
Parameter
M40Z300AV
V
Supply Voltage
3.0 to 3.6V
CC
Grade 1
Grade 6
0 to 70°C
–40 to 85°C
50pF
Ambient Operating Temperature
Load Capacitance (C )
L
Input Rise and Fall Times
Input Pulse Voltages
≤ 5ns
0 to 3V
1.5V
Input and Output Timing Ref. Voltages
Note: Output High Z is defined as the point where data is no longer driven.
Figure 9. AC Testing Load Circuit
333Ω
DEVICE
UNDER
TEST
1.73V
C
= 50pF
L
C
includes JIG capacitance
L
AI08897
Table 5. Capacitance
Symbol
(1,2)
Min
Max
8
Unit
pF
Parameter
C
Input Capacitance
Input/Output Capacitance
IN
(3)
10
pF
C
OUT
Note: 1. Sampled only, not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs deselected.
10/20
M40Z300AV
Table 6. DC Characteristics
(1)
Sym
Parameter
Min
Typ
Max
Unit
Test Condition
(2)
0V ≤ V ≤ V
Input Leakage Current
Supply Current
±1
4
µA
mA
V
I
IN
CC
LI
I
Outputs open
2
CC
V
IL
Input Low Voltage
Input High Voltage
Output Low Voltage
–0.3
2.0
0.8
V
V
+ 0.3
V
IH
CC
I
= 4.0mA
= 10mA
0.4
0.4
V
OL
V
V
OL
(3)
I
V
OL
Output Low Voltage (open drain)
I
= –2.0mA
= –1.0µA
OUT2
Output High Voltage
2.4
2.0
V
OH
OH
(4)
V
I
V
V
2.9
3.6
150
100
V
V
V
V
Battery Back-up
OHB
OH
> V –0.3
mA
mA
µA
nA
OUT
OUT
CC
I
I
Current (Active)
OUT1
OUT2
OUT
OUT
> V –0.2
CC
Current (Battery Back-up)
V
> V
–0.3
BAT
100
OUT
(5)
I
100
CCDR
Data Retention Mode Current
(6)
V
2.8
2.7
2.0
2.9
2.8
2.9
3.0
2.9
3.6
V
V
V
Power-fail Deselect Voltage (THS = V
Battery Back-up Switchover Voltage
Battery Voltage
)
PFD
SS
V
SO
V
BAT
Note: 1. Valid for Ambient Operating Temperature: T = 0 to 70°C or –40 to 85°C; V = 3.0 to 3.6V (except where noted).
A
CC
2. Outputs deselected.
3. For RST & BL pins (Open Drain).
4. Chip Enable outputs (E1
- E4
) can only sustain CMOS leakage currents in the battery back-up mode.
CON
CON
Higher leakage currents will reduce battery life.
5. Measured with V and E1 - E4 open.
OUT
CON
CON
6. THS pin must ben tied to V
.
SS
11/20
M40Z300AV
Figure 10. Power Down Timing
V
CC
V
V
V
V
(max)
(min)
PFD
PFD
PFD
SO
tF
tFB
E
tWPT
V
OHB
E1
E4
CON
CON
-
RST
AI02398B
Figure 11. Power Up Timing
V
CC
V
V
V
(max)
(min)
PFD
PFD
PFD
V
SO
tR
tRB
tCER
E
tEDH
tEDL
V
OHB
E1
E4
CON
CON
-
tREC
RST
AI02399B
12/20
M40Z300AV
Table 7. Power Down/Up Mode AC Characteristics
(1)
Symbol
Min
300
150
10
Max
Unit
Parameter
(2)
V
V
V
(max) to V
(min) to V
(min) V Fall Time
µs
t
F
PFD
PFD
CC
(3)
V
Fall Time
µs
µs
ns
ns
ns
ms
ms
µs
µs
t
PFD
PFD
SS CC
FB
t
R
(min) to V
(max) V Rise Time
PFD CC
t
Chip Enable Propagation Delay Low
Chip Enable Propagation Delay High
A, B set up to E
20
20
EDL
t
EDH
t
0
AS
t
Chip Enable Recovery
40
40
40
1
120
120
250
CER
(4)
V
PFD
(max) to RST High
t
REC
t
Write Protect Time
V to V (min) V Rise Time
SS
WPT
t
RB
PFD
CC
Note: 1. Valid for Ambient Operating Temperature: T = 0 to 70°C or –40 to 85°C; V = 3.0 to 3.6V (except where noted).
A
CC
2. V
(max) to V
(min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after V
PFD CC
PFD
passes V
(min).
PFD
3. V
4. t
(min) to V fall time of less than t may cause corruption of RAM data.
(min) = 20ms for industrial temperature Grade 6 device.
PFD
REC
SS FB
13/20
M40Z300AV
PACKAGE MECHANICAL INFORMATION
Figure 12. SOH28 – 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline
A2
A
C
eB
B
e
CP
D
N
E
H
A1
α
L
1
SOH-A
Note: Drawing is not to scale.
Table 8. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
3.05
0.36
2.69
0.51
0.32
18.49
8.89
–
Typ
Max
0.120
0.014
0.106
0.020
0.012
0.728
0.350
–
A
A1
A2
B
0.05
2.34
0.36
0.15
17.71
8.23
–
0.002
0.092
0.014
0.006
0.697
0.324
–
C
D
E
e
1.27
0.050
eB
H
3.20
11.51
0.41
0°
3.61
12.70
1.27
8°
0.126
0.453
0.016
0°
0.142
0.500
0.050
8°
L
α
N
28
28
CP
0.10
0.004
14/20
M40Z300AV
Figure 13. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline
A2
A1
A
A3
eA
D
B
L
eB
E
SHZP-A
Note: Drawing is not to scale.
Table 9. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
9.78
7.24
6.99
0.38
0.56
21.84
14.99
15.95
3.61
2.29
Typ
Max
A
A1
A2
A3
B
0.385
0.285
0.275
0.015
0.022
0.860
0.590
0.628
0.142
0.090
6.73
6.48
0.265
0.255
0.46
21.21
14.22
15.55
3.20
0.018
0.835
0.560
0.612
0.126
0.080
D
E
eA
eB
L
2.03
15/20
M40Z300AV
Figure 14. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline
A2
A1
A
A3
L
eA
D
B
eB
E
SHZP-A
Note: Drawing is not to scale.
Table 10. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
10.54
8.51
Typ
Max
A
A1
A2
A3
B
0.415
.0335
0.315
0.015
0.022
0.860
0.710
0.628
0.142
0.090
8.00
7.24
0.315
0.285
8.00
0.38
0.46
21.21
17.27
15.55
3.20
0.56
0.018
0.835
0.680
0.612
0.126
0.080
D
21.84
18.03
15.95
3.61
E
eA
eB
L
2.03
2.29
16/20
M40Z300AV
Figure 15. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Outline
A2
A
C
B
CP
e
D
N
1
E
H
A1
α
L
SO-b
Note: Drawing is not to scale.
Table 11. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
mm
inches
Min.
Symbol
Typ.
Min.
Max.
1.75
0.25
1.60
0.46
0.25
10.00
4.00
–
Typ.
Max.
0.069
0.010
0.063
0.018
0.010
0.394
0.158
–
A
A1
A2
B
0.10
0.004
0.35
0.19
9.80
3.80
–
0.014
0.007
0.386
0.150
–
C
D
E
e
1.27
0.050
H
5.80
0.40
0°
6.20
1.27
8°
0.228
0.016
0°
0.244
0.050
8°
L
α
N
16
16
CP
0.10
0.004
17/20
M40Z300AV
PART NUMBERING
Table 12. Ordering Information Example
Example:
M40Z
300AV
MQ
6
F
Device Type
M40Z
Supply and Write Protect Voltage
300AV = V = 3.0 to 3.6V
CC
THS = V ; 2.8V ≤ V
≤ 3.0V
SS
PFD
Package
MQ = SO16
(1,2)
MH
= SOH28
Temperature Range
1 = 0 to 70°C
6 = –40 to 85°C
Shipping Method for SOIC
®
E = Lead-free Package (ECO PACK ), Tubes
®
F = Lead-free Package (ECO PACK ), Tape & Reel
®
Note: 1. The SOIC package (SOH28) requires the battery package (SNAPHAT ) which is ordered separately under the part number
“M4Zxx-BR00SH” in plastic tube or “M4Zxx-BR00SHTR” in Tape & Reel form.
Caution: Do not place the SNAPHAT battery package “M4Zxx-BR00SH” in conductive foam as it will drain the lithium button-cell
battery.
2. Contact Local Sales Office for availability of SNAPHAT (MH) package.
For a list of available options (e.g., Speed, Package) or for further information on any aspect of this device,
please contact the ST Sales Office nearest to you.
®
Table 13. SNAPHAT Battery Table
Part Number
M4Z28-BR00SH
M4Z32-BR00SH
Description
Package
SH
Lithium Battery (48mAh) SNAPHAT
Lithium Battery (120mAh) SNAPHAT
SH
18/20
M40Z300AV
REVISION HISTORY
Table 14. Document Revision History
Date
November 14, 2003
19-Nov-03
Version
1.0
Revision Details
First Issue
1.1
Correct shipping information (Table 12)
09-Mar-04
2.0
Reformatted; updated Lead-free information (Table 3, 12)
M40Z300AV, 40Z300AV, Z300AV, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZE-
ROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOWER, ZEROPOW-
ER, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR,
SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, SUPERVISOR, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM, NVRAM,
NVRAM, NVRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM, LPSRAM,
LPSRAM, LPSRAM, LPSRAM, LPSRAM, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC, RTC,
RTC, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor,
Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Microprocessor, Micro-
processor, Microprocessor, Microprocessor, Microprocessor, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low,
Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, Low, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI,
PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFI, PFO, PFO, PFO,
PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, PFO, Battery, Battery, Battery, Battery, Battery,
Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Bat-
tery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery,
Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Battery, Bat-
tery, Battery, Battery, Battery,Battery, Battery, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Back-
up, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Backup, Power-fail, Power-fail, Power-fail, Power-fail, Power-fail,
Power-fail, Power-fail, Power-fail, Power-fail, Power-fail, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Com-
parator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator,
Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, Comparator, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT,
SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SNAPHAT, SOIC,
SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, SOIC, THS, THS, THS, THS, THS, THS, THS, THS,
THS, THS, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V,
5V, 5V, 5V, 5V, 5V, 5V, 5V, 5V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V, 3V,
19/20
M40Z300AV
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequ
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is g
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are s
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products a
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectron
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners.
© 2004 STMicroelectronics - All rights reserved
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