M40Z300_05 [STMICROELECTRONICS]
5V or 3V NVRAM Supervisor for Up to 8 LPSRAMs; 5V或3V NVRAM主管长达8 LPSRAMs
| 型号： | M40Z300_05 |
| 厂家： | 
ST |
| 描述： | 5V or 3V NVRAM Supervisor for Up to 8 LPSRAMs |
| 文件： | 总21页 (文件大小：350K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M40Z300
M40Z300W
5V or 3V NVRAM Supervisor for Up to 8 LPSRAMs
FEATURES SUMMARY
■
■
■
■
CONVERTS LOW POWER SRAM INTO
NVRAMs
PRECISION POWER MONITORING AND
POWER SWITCHING CIRCUITRY
Figure 1. 16-pin SOIC Package
16
AUTOMATIC WRITE-PROTECTION WHEN
V
CC
IS OUT-OF-TOLERANCE
1
TWO-INPUT DECODER ALLOWS
CONTROL FOR UP TO 8 SRAMs (with 2
devices active in parallel)
SO16 (MQ)
■
CHOICE OF SUPPLY VOLTAGES AND
POWER-FAIL DESELECT VOLTAGES:
–
M40Z300:
= 4.5V to 5.5V
Figure 2. 28-pin SOIC Package
V
CC
THS = V : 4.5V ≤ V
≤ 4.75V
PFD
SS
THS = V
: 4.2V ≤ V
≤ 4.5V
OUT
PFD
SNAPHAT (SH)
Crystal/Battery
–
M40Z300W:
= 3.0V to 3.6V
V
CC
THS = V : 2.8V ≤ V
≤ 3.0V
≤ 2.7V
SS
PFD
V
= 2.7V to 3.3V
CC
THS = V
: 2.5 ≤ V
OUT
PFD
■
RESET OUTPUT (RST) FOR POWER ON
RESET
■
■
BATTERY LOW PIN (BL)
LESS THAN 12ns CHIP ENABLE ACCESS
PROPAGATION DELAY (for 5.0V device)
28
1
■
■
PACKAGING INCLUDES A 28-LEAD SOIC
AND SNAPHAT TOP (to be ordered
separately), OR A 16-LEAD SOIC
SOIC PACKAGE PROVIDES DIRECT
CONNECTION FOR A SNAPHAT TOP
WHICH CONTAINS THE BATTERY
®
SOH28 (MH)
February 2005
1/21
M40Z300, M40Z300W
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. 16-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2. 28-pin SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. 28-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. M40Z300 16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. M40Z300W 16-pin SOIC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Two to Four Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2. Truth Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 8. Address-Decode Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Data Retention Lifetime Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power-on Reset Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Battery Low Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
V
CC
Noise And Negative Going Transients. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 9. Supply Voltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4. DC and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10.AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 5. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11.Power Down Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12.Power Up Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 7. Power Down/Up Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PACKAGE MECHANICAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 13.SOH28 – 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline. 15
Table 8. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data 15
Figure 14.SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline. . . . . . . . . . . . . . . 16
Table 9. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data . . . . . . . 16
Figure 15.SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline. . . . . . . . . . . . . . 17
Table 10. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data . . . . . . 17
Figure 16.SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Outline . . . . . . . . 18
Table 11. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data 18
2/21
M40Z300, M40Z300W
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 12. Ordering Information Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. SNAPHAT® Battery Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3/21
M40Z300, M40Z300W
DESCRIPTION
The M40Z300/W NVRAM SUPERVISOR is a self-
contained device which converts a standard low-
power SRAM into a non-volatile memory. A preci-
sion voltage reference and comparator monitors
of the SOIC package after the completion of the
surface mount process which greatly reduces the
board manufacturing process complexity of either
directly soldering or inserting a battery into a sol-
dered holder. Providing non-volatility becomes a
“SNAP.” The 16-pin SOIC provides battery pins for
an external user-supplied battery.
the V input for an out-of-tolerance condition.
CC
When an invalid V
tioned chip enable outputs (E1
condition occurs, the condi-
CC
to E4
) are
CON
CON
forced inactive to write-protect the stored data in
the SRAM. During a power failure, the SRAM is
Insertion of the SNAPHAT housing after reflow
prevents potential battery damage due to the high
temperatures required for device surface-mount-
ing. The SNAPHAT housing is also keyed to pre-
vent reverse insertion.
The 28-pin SOIC and battery packages are
shipped separately in plastic anti-static tubes or in
Tape & Reel form. For the 28-lead SOIC, the bat-
tery/crystal package (e.g., SNAPHAT) part num-
switched from the V pin to the lithium cell within
CC
®
the SNAPHAT to provide the energy required for
data retention. On a subsequent power-up, the
SRAM remains write protected until a valid power
condition returns.
The 28-pin, 330mil SOIC provides sockets with
gold plated contacts for direct connection to a sep-
arate SNAPHAT housing containing the battery.
The SNAPHAT housing has gold plated pins
which mate with the sockets, ensuring reliable
connection. The housing is keyed to prevent im-
proper insertion. This unique design allows the
SNAPHAT battery package to be mounted on top
ber
is
“M4ZXX-BR00SH”
(see
Table
13., page 19).
Caution: Do not place the SNAPHAT battery top
in conductive foam, as this will drain the lithium
button-cell battery.
Figure 3. Logic Diagram
Table 1. Signal Names
THS
E
Threshold Select Input
Chip Enable Input
(1)
V
B +
CC
Conditioned Chip Enable
Output
E1
- E4
CON
CON
THS
E
V
OUT
A, B
RST
Decoder Inputs
BL
E1
E2
E3
E4
Reset Output (Open Drain)
B
CON
CON
CON
CON
M40Z300
M40Z300W
Battery Low Output (Open
Drain)
BL
A
V
OUT
Supply Voltage Output
Supply Voltage
V
CC
RST
V
Ground
SS
B +
B –
NC
Positive Battery Pin
Negative Battery Pin
Not Connected Internally
(1)
V
SS
B –
AI02242
Note: For M40Z300W, B– must be connected to the negative bat-
tery terminal only (not to Pin 8, V ).
Note: 1. For 16-pin SOIC package only.
SS
4/21
M40Z300, M40Z300W
Figure 4. 28-pin SOIC Connections
Figure 6. M40Z300W 16-pin SOIC Connections
V
1
28
V
E
OUT
NC
CC
2
27
NC
RST
NC
A
3
26
NC
NC
NC
E1
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
B –
OUT
NC
4
25
5
24
23
RST
A
E
6
CON
E1
NC
B
7
M40Z300 22
E2
CON
M40Z300W
CON
B
E2
E3
E4
M40Z300W
8
21
20
19
18
17
16
15
NC
E3
CON
CON
CON
BL
THS
NC
BL
9
CON
10
11
12
13
14
NC
NC
NC
E4
V
B +
SS
NC
NC
THS
AI06350
CON
V
NC
SS
AI02243
Note: For M40Z300W, B– must be connected to the negative bat-
tery terminal only (not to Pin 8, V ).
SS
Figure 5. M40Z300 16-pin SOIC Connections
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
B +
OUT
NC
RST
A
E
E1
CON
M40Z300
B
E2
E3
E4
CON
CON
CON
BL
THS
V
B –
SS
AI03624
5/21
M40Z300, M40Z300W
Figure 7. Hardware Hookup
3.0V, 3.3V or 5V
V
V
OUT
CC
V
V
V
V
CC
(1)
CC
(1)
CC
(1)
CC
(1)
0.1µF
E2
E2
E2
E2
M40Z300
M40Z300W
CMOS
SRAM
CMOS
SRAM
CMOS
SRAM
CMOS
SRAM
0.1µF
0.1µF
0.1µF
0.1µF
E
E
E
E
E1
CON
A
B
E
E2
E3
E4
CON
CON
CON
Threshold
THS
RST
BL
To Microprocessor
V
To Battery Monitor Circuit
SS
AI02395
Note: 1. If the second chip enable pin (E2) is unused, it should be tied to V
.
OUT
6/21
M40Z300, M40Z300W
OPERATION
The M40Z300/W, as shown in Figure 7., page 6,
can control up to four (eight, if placed in parallel)
standard low-power SRAMs. These SRAMs must
be configured to have the chip enable input dis-
able all other input signals. Most slow, low-power
SRAMs are configured like this, however many
fast SRAMs are not. During normal operating con-
E1
to E4
are unconditionally driven high,
CON
CON
write protecting the SRAM. A power failure during
a WRITE cycle may corrupt data at the currently
addressed location, but does not jeopardize the
rest of the SRAM's contents. At voltages below
V
(min), the user can be assured the memory
PFD
will be write protected within the Write Protect
Time (t ) provided the V fall time exceeds t
F
ditions, the conditioned chip enable (E1
to
CON
WPT
CC
E4
) output pins follow the chip enable (E) input
(see Figure 8., page 8).
CON
pin with timing shown in Figure 8., page 8 and Ta-
ble 7., page 14. An internal switch connects V
As V continues to degrade, the internal switch
CC
CC
disconnects V and connects the internal battery
CC
to V
. This switch has a voltage drop of less
OUT
to V
. This occurs at the switchover voltage
OUT
than 0.3V (I
).
OUT1
(V ). Below the V , the battery provides a volt-
SO
SO
to the SRAM and can supply current
CC
OHB
of E. In this situation, the SRAM is unconditionally
write protected as V falls below an out-of-toler-
When V
rises above V , V
is switched
CC
SO
OUT
CC
back to the supply voltage. Outputs E1
to
CON
ance threshold (V
er fail detection value associated with V
). For the M40Z300 the pow-
PFD
E4
are held inactive for t
(120ms maxi-
CON
CER
is
PFD
mum) after the power supply has reached V
independent of the E input, to allow for processor
stabilization (see Figure 12., page 13).
,
PFD
selected by the Threshold Select (THS) pin and is
shown in Table 6., page 12. For the M40Z300W,
the THS pin selects both the supply voltage and
V
(also shown in Table 6., page 12).
PFD
Two to Four Decode
Note: In either case, THS pin must be connected
to either V or V
If chip enable access is in progress during a power
fail detection, that memory cycle continues to com-
pletion before the memory is write protected. If the
The M40Z300/W includes a 2 input (A, B) decoder
which allows the control of up to 4 independent
SRAMs. The Truth Table for these inputs is shown
in Table 2.
.
OUT
SS
memory cycle is not terminated within time t
,
WPT
Table 2. Truth Table
Inputs
Outputs
E1
E2
E3
E4
CON
E
H
L
L
L
L
B
X
L
A
X
L
CON
CON
CON
H
L
H
H
H
H
H
H
L
H
H
L
H
L
H
H
H
L
H
H
H
H
L
H
H
H
7/21
M40Z300, M40Z300W
Figure 8. Address-Decode Time
A, B
tAS
E
tEDL
tEDH
E1
CON
- E4
CON
AI02551
Note: During system design, compliance with the SRAM timing parameters must comprehend the propagation delay between E1
-
CON
E4
.
CON
Data Retention Lifetime Calculation
Power-on Reset Output
Most low power SRAMs on the market today can
be used with the M40Z300/W NVRAM SUPERVI-
SOR. There are, however some criteria which
should be used in making the final choice of which
SRAM to use. The SRAM must be designed in a
way where the chip enable input disables all other
inputs to the SRAM. This allows inputs to the
M40Z300/W and SRAMs to be “Don't Care” once
All microprocessors have a reset input which forc-
es them to a known state when starting. The
M40Z300/W has a reset output (RST) pin which is
guaranteed to be low within t
of V
(see 7).
WPT
PFD
This signal is an open drain configuration. An ap-
propriate pull-up resistor should be chosen to con-
trol the rise time. This signal will be valid for all
voltage conditions, even when V equals V
.
SS
CC
V
falls below V
(min). The SRAM should also
CC
PFD
Once V
exceeds the power failure detect volt-
, an internal timer keeps RST low for
CC
guarantee data retention down to V = 2.0V. The
CC
age V
PFD
chip enable access time must be sufficient to meet
the system needs with the chip enable propaga-
tion delays included. If the SRAM includes a sec-
ond chip enable pin (E2), this pin should be tied to
t
to allow the power supply to stabilize.
REC
Battery Low Pin
V
.
The M40Z300/W automatically performs battery
voltage monitoring upon power-up, and at factory-
programmed time intervals of at least 24 hours.
The Battery Low (BL) pin will be asserted if the
battery voltage is found to be less than approxi-
mately 2.5V. The BL pin will remain asserted until
completion of battery replacement and subse-
quent battery low monitoring tests, either during
the next power-up sequence or the next scheduled
24-hour interval.
If a battery low is generated during a power-up se-
quence, this indicates that the battery is below
2.5V and may not be able to maintain data integrity
in the SRAM. Data should be considered suspect,
and verified as correct. A fresh battery should be
installed.
OUT
If data retention lifetime is a critical parameter for
the system, it is important to review the data reten-
tion current specifications for the particular
SRAMs being evaluated. Most SRAMs specify a
data retention current at 3.0V. Manufacturers gen-
erally specify a typical condition for room temper-
ature along with a worst case condition (generally
at elevated temperatures). The system level re-
quirements will determine the choice of which val-
ue to use.
The data retention current value of the SRAMs can
then be added to the I
W to determine the total current requirements for
data retention. The available battery capacity for
value of the M40Z300/
BAT
®
the SNAPHAT of your choice can then be divided
by this current to determine the amount of data re-
tention available (see Table 13., page 19).
CAUTION: Take care to avoid inadvertent dis-
If a battery low indication is generated during the
24-hour interval check, this indicates that the bat-
tery is near end of life. However, data is not com-
promised due to the fact that a nominal V
is
CC
charge through V
and E1
- E4
after
OUT
CON
CON
supplied. In order to insure data integrity during
subsequent periods of battery back-up mode, the
battery has been attached.
For a further more detailed review of lifetime calcu-
lations, please see Application Note AN1012.
®
battery should be replaced. The SNAPHAT top
should be replaced with valid V
device.
applied to the
CC
8/21
M40Z300, M40Z300W
The M40Z300/W only monitors the battery when a
nominal V is applied to the device. Thus appli-
Figure 9. Supply Voltage Protection
CC
cations which require extensive durations in the
battery back-up mode should be powered-up peri-
odically (at least once every few months) in order
for this technique to be beneficial. Additionally, if a
battery low is indicated, data integrity should be
verified upon power-up via a checksum or other
technique. The BL pin is an open drain output and
an appropriate pull-up resistor to V
should be
CC
chosen to control the rise time.
V
Noise And Negative Going Transients
CC
V
CC
I
transients, including those produced by output
CC
V
V
switching, can produce voltage fluctuations, re-
sulting in spikes on the V bus. These transients
can be reduced if capacitors are used to store en-
ergy which stabilizes the V
stored in the bypass capacitors will be released as
low going spikes are generated or energy will be
absorbed when overshoots occur. A ceramic by-
pass capacitor value of 0.1µF (as shown in Figure
9.) is recommended in order to provide the needed
filtering.
CC
CC
0.1µF
DEVICE
bus. The energy
CC
SS
AI00622
In addition to transients that are caused by normal
SRAM operation, power cycling can generate neg-
ative voltage spikes on V
that drive it to values
CC
below V by as much as one volt. These negative
SS
spikes can cause data corruption in the SRAM
while in battery backup mode. To protect from
these voltage spikes, STMicroelectronics recom-
mends connecting a schottky diode from V
to
CC
V
(cathode connected to V , anode to V ).
SS
CC SS
Schottky diode 1N5817 is recommended for
through hole and MBRS120T3 is recommended
for surface mount.
9/21
M40Z300, M40Z300W
MAXIMUM RATING
Stressing the device above the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the device at
these or any other conditions above those indicat-
ed in the Operating sections of this specification is
not implied. Exposure to Absolute Maximum Rat-
ing conditions for extended periods may affect de-
vice
reliability.
Refer
also
to
the
STMicroelectronics SURE Program and other rel-
evant quality documents.
Table 3. Absolute Maximum Ratings
Symbol
Parameter
Value
0 to 70
Unit
°C
Grade 1
Grade 6
T
A
Ambient Operating Temperature
–40 to 85
°C
®
–40 to 85
–55 to 125
260
°C
°C
°C
SNAPHAT
SOIC
T
Storage Temperature
STG
(1,2)
Lead Solder Temperature for 10 seconds
Input or Output Voltage
T
SLD
–0.3 to V
+ 0.3
V
V
V
CC
–0.3 to 7.0
–0.3 to 4.6
20
IO
M40Z300
V
Supply Voltage
CC
M40Z300W
V
I
Output Current
mA
W
O
P
D
Power Dissipation
1
Note: 1. For SO package, standard (SnPb) lead finish: Reflow at peak temperature of 225°C (total thermal budget not to exceed 180°C for
between 90 to 150 seconds).
2. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C
for greater than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
10/21
M40Z300, M40Z300W
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, as well as the DC and AC
characteristics of the device. The parameters in
the following DC and AC Characteristic tables are
derived from tests performed under the Measure-
ment Conditions listed in the relevant tables. De-
signers should check that the operating conditions
in their projects match the measurement condi-
tions when using the quoted parameters.
Table 4. DC and AC Measurement Conditions
Parameter
M40Z300
4.5 to 5.5V
0 to 70°C
–40 to 85°C
100pF
M40Z300W
2.7 to 3.6V
0 to 70°C
–40 to 85°C
50pF
V
Supply Voltage
CC
Grade 1
Grade 6
Ambient Operating Temperature
Load Capacitance (C )
L
Input Rise and Fall Times
Input Pulse Voltages
≤ 5ns
≤ 5ns
0 to 3V
0 to 3V
Input and Output Timing Ref. Voltages
1.5V
1.5V
Note: Output High Z is defined as the point where data is no longer driven.
Figure 10. AC Testing Load Circuit
333Ω
DEVICE
UNDER
TEST
1.73V
C
= 100pF
or 50pF
L
C
includes JIG capacitance
L
AI02393
Note: 50pF for M40Z300W.
Table 5. Capacitance
Symbol
(1,2)
Min
Max
8
Unit
pF
Parameter
C
Input Capacitance
Input/Output Capacitance
IN
(3)
10
pF
C
OUT
Note: 1. Sampled only, not 100% tested.
2. At 25°C, f = 1MHz.
3. Outputs deselected.
11/21
M40Z300, M40Z300W
Table 6. DC Characteristics
M40Z300
Typ
M40Z300W
Typ
(1)
Sym
Parameter
Unit
Test Condition
Min
Max
Min
Max
(2)
0V ≤ V ≤ V
Input Leakage Current
±1
±1
µA
I
LI
IN
CC
I
Supply Current
Outputs open
3
6
2
4
mA
V
CC
V
V
Input Low Voltage
Input High Voltage
Output Low Voltage
Output Low Voltage
–0.3
2.2
0.8
–0.3
2.0
0.8
IL
V
CC
+ 0.3
V
CC
+ 0.3
V
IH
I
OL
= 4.0mA
= 10mA
0.4
0.4
0.4
0.4
V
V
OL
I
OL
V
(3)
(open drain)
V
I
= –2.0mA
Output High Voltage
2.4
2.0
2.4
2.0
V
V
OH
OH
(4)
V
OHB
I
= –1.0µA
2.9
3.6
250
150
2.9
3.6
150
100
V
V
V
Battery Back-up
OUT2
OH
V
V
> V –0.3
mA
mA
OUT
OUT
CC
I
Current (Active)
OUT1
OUT2
OUT
> V –0.2
CC
Current (Battery
OUT
I
V
> V
–0.3
BAT
100
100
µA
nA
V
OUT
Back-up)
Data Retention Mode
I
100
100
CCDR
(5)
Current
Threshold Select
Voltage
V
SS
V
OUT
V
SS
V
OUT
THS
Power-fail Deselect
4.5
4.2
4.6
4.75
2.8
2.5
2.9
2.6
3.0
V
Voltage (THS = V
)
SS
V
PFD
Power-fail Deselect
4.35
4.5
2.7
V
Voltage (THS = V
)
OUT
Battery Back-up
V
3.0
2.9
2.5
2.9
V
V
SO
Switchover Voltage
Battery Voltage
V
BAT
2.0
3.6
2.0
3.6
Note: 1. Valid for Ambient Operating Temperature: T = 0 to 70°C or –40 to 85°C; V = 2.7 to 3.6V or 4.5 to 5.5V(except where noted).
A
CC
2. Outputs deselected.
3. For RST & BL pins (Open Drain).
4. Chip Enable outputs (E1
- E4
) can only sustain CMOS leakage currents in the battery back-up mode.
CON
CON
Higher leakage currents will reduce battery life.
5. Measured with V and E1 - E4 open.
OUT
CON
CON
12/21
M40Z300, M40Z300W
Figure 11. Power Down Timing
V
CC
V
V
V
V
(max)
(min)
PFD
PFD
PFD
SO
tF
tFB
E
tWPT
V
OHB
E1
E4
CON
CON
-
RST
AI02398B
Figure 12. Power Up Timing
V
CC
V
V
V
(max)
(min)
PFD
PFD
PFD
V
SO
tR
tRB
tCER
E
tEDH
tEDL
V
OHB
E1
E4
CON
CON
-
tREC
RST
AI02399B
13/21
M40Z300, M40Z300W
Table 7. Power Down/Up Mode AC Characteristics
(1)
Symbol
Min
Max
Unit
Parameter
(2)
V
V
V
(max) to V
(min) to V
(min) V Fall Time
300
µs
t
PFD
PFD
CC
F
M40Z300
10
150
10
µs
µs
µs
ns
ns
ns
ns
ns
ms
(3)
V
Fall Time
t
PFD
PFD
SS CC
FB
M40Z300W
t
(min) to V
(max) V Rise Time
PFD CC
R
M40Z300
M40Z300W
M40Z300
12
20
10
20
t
Chip Enable Propagation Delay Low
Chip Enable Propagation Delay High
EDL
t
EDH
M40Z300W
t
A, B set up to E
0
AS
t
Chip Enable Recovery
40
40
120
120
CER
(4)
V
PFD
(max) to RST High
ms
t
REC
M40Z300
40
40
1
150
250
µs
µs
µs
t
Write Protect Time
V to V (min) V Rise Time
SS
WPT
M40Z300W
t
RB
PFD
CC
Note: 1. Valid for Ambient Operating Temperature: T = 0 to 70°C or –40 to 85°C; V = 2.7 to 3.6V or 4.5 to 5.5V(except where noted).
A
CC
2. V
(max) to V
(min) fall time of less than tF may result in deselection/write protection not occurring until 200 µs after V
PFD CC
PFD
passes V
(min).
PFD
3. V
4. t
(min) to V fall time of less than t may cause corruption of RAM data.
(min) = 20ms for industrial temperature Grade 6 device.
PFD
REC
SS FB
14/21
M40Z300, M40Z300W
PACKAGE MECHANICAL INFORMATION
Figure 13. SOH28 – 28-lead Plastic Small Outline, 4-socket battery SNAPHAT, Package Outline
A2
A
C
eB
B
e
CP
D
N
E
H
A1
α
L
1
SOH-A
Note: Drawing is not to scale.
Table 8. SOH28 – 28-lead Plastic Small Outline, battery SNAPHAT, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
3.05
0.36
2.69
0.51
0.32
18.49
8.89
–
Typ
Max
0.120
0.014
0.106
0.020
0.012
0.728
0.350
–
A
A1
A2
B
0.05
2.34
0.36
0.15
17.71
8.23
–
0.002
0.092
0.014
0.006
0.697
0.324
–
C
D
E
e
1.27
0.050
eB
H
3.20
11.51
0.41
0°
3.61
12.70
1.27
8°
0.126
0.453
0.016
0°
0.142
0.500
0.050
8°
L
α
N
28
28
CP
0.10
0.004
15/21
M40Z300, M40Z300W
Figure 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Outline
A2
A1
A
A3
L
eA
D
B
eB
E
SHZP-A
Note: Drawing is not to scale.
Table 9. SH – 4-pin SNAPHAT Housing for 48mAh Battery, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
9.78
7.24
6.99
0.38
0.56
21.84
14.99
15.95
3.61
2.29
Typ
Max
A
A1
A2
A3
B
0.385
0.285
0.275
0.015
0.022
0.860
0.590
0.628
0.142
0.090
6.73
6.48
0.265
0.255
0.46
21.21
14.22
15.55
3.20
0.018
0.835
0.560
0.612
0.126
0.080
D
E
eA
eB
L
2.03
16/21
M40Z300, M40Z300W
Figure 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Outline
A2
A1
A
A3
L
eA
D
B
eB
E
SHZP-A
Note: Drawing is not to scale.
Table 10. SH – 4-pin SNAPHAT Housing for 120mAh Battery, Package Mechanical Data
mm
Min
inches
Min
Symbol
Typ
Max
10.54
8.51
Typ
Max
A
A1
A2
A3
B
0.415
.0335
0.315
0.015
0.022
0.860
0.710
0.628
0.142
0.090
8.00
7.24
0.315
0.285
8.00
0.38
0.46
21.21
17.27
15.55
3.20
0.56
0.018
0.835
0.680
0.612
0.126
0.080
D
21.84
18.03
15.95
3.61
E
eA
eB
L
2.03
2.29
17/21
M40Z300, M40Z300W
Figure 16. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Outline
A2
A
C
B
CP
e
D
N
1
E
H
A1
α
L
SO-b
Note: Drawing is not to scale.
Table 11. SO16 – 16-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
mm
inches
Min.
Symbol
Typ.
Min.
Max.
1.75
0.25
1.60
0.46
0.25
10.00
4.00
–
Typ.
Max.
0.069
0.010
0.063
0.018
0.010
0.394
0.158
–
A
A1
A2
B
0.10
0.004
0.35
0.19
9.80
3.80
–
0.014
0.007
0.386
0.150
–
C
D
E
e
1.27
0.050
H
5.80
0.40
0°
6.20
1.27
8°
0.228
0.016
0°
0.244
0.050
8°
L
α
N
16
16
CP
0.10
0.004
18/21
M40Z300, M40Z300W
PART NUMBERING
Table 12. Ordering Information Example
Example:
M40Z
300W
MH
1
TR
Device Type
M40Z
Supply and Write Protect Voltage
300 = V = 4.5 to 5.5V
CC
THS = V = 4.5V ≤ V
≤ 4.75V
SS
PFD
THS = V
= 4.2V ≤ V
≤ 4.5V
≤ 3.0V
OUT
PFD
300W = V = 3.0 to 3.6V
CC
THS = V = 2.8V ≤ V
SS
PFD
V
= 2.7V to 3.3V
CC
THS = V
= 2.5V ≤ V
≤ 2.7V
OUT
PFD
Package
(1)
MH
= SOH28
MQ = SO16
Temperature Range
1 = 0 to 70°C
6 = –40 to 85°C
Shipping Method for SOIC
blank = Tubes
TR = Tape & Reel
®
Note: 1. The SOIC package (SOH28) requires the battery package (SNAPHAT ) which is ordered separately under the part number
“M4Zxx-BR00SH” in plastic tube or “M4Zxx-BR00SHTR” in Tape & Reel form.
Caution: Do not place the SNAPHAT battery package “M4Zxx-BR00SH” in conductive foam as it will drain the lithium button-cell
battery.
For other options, or for more information on any aspect of this device, please contact the ST Sales Office
nearest you.
®
Table 13. SNAPHAT Battery Table
Part Number
M4Z28-BR00SH
M4Z32-BR00SH
Description
Package
SH
Lithium Battery (48mAh) SNAPHAT
Lithium Battery (120mAh) SNAPHAT
SH
19/21
M40Z300, M40Z300W
REVISION HISTORY
Table 14. Document Revision History
Date
Version
1.0
Revision Details
March 1999
08-Mar-00
22-Sep-00
23-Feb-01
30-May-01
First Issue
1.1
Document Layout changed; SO16 package added; Battery Capacity changed (Table 13)
SO16 package measures change
1.2
1.3
Added information for Industrial Temperature (Table 3, 7, 12)
Change “Controller” references to “SUPERVISOR”
1.4
Reformatted; added temp/voltage info. to tables (Table 6, 7); Figures changed (Figures 3,
5, 7, 10, 8)
10-Jul-01
01-Aug-01
15-Jan-02
2.0
2.1
2.2
E2 connections added to Hookup (Figure 7)
16-pin SOIC Connections split, graphic added (Figure 6); addition to hardware hookup
(Figure 7)
13-May-02
31-Oct-03
04-Nov-03
23-Feb-05
2.3
2.4
2.5
3.0
Modify reflow time and temperature footnote (Table 3)
Update DC Characteristics (Table 6)
Correct DC Characteristics (Table 6)
Reformatted; IR reflow, SO package updates (Table 3)
20/21
M40Z300, M40Z300W
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
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