M54HC137K1 [STMICROELECTRONICS]
RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING); RAD - HARD 3-8线译码器/ LATCH （反相）
| 型号： | M54HC137K1 |
| 厂家： | 
ST |
| 描述： | RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING) |
| 文件： | 总10页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M54HC137
RAD-HARD 3 TO 8 LINE DECODER/LATCH (INVERTING)
■
■
■
■
■
■
■
HIGH SPEED:
=18ns (TYP.) at V = 6V
t
PD
CC
LOW POWER DISSIPATION:
= 2µA (MAX.) at T =25°C
I
CC
A
HIGH NOISE IMMUNITY:
= V = 28% V (MIN.)
V
NIH
NIL
CC
DILC-16
FPC-16
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 4mA (MIN)
OH
OL
BALANCED PROPAGATION DELAYS:
t
t
ORDER CODES
PACKAGE
PLH
PHL
WIDE OPERATING VOLTAGE RANGE:
(OPR) = 2V to 6V
FM
EM
V
CC
DILC
FPC
M54HC137D
M54HC137K
M54HC137D1
M54HC137K1
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 137
■
■
SPACE GRADE-1: ESA SCC QUALIFIED
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
to high, the addresses present at the select inputs
(A, B, and C) is stored in the latches. As long as
GL remains high no address changes will be
recognized. Output enable pins G1 and G2,
control the state of the outputs independently of
the select or latch-enable inputs. All the outputs
are high unless G1 is high and G2 is low. The
54HC137 is ideally suited for the implementation
of glitch-free decoders in stored-address
application in bus oriented systems.
■
■
DEVICE FULLY COMPLIANT WITH
SCC-9205-013
DESCRIPTION
The M54HC137 is an high speed CMOS 3 TO 8
LINE DECODER/LATCH (INVERTING) fabricated
with silicon gate C MOS technology.
This device is a 3 to 8 line decoder with latches on
the three address inputs. When GL goes from low
2
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION
March 2004
1/10
M54HC137
IEC LOGIC SYMBOLS
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN N°
SYMBOL
NAME AND FUNCTION
1, 2, 3
4
A to C
GL
Data Inputs
Latch Enable Input (Active
LOW)
5
6
G2
G1
Data Enable Input (Active
LOW)
Data Enable Input (Active
HIGH)
9, 10, 11, 12,
13, 14, 15,
7
Y0 to Y7
Multiplexer Outputs
8
GND
Ground (0V)
16
V
Positive Supply Voltage
CC
TRUTH TABLE
INPUTS
OUTPUTS
ENABLE
G1
SELECT
B
GL
G2
C
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
L
L
L
L
L
L
L
L
H
X
L
H
X
L
L
L
L
L
L
L
L
L
X
X
L
X
X
L
X
X
L
H
H
L
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
X
H
H
H
H
L
H
L
H
H
H
H
H
X
H
H
H
X
H
Outputs corresponding to stored address L: all others H
2/10
M54HC137
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7
V
V
CC
V
DC Input Voltage
-0.5 to V + 0.5
I
CC
V
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
-0.5 to V + 0.5
V
O
CC
I
± 20
± 20
mA
mA
mA
mA
mW
°C
IK
I
OK
I
± 25
O
I
or I
DC V
or Ground Current
CC
± 50
CC
GND
P
Power Dissipation
300
D
T
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
265
stg
T
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
3/10
M54HC137
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
2 to 6
0 to V
V
V
CC
V
Input Voltage
I
CC
V
Output Voltage
0 to V
CC
V
O
T
Operating Temperature
Input Rise and Fall Time
-55 to 125
0 to 1000
0 to 500
0 to 400
°C
ns
ns
ns
op
V
V
V
= 2.0V
= 4.5V
= 6.0V
CC
CC
CC
t , t
r
f
DC SPECIFICATIONS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
IH
V
V
V
Low Level Input
Voltage
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
IL
V
High Level Output
Voltage
I =-20 µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
1.9
4.4
OH
O
I =-20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
O
I =-20 µA
5.9
5.9
V
V
O
I =-4.0 mA
4.18 4.31
4.13
5.63
4.10
5.60
O
I =-5.2 mA
5.68
5.8
0.0
0.0
0.0
O
V
Low Level Output
Voltage
I =20 µA
0.1
0.1
0.1
0.1
0.1
0.1
0.1
OL
O
I =20 µA
O
I =20 µA
0.1
0.1
O
I =4.0 mA
0.17 0.26
0.18 0.26
0.33
0.33
0.40
0.40
O
I =5.2 mA
O
I
Input Leakage
Current
I
V = V or GND
6.0
6.0
± 0.1
± 1
± 1
µA
µA
I
CC
I
Quiescent Supply
Current
CC
V = V or GND
2
20
40
I
CC
4/10
M54HC137
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6ns)
L
r
f
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
t
t
Output Transition
Time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
30
8
75
15
13
115
23
20
115
23
20
170
34
29
165
33
28
50
10
9
95
19
16
145
29
25
145
29
25
215
43
37
205
41
35
65
13
11
110
22
19
175
35
30
175
35
30
250
50
43
110
22
19
75
15
13
75
15
13
5
TLH THL
ns
ns
ns
ns
ns
ns
ns
ns
7
t
t
t
t
t
Propagation Delay
Time (G1 - Yn)
45
14
12
50
15
13
70
22
19
70
21
18
12
3
PLH PHL
t
Propagation Delay
Time (G2 - Yn)
PLH PHL
t
Propagation Delay
Time (GL - Yn)
PLH PHL
t
Propagation Delay
Time (A, B, C - Y)
PLH PHL
t
t
Minimum Pulse
Width (GL)
W(H)
W(L)
3
t
Minimum Set-up
Time (A, B, C - GL)
8
50
10
9
60
12
10
5
s
2
2
t
Minimum Hold
Time (A, B, C - GL)
5
h
5
5
5
5
5
5
CAPACITIVE CHARACTERISTICS
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
T
= 25°C
Symbol
Parameter
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
5.0
5
10
10
10
pF
pF
IN
C
Power Dissipation
Capacitance (note
1)
PD
5.0
55
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
5/10
M54HC137
TEST CIRCUIT
C
R
= 50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
WAVEFORM 1: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
6/10
M54HC137
WAVEFORM 2: MINIMUM PULSE WIDTH, SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
7/10
M54HC137
DILC-16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
a1
a2
B
2.1
3.00
0.63
1.82
0.40
0.20
20.06
7.36
2.71
3.70
1.14
2.39
0.50
0.30
20.58
7.87
0.083
0.118
0.025
0.072
0.016
0.008
0.790
0.290
0.107
0.146
0.045
0.094
0.020
0.012
0.810
0.310
0.88
0.035
b
0.45
0.254
20.32
7.62
0.018
0.010
0.800
0.300
0.100
0.700
0.310
0.295
b1
D
e
e1
e2
e3
F
2.54
17.65
7.62
7.29
17.78
7.87
17.90
8.12
7.70
3.83
12.1
1.5
0.695
0.300
0.287
0.705
0.320
0.303
0.151
0.476
0.059
7.49
I
K
10.90
1.14
0.429
0.045
L
0056437F
8/10
M54HC137
FPC-16 MECHANICAL DATA
mm.
inch
TYP.
0.272
DIM.
MIN.
6.75
9.76
1.49
0.102
8.76
TYP
6.91
9.94
MAX.
7.06
MIN.
0.266
0.384
0.059
0.004
0.345
MAX.
0.278
0.399
0.077
0.006
0.355
A
B
C
D
E
F
10.14
1.95
0.392
0.127
8.89
1.27
0.43
0.152
9.01
0.005
0.350
0.050
0.017
G
H
L
0.38
6.0
0.48
0.015
0.237
0.738
0.013
0.019
18.75
0.33
22.0
0.43
0.867
0.017
M
N
0.38
4.31
0.015
0.170
G
D
F
H
16
9
A
N
L
1
8
H
M
E
B
C
0016030E
9/10
M54HC137
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its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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10/10
相关型号：
M54HC138F1
HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16, FRIT SEALED, CERAMIC, DIP-16
STMICROELECTR
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